KR930003569Y1 - Vertical size control circuit for crt - Google Patents

Vertical size control circuit for crt Download PDF

Info

Publication number
KR930003569Y1
KR930003569Y1 KR2019880011983U KR880011983U KR930003569Y1 KR 930003569 Y1 KR930003569 Y1 KR 930003569Y1 KR 2019880011983 U KR2019880011983 U KR 2019880011983U KR 880011983 U KR880011983 U KR 880011983U KR 930003569 Y1 KR930003569 Y1 KR 930003569Y1
Authority
KR
South Korea
Prior art keywords
vertical size
transistor
flyback transformer
power supply
variable resistor
Prior art date
Application number
KR2019880011983U
Other languages
Korean (ko)
Other versions
KR900003986U (en
Inventor
이강우
Original Assignee
주식회사 금성사
최근선
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사, 최근선 filed Critical 주식회사 금성사
Priority to KR2019880011983U priority Critical patent/KR930003569Y1/en
Publication of KR900003986U publication Critical patent/KR900003986U/en
Application granted granted Critical
Publication of KR930003569Y1 publication Critical patent/KR930003569Y1/en

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/04Deflection circuits ; Constructional details not otherwise provided for
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/005Power supply circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/22Circuits for controlling dimensions, shape or centering of picture on screen
    • H04N3/223Controlling dimensions
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00Aspects of display data processing
    • G09G2340/04Changes in size, position or resolution of an image
    • G09G2340/0407Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0414Vertical resolution change

Landscapes

  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)

Abstract

내용 없음.No content.

Description

플라이백 트랜스를 이용한 모니터의 수직사이즈 조정회로Vertical Size Adjustment Circuit of Monitor Using Flyback Trans

제1a, b도는 종래의 모니터의 고압발생 및 수직사이즈 조정 회로도.1A and 1B are high voltage generation and vertical size adjustment circuit diagrams of a conventional monitor.

제2도의 본 고안의 플라이백 트랜스를 이용한 모니터의 수직사이즈 조정회로도.Figure 2 is a vertical size adjustment circuit of the monitor using the flyback transformer of the present invention of FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 수직편향집적소자 SMPS : 스위칭모우드파우어서플라이1: Vertical deflection integrated element SMPS: Switching mode power supply

P1, P2: 입력단자 P3: 수직사이즈조정단P 1 , P 2 : Input terminal P 3 : Vertical size adjustment terminal

P4: 수직편향단 FBT : 플라이 백트랜스P 4 : vertical deflection FBT: flyback transformer

R101, R1-R8: 저항 VR101, VR102, VR1, VR2: 가변저항R 101 , R 1 -R 8 : Resistance VR 101 , VR 102 , VR 1 , VR 2 : Variable resistor

C101, C1, C2: 콘덴서 Q101, Q1-Q4: 트랜지스터C 101 , C 1 , C 2 : condenser Q 101 , Q 1 -Q 4 : transistor

B+, V1, V2: 전원 L1: 코일B + , V 1 , V 2 : Power L 1 : Coil

본 고안은 모니터의 수직사이즈(SIZE) 조정회로에 관한 것으로, 특히 플라이백트랜스(FLY BACK TRANS) 트랜스의 입력전원과 스위칭모우드파우어서플라이(SMPS)의 출력전원을 이용하여. 수직사이즈를 조정하게 한 플라이백트 랜스를 이용한 모니터의 수직사이즈 조정회로에 관한 것이다.The present invention relates to a vertical size adjustment circuit of a monitor, in particular, by using an input power supply of a flyback transformer and an output power supply of a switching mode power supply (SMPS). It relates to a vertical size adjustment circuit of a monitor using a flyback lance that allows the vertical size to be adjusted.

종래의 모니터의 고압발생 및 수직사이즈 조정회로는 제1a, b도에 도시한 바와같이, 입력단자(P1)를 통과한 수평드라이브신호가 수평편향코일(L1)에 인가된 전원(V1)과 함께 트랜지스터(Q101)를 턴온시킨 후 잡음제거용 콘덴서(C102)를 통과한 전원(B+)이 플라이백트랜스(FBT)의 1차측과 콘덴서(C101)에 인가되어 공진됨에 따라 플라이백트랜스(FBT)의 2차측으로 부터 고압이 유기되어 브라운관에 인가되고, 수직편향집적소자(1)는 입력단자(P2)를 통과한 수직동기신호와 가변저항(VR101)(VR102)을 통과한 전원(V2)에 의하여 수직편향을 수행하는데, 이때 가변저항(VR101)(VR102)을 조정하여, 수직사이즈를 조정하였으나, 플라이백트랜스(FBT)의 1차측에 전원(B+)이 그대로 입력되므로 전압레귤레이션이 좋지않게 되고, 가변저항(VR101)(VR102)의 한계점으로 인하여 수직사이즈가 제한되므로 큰 용량이 브라운관에는 적용되지 못하게 되는 결함이 있었다.In the high voltage generation and vertical size adjustment circuit of the conventional monitor, as shown in FIGS. 1A and 1B, the power supply V 1 to which the horizontal drive signal passing through the input terminal P 1 is applied to the horizontal deflection coil L 1 . Power supply (B + ) passing through the noise canceling capacitor (C 102 ) after the transistor Q 101 is turned on and is applied to the primary side of the flyback transformer (FBT) and the capacitor (C 101 ) and resonates. The high pressure is induced from the secondary side of the flyback transformer (FBT) and is applied to the CRT. The vertical deflection integrated element (1) has a vertical synchronous signal and a variable resistor (VR 101 ) (VR 102 ) passing through the input terminal (P 2 ). The vertical deflection is performed by the power supply (V 2 ) that passes through), but the vertical size is adjusted by adjusting the variable resistor (VR 101 ) (VR 102 ), but the power supply () is applied to the primary side of the flyback transformer (FBT). since B +) is input as it is so that the voltage regulation is not good, the critical point of the variable resistor (VR 101) (VR 102) Because by limiting the vertical size had a defect that a large dose not apply to prevent cathode-ray tube.

본 고안은 이와같은 결함을 감안하여, 프라이백트랜스의 유기전압과 스위칭모우드파우어서플라이의 구동전원으로 수직편향의 수직사이즈를 조정함으로서 전원레귤레이션을 양호하게 하고 수직사이즈의 폭을 넓게하도록 한 플라이백트랜스를 이용한 모니터의 수직사이즈 조정회로를 안출한 것으로, 이를 첨부한 도면에 의하여 상세히 설명하면 다음과 같다.In view of such deficiencies, the flyback transformer is designed to improve the power regulation and widen the vertical size by adjusting the vertical size of the vertical deflection with the driving voltage of the flyback transformer and the switching power supply of the flyback transformer. The vertical size adjustment circuit of the monitor was devised, which will be described in detail with reference to the accompanying drawings.

제2도는 플라이백트랜스를 이용한 모니터의 수직사이즈 조정회로도로서 이에 도시한 바와같이, 스위칭모우드파우어서플라이(SMPS)의 인출 전원이 각각의 바이어스저항(R2) (R6-R8)과 접속된 트랜지스터(Q2-Q4)를 통하여 연속으로 증폭되어 가변저항(VR1)과 함께 분배저항(R1), 잡음제거용콘덴서(C3)를 통하여 플라이백드랜스(FBT)의 1차측에 전원(B+)을 인가하게 하며, 상기 가변저항(VR1)을 통과한 전원이 수직사이즈조정단(P3)을 통과한 전원과 함께 바이어스저항(R3)(R4)을 통하여 트랜지스터(Q1,)를 구동하게 한 후 잡음제거용콘텐서(C2), 분배저항(R5), 가변저항(VR2)의 조정을 통하여 수직편향단(P4)의 수직사이즈를 조정하게 구성한 것이다.FIG. 2 is a vertical size adjustment circuit diagram of a monitor using a flyback transformer. As shown therein, a drawing power supply of the switching mode powder fly (SMPS) is connected to each of the bias resistors R 2 (R 6 -R 8 ). Amplified continuously through the transistors Q 2 -Q 4 to supply power to the primary side of the flyback transformer FBT through the distribution resistor R 1 and the noise canceling capacitor C 3 together with the variable resistor VR 1 . (B + ) is applied to the transistor Q through the bias resistor (R 3 ) (R 4 ) with the power passing through the variable resistor (VR 1 ) passed through the vertical size adjustment stage (P 3 ). After driving 1 ,), the vertical size of the vertical deflection stage P 4 is adjusted by adjusting the noise removing capacitor C 2 , the distribution resistor R 5 , and the variable resistor VR 2 .

이와같이 구성된 본 고안의 작용효과를 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above are as follows.

제2도에 도시한 바와같이, 스위칭모우드파우어서플라이(SMPS)의 인출전원이 저항(R2)을 통하여 인가됨과 아울러 바이어스저항(R6)을 통하여 트랜지스터(Q4)의 베이스측에 고전위를 인가시켜 트랜지스터(Q4)를 턴온시킨 후 연속적으로 트랜지스터(Q3)(Q2)를 턴온시킴에 따라 상기 스위칭모우드파우어서플라이(SMPS)로부터 인출된 전원이 트랜지스터(Q2-Q4)를 통하여 증폭되어 플라이백트랜스(FBT)의 1차측에 충분한 전원(B+)을공급한다.As shown in FIG. 2, the drawing power of the switching mode powder supply SMPS is applied through the resistor R 2 and the high potential is applied to the base side of the transistor Q 4 through the bias resistor R 6 . As the transistor Q 4 is turned on and then the transistors Q 3 and Q 2 are continuously turned on, the power drawn from the switching mode powder supply SMPS passes through the transistors Q 2 -Q 4 . It is amplified to supply sufficient power (B + ) to the primary side of the flyback transformer (FBT).

그리고 플라이백트랜스(FBT)의 1차측을 통과한 전원(B+)이 분배저항(R1)(R2), 잡음제거용콘덴서(C1), 가변저항(VR1)에 인가되어 전류투프(LOOP)를 형성하며, 이때 가변저항(VR1)에 인가된 전원이 바이어스저항(R3)(R4)을 통하여 트랜지스터(Q1)의 베이스측에 고전위를 인가시켜 트랜지스터(Q1)를 턴온시킨후 수직사이즈조정단(P3)의 전원이 트랜지스터(Q1)를 통하여 트랜지스터(Q1)의 베이스측에 인가됨에 따라 트랜지스터(Q1)의 콜렉터측에 인가된 출력전원이 잡음제거용콘덴서(C3), 분배저항(R5), 가변저항(VR2)을 통하여 수직편향단(P4)에 인가됨으로서 수직사이즈가 형성된다.Then, the power supply B + passing through the primary side of the flyback transformer FBT is applied to the distribution resistor R 1 , R 2 , the noise canceling capacitor C 1 , and the variable resistor VR 1 to supply the current. LOOP, wherein a power applied to the variable resistor VR 1 applies a high potential to the base side of the transistor Q 1 through a bias resistor R 3 (R 4 ), thereby providing a transistor Q 1 . after turning on the adjusting the vertical size only (P 3) the power transistor output power is noise reduction applied to the collector side of the transistor (Q 1) as through the (Q 1) is on the base side of the transistor (Q 1) of The vertical size is formed by being applied to the vertical deflection stage P 4 through the condenser C 3 , the distribution resistor R 5 , and the variable resistor VR 2 .

여기서 저항(R5)과 가변저항(VR2)은 수직사이즈를 가변해준다.Here, the resistor R 5 and the variable resistor VR 2 change the vertical size.

즉 수직사이즈를 크게할 경우에는 수직사이즈조정단(P3)의 전류(I)가 트랜지스터 (Q1)의 콜렉터전류(Ic)와 수직편향단(P4)의 전류(IDY)합으로 형성된 후 트랜지스터(Q1)의 콜렉터전류(Ic)로 트랜지스터(Q4)(Q3)(Q2)를 순차적으로 바이어스시켜 플라이백트랜스(FBT)의 1차측에 증폭된 전원(B+)을 인가시키는데, 이때 가변저항(VR1)을 조정해서 트랜지스터(Q1)의 베이스측 전류를 작게하면, 트랜지스터(Q1)의 콜렉터측전류(IC)가 작게됨과 아울러 수직편향단(P4)의 전류(IDY)가 크게됨으로서 수직사이즈가 크게되는 것이며, 이때 가변저항(VR2)으로 수직편향단(P4)의 전류(IDY)를 조정함으로서 수직사이즈가 조정되는 것이다.That is, when increasing the vertical size, the current I of the vertical size adjusting stage P 3 is formed by the sum of the collector current Ic of the transistor Q 1 and the current I DY of the vertical deflection stage P 4 . a power supply (B +) amplified in the primary side of the after transistor (Q 1) collector current (I c) to the transistor (Q 4) (Q 3) (Q 2) to by the flyback transformer (FBT) bias in sequence of the It is sikineunde, wherein the variable resistor (VR 1) to when to reduce the base-side current of the transistor (Q 1) to adjust, as soon reducing the collector-side current (I C) of the transistor (Q 1) as well as the vertical deflection stage (P 4) of the current (I DY) that will greatly by being that the vertical dimension significantly, this time becomes a vertical size by adjusting the current (I DY) of the variable resistor (VR 2) to the vertical deflection stage (P 4) adjustment.

그리고 수직사이즈를 작게할 경우에는, 가변저항(VR1)의 조정으로 트랜지스터(Q1)의 콜렉터 전원(Ic)를 크게하여, 수직편향단(P4)의 전류(IDY)를 작게함으로서 수직사이즈가 작게 조정되는 것이다.When the vertical size is reduced, the collector power supply I c of the transistor Q 1 is increased by adjusting the variable resistor VR 1 , and the current I DY of the vertical deflection stage P 4 is reduced. The vertical size is adjusted small.

이상에서 설명한 바와같이 본 고안은 스위칭모우드파우어서플라이드의 인출 전원을 증폭 및 제어하여, 플라이백트랜스에 공급함으로서 전원의 레귤레이션이 보정되고, 수직사이즈를 최대로 조정해도 모니터화면이 안정되게 조정될 수 있는 효과가 있는 것이다.As described above, the present invention amplifies and controls the draw power of the switching mode powder and supplies it to the flyback transformer so that the regulation of the power is corrected and the monitor screen can be stably adjusted even if the vertical size is adjusted to the maximum. It works.

Claims (1)

수평드라이브신호와 전원(B+)으로 플라이백트랜스(FBT)를 구동하여, 고압을 발생하게 한 고압발생회로에 있어서, 스위칭모우드파우어서플라이(SMPS)로부터 인출된 전원이 바이어스저항(R6-R8)과 접속된 트랜지스터(Q2-Q4)를 통하여 중폭된 후 저항(R1)(R2), 가변저항(VR1)을 통하여 상기 플라이백트랜스(FBT)의 1차 측에 전원(B+)을 인가하게 하며, 상기 가변저항(VR1)에 분배된 전원이 수직사이즈조정단(P3)을 통과한 전원과 함께 바이어스저항(R3)(R4)을 통하여 트랜지스터(Q1)를 구동한 후 가변저항(VR2)을 통하여 수직편향단(P4)의 수직사이즈를 조정하게 구성한 것을 특징으로 하는 프라이백 트랜스를 이용한 모니터의 수직사이즈 조정회로.In a high-voltage generator circuit in which a flyback transformer (FBT) is driven by a horizontal drive signal and a power supply (B + ) to generate a high voltage, the power drawn from the switching mode power supply (SMPS) is biased (R 6 -R). 8 ) and a power supply to the primary side of the flyback transformer (FBT) through the resistor (R 1 ) (R 2 ), the variable resistor (VR 1 ) after being heavy through the transistor (Q 2 -Q 4 ) connected to B + ) is applied to the transistor Q 1 through the bias resistors R 3 and R 4 together with the power supplied to the variable resistor VR 1 through the vertical size adjustment stage P 3 . The vertical size adjustment circuit of the monitor using a flyback transformer, characterized in that configured to adjust the vertical size of the vertical deflection stage (P 4 ) through a variable resistor (VR 2 ) after driving.
KR2019880011983U 1988-07-25 1988-07-25 Vertical size control circuit for crt KR930003569Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019880011983U KR930003569Y1 (en) 1988-07-25 1988-07-25 Vertical size control circuit for crt

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019880011983U KR930003569Y1 (en) 1988-07-25 1988-07-25 Vertical size control circuit for crt

Publications (2)

Publication Number Publication Date
KR900003986U KR900003986U (en) 1990-02-08
KR930003569Y1 true KR930003569Y1 (en) 1993-06-19

Family

ID=19277790

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019880011983U KR930003569Y1 (en) 1988-07-25 1988-07-25 Vertical size control circuit for crt

Country Status (1)

Country Link
KR (1) KR930003569Y1 (en)

Also Published As

Publication number Publication date
KR900003986U (en) 1990-02-08

Similar Documents

Publication Publication Date Title
US5010281A (en) High voltage stabilization circuit for video display apparatus
KR930004007B1 (en) Horizontal deffection circuit
CN1066884C (en) Voltage regulator for CRT electrode supply
KR930003569Y1 (en) Vertical size control circuit for crt
KR100190165B1 (en) Broad-band high-voltage regulation circuit
JP2573940B2 (en) Deflection device
US4028589A (en) Circuit arrangement in a television receiver, provided with a line deflection circuit and a switched supply voltage circuit
GB2278985A (en) Deflection apparatus for raster scanned CRT displays
KR0140989B1 (en) Power supply protection circuit
KR920006547Y1 (en) Laster horizontal center control circuit
KR100242838B1 (en) Circuit for controlling horizontal size for display apparatus
KR960003379Y1 (en) Electric power stabilization circuit
KR930000450Y1 (en) High voltage stabilization circuit for display device
KR910003172B1 (en) Horizontal deflection circuit
JP2599790B2 (en) Horizontal deflection circuit
KR100261797B1 (en) Flat type crt
KR100274429B1 (en) High voltage circuit of display apparatus
KR930002315Y1 (en) Horizontal size stabilization circuit
KR100281382B1 (en) Monitor high voltage generation circuit
KR910003655Y1 (en) High voltage stabilization circuit for tv and monitor
JP3339294B2 (en) Horizontal deflection high voltage generation circuit
JPH0212768Y2 (en)
KR910001465Y1 (en) Deflecting voltage sourse compensating circuit of multi-horizontal frequency
KR0164971B1 (en) Horizontal drive circuit of video display apparatus
KR910000532Y1 (en) High voltage automatic control circuit

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19981216

Year of fee payment: 7

LAPS Lapse due to unpaid annual fee