KR930001759A - Cavity Printing Board - Google Patents

Cavity Printing Board Download PDF

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Publication number
KR930001759A
KR930001759A KR1019910009604A KR910009604A KR930001759A KR 930001759 A KR930001759 A KR 930001759A KR 1019910009604 A KR1019910009604 A KR 1019910009604A KR 910009604 A KR910009604 A KR 910009604A KR 930001759 A KR930001759 A KR 930001759A
Authority
KR
South Korea
Prior art keywords
package
cavity
printing board
lead
substrate
Prior art date
Application number
KR1019910009604A
Other languages
Korean (ko)
Inventor
공병식
Original Assignee
정몽헌
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 정몽헌, 현대전자산업 주식회사 filed Critical 정몽헌
Priority to KR1019910009604A priority Critical patent/KR930001759A/en
Publication of KR930001759A publication Critical patent/KR930001759A/en

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Abstract

내용 없음No content

Description

캐비티형 인쇄기판Cavity Printing Board

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도 (가)는 본발명의 인쇄기판 단면도, (나)는 본발명의 인쇄기판 평면도, (다)는 제2도 (가)의 A부 확대도, (라)는 제2도 (가)의 B부 확대도.2 (a) is a cross-sectional view of the printed board of the present invention, (b) is a plan view of the printed board of the present invention, (c) is an enlarged view of part A of FIG. 2 (a), and (d) is a Part B enlarged view of).

Claims (3)

기판(50)에 패키지가 실장될 정도의 캐비티(51)를 형성하고, 캐비티(51) 주연부위에서 패키지의 리드와 회로패턴이 접속되도록 구성함을 특징으로 하는 인쇄기판.And a cavity (51) to the extent that the package is mounted on the substrate (50), and the lead and the circuit pattern of the package are connected at the periphery of the cavity (51). 제1항에 있어서, 패키지가 SOJ(SMALL OUT-LIME J-FORM PACKAGE)타입 패키지(30)일 때, 회로패턴(60)이 캐비티(51) 주연(53)에서 패키지(30)의 리드(35)와 접속되도록 구성함올 특징으로 하는 인쇄기판.The circuit pattern 60 is a lead 35 of the package 30 at the periphery 53 of the cavity 51 when the package is a SOJ (SMALL OUT-LIME J-FORM PACKAGE) type package 30. A printed circuit board, characterized in that to be connected to 제1항에 있어서, 패키지가 SOP(SMOLL OUT-LIME PACKAGE)타입 패키지(31)일 때 회로패턴(61)이 캐비티(51)를 형성하는 기판(50)의 상부주연에 형성되어 패키지(31)의 리드(36)와 접속되도륵 구성함을 특징으로 하는 인쇄기판.The package 31 according to claim 1, wherein when the package is a SOP (SMOLL OUT-LIME PACKAGE) type package 31, a circuit pattern 61 is formed on the upper periphery of the substrate 50 forming the cavity 51. A printed circuit board configured to be connected to a lead (36) of the substrate. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910009604A 1991-06-11 1991-06-11 Cavity Printing Board KR930001759A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910009604A KR930001759A (en) 1991-06-11 1991-06-11 Cavity Printing Board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910009604A KR930001759A (en) 1991-06-11 1991-06-11 Cavity Printing Board

Publications (1)

Publication Number Publication Date
KR930001759A true KR930001759A (en) 1993-01-16

Family

ID=67440691

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910009604A KR930001759A (en) 1991-06-11 1991-06-11 Cavity Printing Board

Country Status (1)

Country Link
KR (1) KR930001759A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010107916A (en) * 1998-08-31 2001-12-07 사토 게니치로 Semiconductor device and substrate for semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010107916A (en) * 1998-08-31 2001-12-07 사토 게니치로 Semiconductor device and substrate for semiconductor device

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Legal Events

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A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application