KR930000299Y1 - Recording/playing circuit of still - Google Patents

Abstract

No content.

Description

Still image recording / reproducing circuit

1 is a conventional block diagram.

2 is a block diagram of the present invention.

3 is a timing diagram according to positioning of insertion information.

4 is a diagram illustrating a memory state display state change according to a change in size of insertion information.

* Explanation of symbols for main parts of the drawings

1: Decoder 2: Line Sequence Switch

3: modulator 4: mechanism control

5: record / playback floppy disk 6: demodulator

7: color sequence recovery unit 8: encoder

9: Path selector switch 10: Disk selector switch

11: playback floppy disk 12: switching circuit

13: character, picture input device 14: memory

15: memory driver 16: position and size determination unit

The present invention relates to an image processing circuit, and more particularly, to a still image recording / reproducing circuit capable of rewriting after adding a character or a picture according to a taste of a user in a still image.

In general, as the demand for copying is increased by adding arbitrary characters, symbols, and pictures desired by the user to the image information recorded on the disk, the desired information can be recorded by the still image recording format that has been applied until now. In this case, various problems due to the limitation of capacity have occurred.

First, referring to FIG. 1, the conventional still picture recording / reproducing circuit operation will be described. In the recording, the composite video signal is converted into Y, R-Y, and B-Y by the decoder 1.

The R-Y and B-Y signals are converted into a linear sequence by the linear sequence switch 2, then modulated by the modulator 3, and then transmitted to a floppy disk driver (hereinafter referred to as FDD) to write a disc.

At the time of reproduction, the modulated luminance and color signals Y _FM and C _FM outputted by the FDD 5 are demodulated through the demodulator 6, and the serial sequence recovery unit 7 performs the serial sequence synchronization operation to the encoder 8. It is reproduced as a composite video signal.

However, the conventional method as described above has a disadvantage in that sufficient data or information can be recorded by the user using a user area, but its capacity is limited to less than 27 bits so that sufficient information cannot be recorded.

Accordingly, an object of the present invention is to provide a still picture recording / reproducing circuit that can add picture or text information to a luminance signal during dubbing regardless of the limit of the recording capacity.

Hereinafter, with reference to the accompanying drawings of the present invention.

2 is a configuration diagram of a still picture recording / reproducing circuit according to the present invention, and includes a reproduction-only FD 11, an information input unit 13 for inputting picture and character information for insertion into a luminance signal, and the input information. A memory 14 for storing the memory 14, a memory driver 15, a position and size determiner 16 for controlling the memory driver 15 by determining the position and size of the insertion information, and a reproduction mode and a dubbing mode. A disk sequential recovery section for synchronously synchronizing the output of the demodulator 6 and the demodulator 6 connected to the disk switching switch 10, the disk switching switch 10 operating in accordance with the switching state to select a disk driver. (7), the switching circuit section 12 for switching the Y or RY and BY outputs of the character or picture information to be inserted from the memory 14 and the demodulator 6 and the linear sequential recovery section 7, and the An encoder for outputting a composite video signal from the output of the switching circuit unit 12 (8) and the path switching switch 9 for selectively outputting the output of the switching circuit section 12 or the decoder 1 in accordance with the dip mode switching state, and the path switching switch 9 outputs in a sequential order. To a modulator 3 that modulates a pre-sequence switch 2, the RY and BY outputs of the pre-sequence switch 2, and the Y signal output of the path switching switch 9 and supplies them to the recording and reproduction FDD 5; 3 is a timing relationship diagram according to the positioning of the insertion information, which is a vertical synchronization signal and a horizontal synchronization signal waveform added to the lower left and lower right of the screen.

4 is an exemplary diagram showing display according to a change in the size of a signal (insertion information) to be added, and (4a) shows a state in which memory contents of the original size are displayed by driving with a normal memory readout clock. When 4a) is reduced by 1/2, the horizontal readout output drive at 2x speed and the even line in the vertical direction are displayed.

Based on the above-described configuration will be described the present invention in detail.

In FIG. 2, when a disc having an original image recorded therein is inserted into the reproduction FDD 11, and then the reproduction FDD 11 is operated, a modulated recorded image signal is supplied to the demodulator 6 and the demodulator 6 Demodulates this signal into Y, RY, and BY signals, and doubles the RY and BY signals through the sequential recovery section 9, and then synchronizes the sequential order through the switching circuit section 10, and then the encoder 8 and the path switching switch. It is supplied to (9).

The composite video signal passed through the encoder 8 is displayed by an image display device such as a TV, and the signal supplied to the path switching switch 9 is modulated again and recorded on another disc by the FDD 5 for reproduction recording. do.

In the dubbing of the disc as described above, the video signal reproduced from the reproduction FDD 5 is controlled by the switching circuit unit 12 by the contents of the memory 14 in which characters or pictures input by the user are recorded. An arbitrary figure or the like desired by the editor can be added to and displayed on the disc, and a video signal with a character or figure added thereto can be recorded on the disc.

In this case, the character and picture input device 13 connected to the memory 12 may allow a user to input arbitrary letters or figures by using a charging plate and an electronic pen in the form of a dot matrix. The sizing unit 16 controls the video signal to be applied to the video signal with a suitable size at a proper position in the screen based on the vertical (V) and horizontal (H) synchronization signals.

Here, the timing relationship at the time of positioning by the position and size determiner 14 is as shown in FIG. 3, and the magnitude change of the signal to be added as shown in FIG. Is faster than the switching speed (normal memory driving speed during 1H), and the vertical size change is made by displaying the contents of the memory while skipping by 1H.

As described above, the present invention has the advantage of being able to rewrite after adding information such as a character or a picture to a still image regardless of the storage capacity.

Claims (1)

An image processing circuit comprising: a reproduction FDD 11 for reproducing luminance and color signals from a disc on which a predetermined video is recorded; a decoder 1 for converting a composite video signal into Y, RY, and BY; A pre-sequence switch 2 for converting the BY signal into a linear sequence form, and a modulator for generating a luminance signal and a color signal (Y _FM , C _FM ) by modulating the Y signal and the RY and BY signals converted into the linear sequence form ( 3) and read out the luminance signal and the color signal from the recording and reproducing FDD 5 for recording the luminance signal and the color signal or reproducing the recorded signal, and from the recording and reproducing FDD 5 or the reproducing FDD 11; A demodulator 6 that demodulates the RY and BY and Y signals in a linear sequence form; a linear sequence recovery unit 7 for returning the linear sequences RY and BY to RY and BY in their original state; An encoder 8 for encoding a RY and BY signal in its original state and outputting a composite video signal to the luminance signal. A character picture input unit 13 for inputting character or picture information to be inserted, a memory 14 for storing the character or picture information, and a positioning determiner 16 for determining a display position and size of the character or picture. And Y, RY, BY signals provided from the memory driver 15 for driving the memory 14 according to the position and size determination state, and from the demodulator 6 and the sequential recovery unit 7. A switching circuit section 12 and a regeneration mode or dubbing mode setting state for transmitting to the encoder 8 or switching to insert character or picture information to be inserted from the memory 14 into the Y, RY and BY signals. A path switching switch 9 for selectively outputting the output of the decoder 1 or the switching circuit unit 12 in accordance with the < RTI ID = 0.0 > F And a disk switching switch (10) for transmitting a signal read out from the DD (5) to the demodulator (6).