JP2644506B2 - Image processing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus, and more particularly to an apparatus for processing an image signal in which a signal lack such as dropout occurs.

[Conventional technology]

Conventionally, for example, a signal accompanied by dropout (lack of signal) such as a signal like a video signal reproduced from a magnetic recording medium such as a magnetic disk or a magnetic tape is once generated.
An apparatus has been developed which stores the image data in an image memory and then transmits the image data using a telephone line or the like.

In such an apparatus, when it is detected that a dropout has occurred using, for example, an IH delay line by using the correlation of the image in order to compensate for the above-mentioned dropout, the missing part is automatically replaced with the previous line. Some were being replaced with signals.

[Problems to be solved by the invention]

However, according to the above-described conventional example, when a relatively long dropout of two or more lines occurs in the reproduction signal, all the lines in which the dropout has occurred are interpolated by the previous line immediately before the occurrence of the dropout. There was a problem of giving a sense of incongruity.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an image processing apparatus which can solve such a problem and can perform good dropout compensation.

[Means for solving the problem]

In order to achieve the above object, an image processing apparatus according to the present invention is configured to input an image signal, detect whether a dropout has occurred in the input image signal, and output a dropout detection signal. Detecting means, converting means for converting the input image signal into digital image data having a predetermined number of bits and outputting the digital image data, and a dropout detection signal output from the detecting means among image data output from the converting means Image storage means for adding and storing dropout information data indicating that the data is a dropout, to image data corresponding to a period indicating that a dropout has occurred,
Means for reading image data stored in the image storage means and performing a dropout compensation process on the read image data, wherein dropout occurs in the image data read from the image storage means. Image data to which dropout information data indicating that the image data has been added, a dropout of a plurality of image data corresponding to an image positioned near the screen of the image indicated by the image data has occurred. Forming interpolated image data for interpolating the image data in which the dropout has occurred using the image data to which the dropout information data indicating that the dropout has not been added,
Drop-out compensation processing means for interpolating image data in which drop-out has occurred, read out from the image storage means by the formed interpolation image data.

[Operation] In the above configuration, when reading out the image data stored in the image storage means and performing the dropout compensation process on the read out image data, the image data read out from the image storage means For image data to which drop-out information data indicating that drop-out has occurred is added, among a plurality of image data corresponding to an image located near the screen of the image indicated by the image data, Forming interpolated image data for interpolating the image data in which the dropout has occurred by using the image data to which the dropout information data indicating that the dropout has not occurred is formed. The image in which dropout is read out from the image storage means due to the interpolated image data For interpolating data, it is possible to perform optimum dropout compensation processing.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of a still image reproducing apparatus to which the present invention is applied. In the illustrated magnetic sheet 1, video signals in units of one field are recorded on concentric tracks. The magnetic sheet 1 is rotationally driven by a motor drive circuit 30. The reproduction heads 2A and 2B are in-line type heads, and perform field reproduction or frame reproduction. The reproduction RF signals reproduced from the reproduction heads 2A and 2B are supplied to the A terminal and the B terminal side of the switch circuit 29 which is switched and controlled by the CPU 14, respectively.

The output signal of the switch circuit 29 is passed through the reproduction amplifier 4
The reproduced luminance signal Y,
A color difference line sequential signal RY / BY horizontal synchronizing signal HS, a vertical synchronizing signal VS, a dropout detection signal DOP generated in response to a lack of a reproduction envelope (dropout), and a signal for discriminating a color or monochrome of a reproduction video signal are formed. Is done.

The reproduction process circuit includes an envelope detection circuit that detects the envelope of the output of the amplifier 4 to detect a dropout, a synchronization signal separation circuit that extracts a horizontal and vertical synchronization signal from the output of the amplifier 4, and a color signal level detection circuit. And a circuit for determining whether the reproduced video signal is color or monochrome. Each of these circuits is publicly known and will not be described in detail.

The above-mentioned reproduction luminance signal Y is supplied to the image memory 6 and the adder 7
Respectively. Also, the reproduced color difference line sequential signal R-
Y / BY is supplied to the image memory and the NTSC encoder 8, respectively.

The NTSC encoder 8 is controlled to be energized or deenergized by the CPU 14, and supplies an NTSC signal from the output terminal 9 to the outside.

The horizontal synchronization signal HS generated by the reproduction process circuit 5,
The vertical synchronization signal VS and the dropout detection signal DOP are supplied to the memory control circuit 12, respectively. Also,
Although not shown in the figure, a magnetic piece for detecting a rotational phase is attached to the magnetic sheet 1. This magnetic piece is PG head 17
And a PG pulse is supplied to the CPU 14 and the motor drive circuit 30 via the amplifier 18.

The memory control circuit 12 controls the write / read operation of the image memory 6 according to a control signal from the CPU 14. The memory control circuit 12 performs write / read control via an address bus and a data bus in order to freeze the reproduced luminance Y signal and the color difference line-sequential signal RY / BY to the image memory 6.

The character generator 11 outputs the current track position information and the like to the adder 7 in response to the control signal from the CPU 14, and superimposes and displays the track position information and the like on the display screen.

The head driver 19 controls the movement of the heads 2A and 2B in the radial direction of the magnetic sheet 1 based on the track feed command control signal sent from the CTU 14.

The transmission circuit 15 converts the video data read from the image memory 6 into a transmission signal form (AM, FM signal, etc.) and outputs the converted signal to an unillustrated transmission line via the output terminal 16.

The following various switches 20 to 30 are connected to the CUP 14.

Switches 20 and 21 are up / down switches for controlling the movement of the heads 2A and 2B in the direction in which the track numbers increase or decrease, respectively. Switch 22 is image memory 6
This is a transmission start switch for transmitting the reproduced video signal read out from the transmission circuit 15 via the transmission circuit 15. In contrast,
The switch 23 is a transmission stop switch for interrupting the transmission operation.

A switch 30 is a transmission mode selection switch for selecting a transmission mode, and includes a switch 24 for selecting a monochrome field transmission mode, a switch 25 for selecting a monochrome frame transmission mode, and a switch 25 for selecting a color field transmission mode. 26 are included. The operations of the transmission mode switches 24 to 25 are mutually exclusive, and only one of the switches is selectively pressed.

The switch 27 is a switch for selecting a reproduction mode (field reproduction or frame reproduction). According to the setting of the switch, the CPU 14 fixes the switch circuit 29 to either the A terminal side or the B terminal side, Alternatively, it is determined whether the switching is performed alternately for each field.

The switch 28 is connected to the NTSC encoder 8 via the NTSC encoder 8 described above.
This is a switch for selecting whether or not to output a signal.

The LED (light emitting diode) 13 is a transmission busy display LED that indicates that transmission is being performed (the transmission circuit 15 is operating).

The above-mentioned image memory 6 needs an image storage area for freezing the luminance signal Y and the color difference line-sequential signal RY / BY by one field or one frame.

FIG. 2 is a schematic diagram showing a storage area of an image memory. In this figure, the image of one field is horizontally
An example is shown in which the memory is configured to have a resolution of 640 pixels and 256 pixels in the vertical direction.

FIG. 3 is a diagram showing a recording format of a luminance signal in the image memory 6. Here, Y _{a, b} represents the luminance signal of the b-th pixel from the top and the a-th pixel from the left of the line. D _n represents the drop-out information of the n-th line. That is, in the luminance signal storage area, dropout information is written in the last pixel (640th pixel) in the horizontal direction in place of the luminance signal.

4 is a diagram showing the bit assignment of the dropout information D _n shown in FIG. 3. In this embodiment, the last one bit (LSB) of the eight bits constituting the image data for one pixel is assigned as a bit representing "dropout information". When this bit (LSB) is cleared to "0", it indicates that there is no dropout in the line, and when set to 1, it indicates that there is a dropout in the line. In addition,
Although only one bit is used in FIG. 4, the present invention is not limited to this. For example, a bit indicating the presence of a dropout may be allocated to all bits. Further, the presence or absence of the dropout of each line may be written in a memory other than the image memory.

Next, a writing procedure according to the recording format shown in FIG. 3 will be described.

During writing to the image memory 6, the reproduction process circuit 5
When the drop-out detection signal DOP is sent to the memory control circuit 12, the memory control circuit 12 replaces the reproduced luminance signal Y with digital data representing 255 levels (the highest level when quantizing with 8 bits). Write to pixel position (pixel position where dropout occurs).

By performing such processing, the image memory 6 contains both the above-mentioned 255-level data representing a dropout and the true 255-level data obtained by A / D-converting the reproduced luminance signal Y. the presence or absence of dropout information D _n as shown in FIG. 4, it is possible to determine whether the true reproduced luminance signal. However, when these two 255 levels coexist on the same line, the position of the dropout may be erroneously determined, but generally, the reproduction luminance signal Y of the highest level (255 level) is input. This rarely occurs, and even if an erroneous determination is made, only the interpolation described below is performed, so that significant image quality deterioration cannot be caused.

FIG. 5 is a block diagram showing a detailed configuration of a main part of the memory control circuit 12, and FIG. 6 is a block diagram showing an entire configuration of the image memory 6 and a partial configuration of the memory control circuit.

In FIG. 5, input terminals 125, 126 and 127 are supplied with a drop-out detection signal DOP, a horizontal synchronizing signal HS and a vertical synchronizing signal VS supplied from the reproduction process circuit 5, respectively. Then, a write signal WP synchronized with the horizontal synchronizing signal HS is generated by the write signal generator 123 and sent out from the output terminal 12A to the image memory 6.

The address generator 124 appropriately generates a memory address signal ADRS based on the write signal WP, the horizontal synchronization signal HS, and the vertical synchronization signal VS supplied from the write signal generator 123, and sends the memory address signal ADRS to the image memory 6 via the bus 12C. Supply.

Further, the address generator 124 outputs the memory address signal ADRS
And the signal representing the last pixel position in the line
LE is generated and transmitted to the image memory 6 via the output terminal 12B. This signal LE is also supplied to the output control gates of the buffer amplifiers 121 and 122 provided in the memory control circuit 12.

A dropout detection signal DOP is introduced from the reproduction process circuit 5 to the input terminal of the buffer amplifier 121, and a dropout detection signal DOP2 is supplied from the output terminal 128 to the image memory 6 except for the last pixel position in the line. The output of the buffer amplifier 121 is prohibited at the last pixel position.

The set / reset type flip-flop 120 is reset by the horizontal synchronizing signal HS, and the drop-out detection signal DO
Set by P. Therefore, this flip flop 1
20 stores information indicating whether or not a dropout has occurred in the line.

The output signal of the set / reset flip-flop 120 is introduced to a buffer amplifier 122. Then, in response to the transmission of the signal LE indicating the last pixel position, the drop-out information DOD is supplied from the output terminal 129 to the image and the memory 6.

As shown in FIG. 6, the luminance / color difference signals supplied from the reproduction process circuit 5 are input to a plurality of buffer amplifiers 63 (not shown) via an input terminal 60, a low-pass filter 61, and an A / D converter 62. . This A / D converter 62
Write signal supplied from memory control circuit 12
Performs analog / digital conversion operation in synchronization with WP. Further, the buffer amplifier 63 outputs the drop-out detection signal DOP2.
Alternatively, the output of the A / D converter 62 is inhibited in response to one of the signals LE indicating the last pixel position in the line. Therefore, when the output from the buffer amplifier 63 is inhibited by the signal LE, the signal DOD is output via the buffer amplifier 68.
(Dropout information) is supplied to the memory 60. In other words, when the signal LE is generated, dropout information DOD is written instead of the video signal. On the other hand, when the output from the buffer amplifier 63 is inhibited by the dropout detection signal DOP2, the highest level data ("255" level in the case of 8 bits) by the action of the pull-up resistor 6E.
Is written to the memory 69. Although not shown in FIG. 6, a plurality of buffer amplifiers 63 and 68 and a plurality of pull-up resistors are provided, and when a dropout occurs, the highest level data is written in response to the LE signal.

A data bus from the CPU 14 is connected to the bidirectional buffer circuit 6B, and a control signal line from the CPU 14 is connected to the input terminal 6D, so that the CPU 14 can access the memory 69. The address bus of the memory 69 is configured to be switched by the switching circuit 130 between the address bus ADRC from the CPU and the address bus ADRS from the address generator 124. This switching is performed by a control signal 6E from the CPU.

FIG. 7 shows an overall routine for starting and ending the head feeding and transmission operation. When the power is turned on,
The transmission flag TX.FLG is reset to "0" and the interrupt mask flag IRQMSK is set to "1" (step 7-).
1). TX.FLG is set to "1" during transmission, and is cleared to "0" when not transmitting. Also IR
QMSK disables the transmission interrupt routine with “1”,
It starts with “0”. When the up switch 20 is pressed (S7-2), the heads 2A and 2BS are sent in the direction in which the track number increases (S7-4), and the track number held in the CPU 14 is incremented (S7-5). At this time, either the field reproduction or the frame reproduction is selected as the reproduction mode according to the mode selection switch 27. In addition, according to the increment of the track number in step S7-5, the monitor device 10 In order to update the display of the track number, the display track number data of the character generator 11 is also changed.

If the up switch 20 is not closed in step S7-2, it is checked whether the down switch 21 is closed (S7-3). If the down switch 21 is closed, step S7 is performed.
The head is sent in the direction of decreasing the track number in the opposite direction from S-4 and S7-5 (S7-6), and the track number of the CPU 14 is decremented by 1 (S7-7). The display track number data of the character generator 11 is also changed according to the decrement of the track number.

Next, the state of the transmission flag TX.FLG is determined in step S7-8, and if "0", that is, the non-transmission state, the flow branches to step S7-9 and below. If "1", that is, the transmission state, the step S7-. Branch to 15 or less.

In step S7-9, it is checked whether or not the transmission start switch 22 has been pressed, and if it has been pressed, the reproduction mode switch has been pressed.
Playback mode determined by 27 and transmission mode switches 24, 25,
In accordance with the transmission mode selected by 26, each signal is frozen (written) to the memory circuit 6 in the sections shown in Table 1.

Here, when the reproduction mode switch 27 designates the field regeneration, the memory M ₀ is stored the luminance signal Y, the memory M only when the transmission mode is the color field mode (switch 26) ₁ stores a color difference line sequential signal (RY) / (BY). Further, when a case where the reproduction signal is mono reproduction mode is a field monochrome frame mode (switch 25) is specified, it accommodates only the luminance signal of one field worth in the memory M _0. Despite also the actual reproduction signal is monochrome, when the color field transmission mode is set, does not write anything to the memory M ₁ containing only the luminance signal Y to the memory M _0.

When the playback mode switch 27 specifies frame playback, the odd field and the even field are played back repeatedly for each field.In the illustrated example, the field that appears after the transmission start switch 22 is pressed is displayed. Is taken in.

FIG. 8 and FIG. 9 schematically show how the field memories M ₀ and M ₁ accommodate video signals. Figure 8 shows the color
FIG. 9 shows a state in which field signals are stored, and FIG. 9 shows a state in which luminance signals for two fields of the frame signal are stored.

Returning to FIG. 7, when the memory freeze operation is completed in step 7-10, a dropout compensation routine (step 7-1) is executed.
Go to 1). Details of the compensation are shown in FIG.

First, in this compensation routine, the vertical address Y is reset to 0 (step 10-1), and the horizontal address X is detected in order to detect the dropout information in the 640th column shown in FIG.
The value 640 is substituted (step 10-2). Address (X, Y) value
Access to D _y, drop class tap out flag is detected whether "1" or "0" (STEP10-3), then branches to step10-18 If there is dropout increments the vertical address Y, the following Prepare for line detection. on the other hand,
If there is a dropout, the horizontal address X is set to 1 (step 10-4), and the level indicating the occurrence of the above-described dropout is sequentially detected from the left end pixel of the line (step 10-5). If no dropout has occurred, the process branches to step 10-16 and below, and the horizontal address X is incremented. If the pixel is a dropout pixel, the transmission mode is determined (step 10-6). As described in Table 1, the transmission mode is defined as the frame mode in which the Y signal is frozen in the memories M ₀ and M ₁ , and the other is in the field mode. For field mode, after setting the memory M ₀ (step10-7), appropriately selects a compensation algorithm in accordance with the dropout occurrence state is shown in FIG. 11 (a) ~ (d) ( step10-8). FIG. 11 is a diagram showing the state of occurrence of a dropout. The horizontal line shows a horizontal scanning line, and the following equation explains the compensation algorithm. In FIG. 11, the X line is the line to be compensated, and A and B indicate the lines adjacent to X, and the upper and lower symbols indicate the dropout state. ○ indicates that there is no dropout, and △ indicates a line for which the dropout has been already compensated and whose dropout flag shown in FIG. 3 is “1”. X represents a dropout uncompensated pixel. If dropouts do not occur in the upper and lower lines as shown in (a) but dropouts occur only in the X line, average interpolation of the upper and lower lines is performed, and the previous line pixel shown in (b) If so, the interpolation is performed on the next line with the highest reliability. If a dropout occurs in two lines X and B as shown in FIG. 7C, the compensation cannot be made in the next line, so the previous line interpolation is performed. The case shown in (d) is similar to the case shown in (b), but since the previous line has already been compensated, compensation is made again in the previous line.

Thus Upon completion of the dropout compensation memory M ₀ side, it is determined whether the color mode (step10-9), after setting the memory M ₁ if the color mode (step10-10), 12
Dropout compensation of the line-sequential color difference signal is performed by the algorithm shown in the figure (steps 10-11).

In FIG. 12, as in FIG. 11, the compensating operation is performed using the same type of color difference signals among the color difference signals which are line sequential two lines apart. Note that E and F indicate lines adjacent to X, but signals different in type from the color difference signals of the lines A, X, and B are recorded in these lines, so that they are used for the compensation operation. Not in.

On the other hand, the vertical line address Y if it is determined that the frame mode is to determine odd lines or even lines in step10-6 (step10-12), the memory of Y _o as described in Table 1 in the case of the odd lines Set (read out) (step
10-13), to memory set (read as Y _E in the case of even-numbered lines) (Step10-14). When the setting of the memory is completed, the compensating operation is performed by the algorithm shown in FIG. 13 (step 10-15). In FIG. 13, solid lines A and B indicate upper and lower lines in the same field, and broken lines C and D indicate upper and lower lines (in other fields) when considered in a frame. Basically, compensation is made by at least one of the upper and lower lines of the frame ((a) to (c)). However, when the reliability of the upper and lower lines of the reverse field is low as in the case of (d), Compensation is performed within the same field shown in FIG.

Thus, when the compensation for one pixel is completed, the horizontal address X
Is incremented (step 10-16), and it is determined whether or not this is the last address 640 (step 10-17).
The routine below ep10-5 is repeated, and if it is 640, the vertical address Y is incremented (step 10-18), and step is repeated until the compensation of all the lines of the field or frame is completed.
Repeat steps 10-3 and below (step 10-19).

As described above, in step 7-11 shown in FIG. 7, the compensation for the dropout is performed. When the compensation is completed, the parameters for transmission are initialized (step 7-12). Here, the horizontal and vertical addresses X and Y in the transmission interrupt routine described later are set to 1, and a variable i representing the number of transmissions is determined according to Table 1. Next, the transmission flag TX.FLG is set to "1" (step 7-13), the mask flag IRQMSK for starting the transmission interrupt routine is cleared, and this is started.
Is turned on (step 7-14).

Next, in step 7-8, when it is determined that transmission is in progress, it is detected whether or not the transmission stop switch 23 has been pressed (step 7-15). If it has been pressed, the IRQMSK is set to "1" and transmitted. While interrupts are prohibited (step 7-1
6), clear TX.FLG and turn off the TX BYSY LED (st
ep7-17).

Thus, when the reproduction routine and the transmission routine are completed,
Returning to step 7-2, the above control is repeated.

FIG. 14 shows a flowchart of an interrupt routine for transmission. When the interrupt is started, the transmission data Di (X,
Y) to form from the memory M _0, M ₁ according to Table 1 (S14-
1). Incidentally, M'in Table 1 is obtained by the pseudo-frame to extend the frame luminance signal reproduced field, even in exactly the same contents as the memory M _0, it may be an average of about 2 lines.

When the transmission data Di (X, Y) is obtained in this way, it is supplied to the transmission circuit 15 (S14-2), converted into a signal form for transmission, and output from the output terminal 16. When the transmission of one data is completed, the horizontal address X is incremented by 1 (S14-3), and the result is the maximum horizontal address value 640.
If it is below (S14-4), the interrupt routine is ended. If it is larger than 640, it means that data transmission for one line has been completed, so X is set to 1 (S14-5), and the vertical address Y is incremented by 1 (S14-6). If Y is equal to or less than the last line number, that is, 256 or less, the interrupt routine is terminated (S14-7). S14-9). The variable i is compared with a parameter I representing the number of transmission fields (S14-1).
0), if I or less, the interrupt is terminated, and if it is greater than I, transmission of a predetermined field has been completed.
Set IRQ.MSK to 1 to disable subsequent interrupts (S14
-11), the transmission flag TX.FLG is reset to 0 (S14).
-12).

In the above-described embodiments, the drop-out information is written in the luminance signal image memory. However, similar drop-out information can be written in the color difference signal image memory.

Although a magnetic disk is shown as a recording medium, the present invention is not limited to this, and various media can be used.

In the present embodiment, an image memory of 640 (horizontal) × 256 (vertical) is used, but a desired image memory can be used according to the number of pixels of the image size.

Further, the replacement data when a dropout occurs does not need to be limited to the "255" level, and any other value can be set. In addition, the write-out position of the drop-out information does not need to be the last pixel position in the horizontal direction, but may be an arbitrary position such as the first pixel.

Also, the drop-out information is directly written at a specific level on the image memory, but the present invention is not limited to this. Even if the memory for the drop-out flag corresponding to the address of the image memory is set in order to know the drop-out position. The present invention is applicable.

As described above, in the embodiment described above, the signal absence of the image signal reproduced from the magnetic sheet 1 as the recording medium is detected by the dropout detection circuit in the reproduction process circuit 5 in FIG. 1, but the present invention is not limited to this. Not limited,
For example, the present invention can be applied to any signal that causes a dropout in the middle of a transmission path without being accompanied by reproduction from a recording medium.

In this embodiment, the control means for determining the interpolation algorithm for the missing part in accordance with the lacking state near the signal missing part includes steps 10-7, step 10 of the flowchart shown in FIG.
In steps 10-11 and steps 10-15, the compensation shown in FIGS. 1 to 13 is performed.

The interpolation algorithm of this embodiment is an example, and the present invention is not limited to this, and various modifications are possible.

〔The invention's effect〕

As described above, according to the present invention, the image data to which the dropout information data indicating that the dropout has occurred is added near the image indicated by the image data on the screen. The image data in which the dropout has occurred is interpolated using the image data to which the dropout information data indicating that no dropout has occurred has been added among the plurality of image data corresponding to the image to be dropped. Image data for dropout read out from the image storage means is interpolated by the formed interpolation image data, especially when dropout occurs over a plurality of lines. Optimum that can perform interpolation processing well and suppresses visual image deterioration due to interpolation. There is an effect that it is possible to perform the drop-out compensation processing.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the overall configuration of an image processing apparatus according to one embodiment of the present invention, FIGS. 2 and 3 are diagrams for explaining the memory configuration of the embodiment, FIGS. 4, 5, and 6. FIG. 7 is a view for explaining a hardware configuration for writing drop-out information. FIG. 7 is an overall flow chart of the apparatus of this embodiment. FIGS. 8 and 9 are schematic views showing information written to the memory when the memory is frozen. 10 to 13 are diagrams for explaining an algorithm for drop-out compensation according to an embodiment of the present invention, and FIG. 14 is a diagram for explaining a transmission interrupt routine. 1 ... magnetic sheet 6 ... image memory 10 ... monitor circuit

Claims (1)

(57) [Claims] A detecting means for receiving an image signal, detecting whether a dropout has occurred in the input image signal, and outputting a dropout detection signal; A conversion unit that converts the digital image data into digital image data having the number of bits, and outputs the digital image data. The dropout detection signal output from the detection unit out of the image data output from the conversion unit indicates that a dropout has occurred. The image data corresponding to the time period, the image storage means for adding and storing dropout information data indicating that the data has been dropped out, the image data stored in the image storage means Means for performing a drop-out compensation process on the read and read image data, and read out from the image storage means. For image data to which dropout information data indicating that a dropout has occurred among image data, a plurality of images corresponding to an image located near the screen of the image indicated by the image data are provided. Forming interpolated image data for interpolating the image data in which the dropout has occurred using image data to which dropout information data indicating that no dropout has occurred in the data is added. And
An image processing apparatus comprising: a dropout compensation processing unit that interpolates image data in which a dropout is read from the image storage unit by the formed interpolation image data.