KR920020901A - Low Level Processor Loading Method of Electronic Switching System - Google Patents

Low Level Processor Loading Method of Electronic Switching System Download PDF

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Publication number
KR920020901A
KR920020901A KR1019910005885A KR910005885A KR920020901A KR 920020901 A KR920020901 A KR 920020901A KR 1019910005885 A KR1019910005885 A KR 1019910005885A KR 910005885 A KR910005885 A KR 910005885A KR 920020901 A KR920020901 A KR 920020901A
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KR
South Korea
Prior art keywords
loading
pbooter
signal
receiving
processor
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Application number
KR1019910005885A
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Korean (ko)
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KR940000453B1 (en
Inventor
한태만
조주현
김화성
임동선
Original Assignee
경상현
재단법인 한국전자통신연구소
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Priority to KR1019910005885A priority Critical patent/KR940000453B1/en
Priority to US08/107,855 priority patent/US5404130A/en
Priority to PCT/US1992/003457 priority patent/WO1992019467A2/en
Publication of KR920020901A publication Critical patent/KR920020901A/en
Application granted granted Critical
Publication of KR940000453B1 publication Critical patent/KR940000453B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/22—Arrangements for supervision, monitoring or testing
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60Q—ARRANGEMENT OF SIGNALLING OR LIGHTING DEVICES, THE MOUNTING OR SUPPORTING THEREOF OR CIRCUITS THEREFOR, FOR VEHICLES IN GENERAL
    • B60Q1/00—Arrangement of optical signalling or lighting devices, the mounting or supporting thereof or circuits therefor
    • B60Q1/26—Arrangement of optical signalling or lighting devices, the mounting or supporting thereof or circuits therefor the devices being primarily intended to indicate the vehicle, or parts thereof, or to give signals, to other traffic
    • B60Q1/44—Arrangement of optical signalling or lighting devices, the mounting or supporting thereof or circuits therefor the devices being primarily intended to indicate the vehicle, or parts thereof, or to give signals, to other traffic for indicating braking action or preparation for braking, e.g. by detection of the foot approaching the brake pedal
    • B60Q1/445—Arrangement of optical signalling or lighting devices, the mounting or supporting thereof or circuits therefor the devices being primarily intended to indicate the vehicle, or parts thereof, or to give signals, to other traffic for indicating braking action or preparation for braking, e.g. by detection of the foot approaching the brake pedal controlled by inertial devices

Abstract

내용 없음.No content.

Description

전전자 교환기의 하위레벨 프로세서 로딩방법Low Level Processor Loading Method of Electronic Switching System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명이 실행되는 하드웨어 구성도.1 is a hardware configuration diagram in which the present invention is implemented.

제2도는 본 발명의 로딩요구 과정을 나타내는 흐름도.2 is a flowchart showing a loading request process of the present invention.

제3도는 본 발명의 로딩요구 과정이 또다른 실시예를 나타내는 흐름도.3 is a flowchart showing another embodiment of the loading request process of the present invention.

제4도는 본 발명의 로딩수행과정을 나타내는 흐름도.4 is a flowchart showing a loading process of the present invention.

Claims (7)

시스템로더(OMPSL)를 내장하고 있는 메인보드(1)를 포함하여 구성된 유지보수 프로세서(OMP:100)와, 상기 유지보수프로세서(100)에 연결되며 로딩기능 수행프로그램(이하, PBOOTER라 함)을 내장한 메모리(16)를 포함하여 구성되는 하위레벨 프로세서 메인 보드(200)로 구성되는 전전자 교환기의 하위레벨 프로세서 로딩방법에 있어서, 유지보수프로세서(100)에 의한 로딩을 요구하는 제1단계, PBOOTER에서 하위레벨 운영체제(PPOS) 데이타를 수신하여 체크섬한 결과를 송신하는 제2단계, 상기 제2단계에서 체크섬한 결과를 비교하는 제3다계, PBOOTER에서 사용자 프로그램데이타를 수신하여 체크섬한 결과를 송신하는 제4단계, 상기 제4단계에서 체크섬한 결과를 비교후 스타팅 단계로 천이 하는 제5단계로 구성됨을 특징으로 하는 전전자 교환기의 하위레벨 프로세서 로딩방법.A maintenance processor (OMP: 100) configured to include a mainboard (1) having a built-in system loader (OMPSL) and a loading function performing program (hereinafter referred to as PBOOTER) connected to the maintenance processor 100. In the low-level processor loading method of the electronic switchboard consisting of the lower-level processor main board 200 including the built-in memory 16, the first step of requesting loading by the maintenance processor 100, A second step of receiving a checksum result by receiving lower-level operating system (PPOS) data from the PBOOTER; a third multi-step comparing the checksum result of the second step; and receiving a checksum by receiving user program data from the PBOOTER. And a fifth step of translating the result of the checksum in the fourth step to a starting step after the fourth step. Law. 제1항에 있어서, 상기 제 1단계는 프로세서의 상태를 체크하는(101,102) 제1과정, PBOOTER에서 프로세서의 상태를 응답하는(103) 제2과정, 프로세서간 통신로딩의 필요성을 결정한후(104) 프로세서간 통신로딩을 준비하는(105,106) 제3과정으로 구성됨을 특징으로 하는 전전자 교환기의 하위레벨 프로세서 로딩방법.The method of claim 1, wherein the first step includes: a first step of checking the state of the processor (101, 102); a second step of responding (103) to the state of the processor in the PBOOTER; A low level processor loading method of an electronic switching system, comprising: a third process of preparing (105, 106) inter-processor communication loading; 제1항에 있어서, 상기 제1단계는 PBOOTER에서 로딩 요구신호를 송신하면(108) 시스템로더에서 로딩준비를 하는 제1과정, 시스템로더(OMPSL)에서 로딩허용 신호를 보내면(110) PBOOTER에서 로딩허용신호를 수신하여(111)로딩수행준비 상태로 천이하는(112) 제2과정으로 구성됨을 특징으로 하는 전전자 교환기의 하위레벨 프로세서 로딩방법.The method of claim 1, wherein the first step comprises the first step of preparing the loading in the system loader when the loading request signal is transmitted from the PBOOTER (108), and the loading in the PBOOTER (110) when the loading permission signal is transmitted from the system loader (OMPSL) (110). And a second process of receiving the allowable signal (111) and transitioning (112) to a loading ready state. 제2항 또는 제3항에 있어서, 상기 제2단계는 시스템로더에서 하위레벨운영체제(PPOS)의 헤더(Header)신호를 송신하면 PBOOTER에서 상기 하위레벨 운영체제의 헤더신호를 수신하는(201,202) 제1과정, 상기 시스템로더에서 상기 하위레벨운영체제의 코드 신호와 함께 데이타를 전송하면 PBOOTER에서 데이타를 저장하는 (203,204) 제2과정, 상기 하위레벨운영체제의 로딩종료신호를 수신하여 체크섬을 계산, 그 결과를 상기 시스템로더에 송신하는(205,206) 제3과정으로 이루어짐을 특징으로 하는 전전자 교환기의 하위레벨 프로세서 로딩방법.The method of claim 2 or 3, wherein the second step comprises receiving a header signal of the lower level operating system from the PBOOTER (201, 202) when the system loader transmits a header signal of the lower level operating system (PPOS). Process, when the system loader transmits data together with the code signal of the lower level operating system (203, 204), storing data in the PBOOTER; and receiving a loading end signal of the lower level operating system, calculating a checksum, and calculating the result. And (205, 206) a third process for transmitting to the system loader. 상기 제2항 또는 3항에 있어서, 상기 제3단계는 PBOOTER측에서 사용자 프로그램 헤더신호를 수신하였나를 판단하는(207) 제1과정, PPOS로딩 실패신호가 도착하였으면 부팅처음 상태로 천이하고 그렇지 않으면 사용자 프로그램 헤더 신호를 수신한 것으로 간주하는 (208,209) 제2과정으로 구성됨을 특징으로 하는 전전자 교환기의 하위레벨 프로세서 로딩방법.The method of claim 2 or 3, wherein the third step is to determine whether the PBOOTER side has received the user program header signal (207). When the PPOS loading failure signal arrives, the process proceeds to the booting first state. And (208, 209) a second process of considering the user program header signal as being received. 제2항 또는 3항에 있어서, 상기 제4단계는 PBOOTER에서 사용자 프로그램 코드신호 및 데이타를 수신하여(210) 상기 데이타를 해당메모리(16)에 저장하는(211) 제1과정, 사용자 프로그램 로딩종료신호를 수신하여 체크섬한 결과를 시스템로더에 송신하는(212,213) 제2과정으로 구성됨을 특징으로 하는 전전자 교환기의 하위레벨프로세서 로딩방법.[4] The process of claim 2 or 3, wherein the fourth step includes receiving user program code signals and data from the PBOOTER (210) and storing the data in the memory 16 (211). And a second process of receiving a signal and transmitting a checksum result to a system loader (212, 213). 제2항 또는 3항에 있어서, 상기 제5단계는 하위레벨운영체제(PPOS)의 로딩실패신호를 받았나 체크하는(214) 제1과정, 하위레벨 운영체제 로딩실패신호를 받으면 부팅처음상태로 천이하고 그렇지 않으면 스타티요절차로 천이하는(215,216) 제2과정으로 구성됨을 특징으로 하는 전전자 교환기의 하위레벨 프로세서 로딩방법.4. The method of claim 2 or 3, wherein the fifth step (step 214) checks whether a low level operating system (PPOS) loading failure signal has been received (214). Or (215, 216) a second process, which transitions to a procedure if not required. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910005885A 1991-04-12 1991-04-12 Low-hevel processor loading method in electronic exchange KR940000453B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019910005885A KR940000453B1 (en) 1991-04-12 1991-04-12 Low-hevel processor loading method in electronic exchange
US08/107,855 US5404130A (en) 1991-04-12 1992-04-27 Sudden-stop brake-light warning system
PCT/US1992/003457 WO1992019467A2 (en) 1991-04-12 1992-04-27 Sudden-stop brake-light warning system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910005885A KR940000453B1 (en) 1991-04-12 1991-04-12 Low-hevel processor loading method in electronic exchange

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KR920020901A true KR920020901A (en) 1992-11-21
KR940000453B1 KR940000453B1 (en) 1994-01-21

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WO (1) WO1992019467A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100228297B1 (en) * 1996-05-10 1999-11-01 윤종용 Loading error detecting method in base station

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202005012548U1 (en) * 2005-08-10 2005-10-27 Pommer, Fredi Alexander Inertia actuated electrical switch for automobiles has an inertial contact mass in a hole in housing

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3593278A (en) * 1968-05-29 1971-07-13 Frank D Bower Vehicle brake light system
US3760353A (en) * 1971-10-18 1973-09-18 Dv Displays Corp Emergency vehicular warning system
US3846749A (en) * 1973-02-01 1974-11-05 Massachusetts Inst Technology Vehicle brake light control system
US4663609A (en) * 1985-10-21 1987-05-05 Rosario George M Brake alert device
US4843368A (en) * 1987-04-10 1989-06-27 Poulos Vincent M Enhanced deceleration condition disclosing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100228297B1 (en) * 1996-05-10 1999-11-01 윤종용 Loading error detecting method in base station

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WO1992019467A2 (en) 1992-11-12
WO1992019467A3 (en) 1993-01-07
KR940000453B1 (en) 1994-01-21

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