KR920014301A - Tone Generator Using Microcontroller - Google Patents

Tone Generator Using Microcontroller Download PDF

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Publication number
KR920014301A
KR920014301A KR1019900022837A KR900022837A KR920014301A KR 920014301 A KR920014301 A KR 920014301A KR 1019900022837 A KR1019900022837 A KR 1019900022837A KR 900022837 A KR900022837 A KR 900022837A KR 920014301 A KR920014301 A KR 920014301A
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KR
South Korea
Prior art keywords
tone
signal
clock
microcontroller
data
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KR1019900022837A
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Korean (ko)
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KR930006542B1 (en
Inventor
김덕환
이형호
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경상현
재단법인 한국전자통신연구소
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Priority to KR1019900022837A priority Critical patent/KR930006542B1/en
Publication of KR920014301A publication Critical patent/KR920014301A/en
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Publication of KR930006542B1 publication Critical patent/KR930006542B1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q1/00Details of selecting apparatus or arrangements
    • H04Q1/18Electrical details
    • H04Q1/30Signalling arrangements; Manipulation of signalling currents

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Devices For Supply Of Signal Current (AREA)

Abstract

내용 없음No content

Description

마이크로 콘트롤러를 이용한 톤 발생장치Tone Generator Using Microcontroller

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 톤 발생장치의 블럭도, 제2도는 본 발명을 적용하여 신호음 데이터를 내장한 메모리 맵도, 제3도는 32 타임슬롯 신호 서브하이웨이에서의 톤 배정표시도.1 is a block diagram of a tone generating apparatus of the present invention, FIG. 2 is a memory map diagram incorporating beep data according to the present invention, and FIG. 3 is a tone allocation display in a 32 timeslot signal subhighway.

Claims (3)

스위치 네트워크로부터 신호 데이터의 동기를 맞추기 위해 타임슬롯의 첫번째를 표시하는 동기신호(FS)와 데이터 비트 단위의 클럭신호(CLK)를 공급받아 메모리 툭업 테이블 방법으로 톤을 발생시켜 서브하이웨이를 통해서 톤소스를 상기 스위치 네트워크로 송출하는 톤 발생장치에 있어서, 상기 스위치 네트워크로 부터 동기신호와 클럭신호를 공급받아서 각 내부 회로에 제공하는 클럭 분주회로(22), 상기 클럭 분주회로(22)에 연결되어 톤의 단속비를 제어하는 기능과 신호 서브하이웨이의 타임슬롯별 해당 톤소스를 배정하는 기능을 수행하는 마이크로 콘트롤러(19), 각각의 콘 종류별로 표본화된 펄스 코드 변조 데이커가 내장되어 있는 EP롬(17), 상기 EP롬(17)과 마이크로 콘트롤러(19)에 연결되어 상기 마이크로 콘트롤러(19)가 서브하이웨이의 타임슬롯별 해당 톤소스를 배정하기 위한 타임 슬롯정보와 톤 정보를 일시 저장하는데 사용되는 S램(16), 상기 EP롬(17)과 클럭분주회로(22)에 연결되어 상기 EP롬(17)에서 병렬로 발생되는 톤 데이터를 서브하이웨이와 정합시키기 위해 직렬 데이터로 변환하는 회로로서 상기 클럭 분주회로(22)의 신호에 따라 동기를 맞추어 동작하는 병렬/직렬 변환회로(18), 상기 EP롬(17)과 클럭분주회로(22)에 연결되어 상기 클럭분주회로(22)로 부터 신호를 받아 상기 EP롬에 내장된 톤 데이터를 룩업 테이블 방법을 읽어 내기 위해 요구되는 어드레스를 발생시키는 카운터회로(21) 및 상기 마이크로 콘트롤러(19)를 동작시키기 위한 클럭을 발생시켜 상기 마이크로 콘트롤러(19)로 제공하는 클럭발생기(20)를 구비한 것을 특징으로 하는 톤 발생장치.To synchronize the signal data from the switch network, a synchronization signal (FS) indicating the first of the timeslot and a clock signal (CLK) in data bit units are supplied to generate a tone using a memory look-up table method to generate a tone source through a subhighway. In the tone generating device for transmitting the signal to the switch network, the clock divider circuit 22 and the clock divider circuit 22 which receive the synchronization signal and the clock signal from the switch network and provide them to the internal circuits. Microcontroller (19) for controlling the intermittent ratio of the signal, assigning the corresponding tone source for each time slot of the signal subhighway, and EP-ROM (17) with pulse code modulation data sampled for each cone type. Is connected to the EP ROM 17 and the microcontroller 19 so that the microcontroller 19 is a time slot of the subhighway. S-RAM 16 used to temporarily store time slot information and tone information for allocating the corresponding tone source, and connected to the EP ROM 17 and the clock division circuit 22 in parallel in the EP ROM 17. A circuit for converting the generated tone data into serial data in order to match the subhighway, the parallel / serial conversion circuit 18 and the EP ROM 17 operating in synchronization with the signal of the clock division circuit 22; A counter circuit 21 connected to a clock divider circuit 22 for generating a signal received from the clock divider circuit 22 and generating an address required for reading a look-up table method for tone data embedded in the EP ROM; And a clock generator (20) for generating a clock for operating the microcontroller (19) and providing the clock to the microcontroller (19). 제1항에 있어서, 상기 EP롬의 메모리 맵의 구성을 톤 종류별 신호 주파수와 레벨 및 단속비를 상호 비교하여 주파수와 레벨이 동일하면서 단속비에 따라 구분되는 톤들에 대해서 메모리내에는 공통되는 한 종류의 톤 데이터만을 저장시키고, 상기 마이크로 콘트롤러(19)의 제어에 의해서 해당 톤의 단속주기를 수행하도록 한 것을 특징으로 하는 톤 발생장치.The memory map according to claim 1, wherein the structure of the memory map of the EP ROM is compared with each other by comparing the signal frequency, level, and interruption ratio of each tone type with respect to tones that have the same frequency and level and are classified according to the interruption ratio. Tone generation device characterized in that to store only the tone data of the, and to control the intermittent period of the tone under the control of the microcontroller (19). 제2항에 있어서, 상기 메모리 맵내에 영(null)신호 데이터를 저장하여 마이크로 콘트롤러가 제어하는 톤 단속 주기중 톤온 기간에는 해당 톤 데이터를 읽어서 내보내고, 톤 오프 기간에는 영신호 데이터 저장 영역을 읽어서 송출하도록 한 것을 특징으로 하는 톤 발생장치.3. The method of claim 2, wherein null signal data is stored in the memory map, and the tone data is read out during the tone on period during the tone intermittent period controlled by the microcontroller, and the zero signal data storage area is read out during the tone off period. Tone generating device, characterized in that. ※ 참고사항 : 최초출원내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.
KR1019900022837A 1990-12-31 1990-12-31 Apparatus for tone offered for microcontroller KR930006542B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900022837A KR930006542B1 (en) 1990-12-31 1990-12-31 Apparatus for tone offered for microcontroller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900022837A KR930006542B1 (en) 1990-12-31 1990-12-31 Apparatus for tone offered for microcontroller

Publications (2)

Publication Number Publication Date
KR920014301A true KR920014301A (en) 1992-07-30
KR930006542B1 KR930006542B1 (en) 1993-07-16

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US10521231B2 (en) 2010-06-24 2019-12-31 International Business Machines Corporation Function virtualization facility for blocking instruction function of a multi-function instruction of a virtual processor
US9851969B2 (en) 2010-06-24 2017-12-26 International Business Machines Corporation Function virtualization facility for function query of a processor

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