KR920014247A - Synthesis Synchronization Signal and Digital Data Separation System from Composite Image Signal - Google Patents

Synthesis Synchronization Signal and Digital Data Separation System from Composite Image Signal Download PDF

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Publication number
KR920014247A
KR920014247A KR1019900022029A KR900022029A KR920014247A KR 920014247 A KR920014247 A KR 920014247A KR 1019900022029 A KR1019900022029 A KR 1019900022029A KR 900022029 A KR900022029 A KR 900022029A KR 920014247 A KR920014247 A KR 920014247A
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South Korea
Prior art keywords
synchronous signal
digital data
separator
signal
synthesized
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KR1019900022029A
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Korean (ko)
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KR930009182B1 (en
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이건상
박병하
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김광호
삼성전자 주식회사
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Priority to KR1019900022029A priority Critical patent/KR930009182B1/en
Publication of KR920014247A publication Critical patent/KR920014247A/en
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Publication of KR930009182B1 publication Critical patent/KR930009182B1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/08Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)

Abstract

내용 없음No content

Description

합성영상신호로부터 합성동기신호 및 디지탈데이타 분리시스템Synthesis Synchronization Signal and Digital Data Separation System from Composite Image Signal

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2(a)도는 본 발명 합성신호로부터 합성동기신호 및 디지탈데이타 분리시스템의 전체 블럭도, 제2(b)도는 합성동기신호(수평동기신호)분리기의 블럭도, 제2(c)도는 수직동기신호분리기의 블럭도, 제3(d)도는 디지탈데이타 분리기의 블럭도, 제3도는 본 발명 실시예에 따른 각부파형도이다 및 디지탈을 얻을 수 있다.FIG. 2 (a) is a block diagram of the synthesized synchronous signal and digital data separation system from the synthesized signal of the present invention. FIG. 2 (b) is a block diagram of the synthesized synchronous signal (horizontal synchronous signal) separator. A block diagram of the synchronous signal separator, FIG. 3 (d) is a block diagram of a digital data separator, and FIG. 3 is an angular waveform diagram according to an embodiment of the present invention, and digital can be obtained.

Claims (4)

입력된 합성영상신호를 클램핑하는 클램핑회로(1), 클램핑 회로에서 클램핑된 합성영상신호로부터 합성동기신호를 분리하는 합성동기신호분리기(2), 수평·수직동기신호가 포함되어 있는 합성동기신호로부터 수직동기신호를 분리하는 수직동기신호분리기(5), 그리고 합성동기신호와 수직동기신호로부터 게이트 펄스를 발생하여 디지탈데이타를 분리하는 디지탈데이타분리기(7)로 구성됨을 특징으로 하는 합성영상신호로부터 합성동기신호 및 디지탈데이타분리기시스템.A clamping circuit (1) for clamping the input composite video signal, a composite synchronous signal separator (2) for separating the composite synchronous signal from the composite video signal clamped by the clamping circuit, and a composite synchronous signal including horizontal and vertical synchronous signals Synthesized from a composite video signal characterized in that it comprises a vertical synchronous signal separator (5) for separating the vertical synchronous signal, and a digital data separator (7) for separating the digital data by generating a gate pulse from the synthesized synchronous signal and the vertical synchronous signal. Synchronous signal and digital data separator system. 제1항에 있어서, 합성동기신호분리기(2)는 데이타신호는 통과시키고, 칼라영상신호는 제거하는 저역통과필터(8)와, 저역통과된 합성영상신호를 출력으로 내보내는 버퍼 회로(9), 버퍼회로의 출력을 레벨쉬프트하는 레벨쉬프트회로(10), 레벨쉬프트하여 그 첨두값을 검출하는 첨두치검출회로(11), 상기 버퍼회로의 출력과 상기 첨두치 검출회로의 첨두치 검출값을 비교하는 제1비교기(3)로 구성됨을 특징으로 하는 합성영상신호로부터 합성동기신호 및 디지탈데이타 분리 시스템.2. The synthesized synchronous signal separator (2) according to claim 1, comprising: a low pass filter (8) for passing a data signal and removing color image signals, a buffer circuit (9) for outputting a low pass composite video signal as an output; A level shift circuit 10 for level shifting the output of the buffer circuit, a peak value detection circuit 11 for level shifting to detect the peak value, and a peak value detection value of the output of the buffer circuit and the peak value detection circuit Synthetic synchronous signal and digital data separation system from a composite video signal, characterized in that consisting of a first comparator (3). 제1항에 있어서, 수직동기신호분리기(5)는 합성동기신호분리기(2)로부터 출력된 합성동기신호에서 저주파성분만을 통과시켜 수직동기신호를 분리해내는 제2저역필커(12), 제2정필터의 출력과 기준전압(15:Vref)을 비교하여 수직동기신호를 분리해내는 제2비교기(13)으로 구성됨을 특징으로 하는 합성영상신호로부터 합성동기신호 및 디지탈데이타 분리시스템.2. The second low pass filter 12 of claim 1, wherein the vertical synchronous signal separator 5 separates the vertical synchronous signal by passing only low frequency components from the synthesized synchronous signal output from the synthesized synchronous signal separator 2. And a second comparator (13) for separating the vertical synchronous signal by comparing the output of the positive filter and the reference voltage (15: V ref ) with the synthesized synchronous signal and digital data separation system. 제1항에 있어서, 디지탈데이타분리기(7)는 상기 합성동기신호분리기로부터 나온 합성동기신호와 상기 수직동기신호분리기로부터 나온 수직동기신호로부터 디지탈데이타가 있는 기간동안에만 게이트펄스를 발생시키는 게이트펄스발생기(6)와, 상기 합성동기신호분리기에서 출력된 합성동기신호를 입력으로 하고 상기 게이트펄스발생기(6)에서 나온 게이트펄스로브터 디지탈데이타를 출력하는 제3비교기(14)로 구성됨을 특징으로 하는 합성영상신호에서 합성동기신호 및 디지탈데이타 분리시스템.2. The gate pulse generator as claimed in claim 1, wherein the digital data separator (7) generates a gate pulse only during a period of digital data from the synthetic synchronous signal from the synthetic synchronous signal separator and the vertical synchronous signal from the vertical synchronous signal separator. (6) and a third comparator 14 for inputting the synthesized synchronous signal output from the synthesized synchronous signal separator and outputting the gate pulse locator digital data from the gate pulse generator 6; Synthesis synchronous signal and digital data separation system from composite video signal. ※ 참고사항 : 최초출원내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900022029A 1990-12-27 1990-12-27 Signal separating system KR930009182B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900022029A KR930009182B1 (en) 1990-12-27 1990-12-27 Signal separating system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900022029A KR930009182B1 (en) 1990-12-27 1990-12-27 Signal separating system

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KR920014247A true KR920014247A (en) 1992-07-30
KR930009182B1 KR930009182B1 (en) 1993-09-23

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