KR920008972A - Capacitor manufacturing method of highly integrated Morse memory element - Google Patents
Capacitor manufacturing method of highly integrated Morse memory elementInfo
- Publication number
- KR920008972A KR920008972A KR1019900016281A KR900016281A KR920008972A KR 920008972 A KR920008972 A KR 920008972A KR 1019900016281 A KR1019900016281 A KR 1019900016281A KR 900016281 A KR900016281 A KR 900016281A KR 920008972 A KR920008972 A KR 920008972A
- Authority
- KR
- South Korea
- Prior art keywords
- morse
- memory element
- highly integrated
- capacitor manufacturing
- capacitor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
- H01L28/87—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900016281A KR930009580B1 (en) | 1990-10-13 | 1990-10-13 | Method for manufacturing a lsi mos memory device with capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900016281A KR930009580B1 (en) | 1990-10-13 | 1990-10-13 | Method for manufacturing a lsi mos memory device with capacitor |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920008972A true KR920008972A (en) | 1992-05-28 |
KR930009580B1 KR930009580B1 (en) | 1993-10-07 |
Family
ID=19304626
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900016281A KR930009580B1 (en) | 1990-10-13 | 1990-10-13 | Method for manufacturing a lsi mos memory device with capacitor |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930009580B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6640051B1 (en) | 1999-07-13 | 2003-10-28 | Jung-Sun Yoon | Thermal treatment apparatus radiating low and high temperature |
-
1990
- 1990-10-13 KR KR1019900016281A patent/KR930009580B1/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6640051B1 (en) | 1999-07-13 | 2003-10-28 | Jung-Sun Yoon | Thermal treatment apparatus radiating low and high temperature |
Also Published As
Publication number | Publication date |
---|---|
KR930009580B1 (en) | 1993-10-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20050922 Year of fee payment: 13 |
|
LAPS | Lapse due to unpaid annual fee |