KR920005514A - Data communication circuit and method of power line transmission module - Google Patents

Data communication circuit and method of power line transmission module Download PDF

Info

Publication number
KR920005514A
KR920005514A KR1019900012198A KR900012198A KR920005514A KR 920005514 A KR920005514 A KR 920005514A KR 1019900012198 A KR1019900012198 A KR 1019900012198A KR 900012198 A KR900012198 A KR 900012198A KR 920005514 A KR920005514 A KR 920005514A
Authority
KR
South Korea
Prior art keywords
microcomputer
signal
data
state
power line
Prior art date
Application number
KR1019900012198A
Other languages
Korean (ko)
Other versions
KR920011065B1 (en
Inventor
김창주
Original Assignee
정용문
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 정용문, 삼성전자 주식회사 filed Critical 정용문
Priority to KR1019900012198A priority Critical patent/KR920011065B1/en
Publication of KR920005514A publication Critical patent/KR920005514A/en
Application granted granted Critical
Publication of KR920011065B1 publication Critical patent/KR920011065B1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/54—Systems for transmission via power distribution lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

내용 없음.No content.

Description

전력선 전송모듈의 데이타 통신회로 및 방법Data communication circuit and method of power line transmission module

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 구성도.1 is a block diagram of the present invention.

제2도는 제1도의 각부 동작파형도.2 is an operating waveform diagram of each part of FIG.

제3도는 전력선 전송모듈의 데이타 통신흐름도.3 is a data communication flow diagram of a power line transmission module.

제4도는 타전송모듈의 데이타 통신흐름도.4 is a data communication flow diagram of another transmission module.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 제1마이컴 20 : PLC모뎀10: first microcomputer 20: PLC modem

30 : 제2마이컴 40 : 디지털 변환부30: second microcomputer 40: digital conversion unit

50 : 위상검출부 60 : 버퍼50: phase detector 60: buffer

Claims (2)

제1동기신호에 의해 듀티비가. 50%인 제2동기신호를 발생하며 상기 제2동기신호의 제1상태에서 데이타를 송신하는 동시에 제2상태에서 데이타를 수신하는 전력선 전송모듈의 제1마이컴(10)과, 상기 제1마이컴(10)의 제어하에 전력선과 데이타를 인터페이싱하는 PLC모뎀(20)과, 상기 제2동기신호를 수신하여 제1상태에서 상기 제1마이컴(10)의 송신데이타를 수신하고 제2상태에서 데이타를 송신하는 다른 전송시스템의 제2마이컴을 구비하여 데이타를 통신하는 회로에 있어서, 상용 교류전원의 사인파신호를 입력하여 변압 및 클램핑함으로서 구형파로 변환한후 전력선과 아이솔레이션시키며 TTL레벨의 디지털신호로 변환하는 디지탈 변환부(40)와, 상기 디지탈변환부(40)의 디지탈신호를 소정 지연시킨후 본래의 디지털 신호와 논리조합함으로서 상기 디지털 전원신호의 에지변환 검출하여 상기 제1마이컴(10)의 제1동기신호로 출력하는 위상검출부(50)와, 상기 제1마이컴(10)의 제2동기신호에 의해 제어되어 제1상태시 상기 제1마이컴(10)에서 제2마이컴(30)으로 데이타 통로를 형성하고 제2상태시 상기 제2마이컴(30)에서 제1마이컴(10)으로 데이타 통로를 형성하는 버퍼(60)로 구성됨을 특징으로 하는 전력선 전송모듈의 데이타 통신회로.The duty ratio is determined by the first synchronization signal. A first microcomputer 10 of the power line transmission module generating a second synchronization signal of 50% and receiving data in a second state while transmitting data in a first state of the second synchronization signal; A PLC modem 20 for interfacing data with a power line under control of 10), receiving the second synchronization signal, receiving transmission data of the first microcomputer 10 in a first state, and transmitting data in a second state. In a circuit for data communication with a second microcomputer of another transmission system, a sinusoidal signal of a commercial AC power source is input, transformed and clamped, converted into a square wave, isolated with a power line, and converted into a TTL level digital signal. Determining the edge conversion of the digital power supply signal by logically combining the digital signal of the converter 40 and the digital converter 40 with a predetermined delay. The phase detection unit 50 outputs the first synchronous signal of the first microcomputer 10 and the second synchronous signal of the first microcomputer 10 to control the first microcomputer 10 in the first state. And a buffer 60 for forming a data path through the second microcomputer 30 and forming a data path from the second microcomputer 30 to the first microcomputer 10 in the second state. Data communication circuit. 상용 교류전원의 전력선과 인터페이싱하여 데이타를 전송하는 전력선 전송모듈의 제1마이컴(10)과 일반 전송시스템의 제2마이컴간에 데이타를 통신하는 방법에 있어서, 상용 교류전원의 60HZ신호를 TTL레벨의 구형파 신호로 변환하여 60HZ의 주기를 갖는 디지털 동기신호를 발생하는 과정과, 상기 디지탈 동기신호가 제1상태일시 상기 제1마이컴에서 데이타 송신을 위한 요구신호를 발생하여 상기 제2마이컴으로 전송하며, 상기 제2마이컴에서 응답신호 발생시 상기 제1마이컴에서 제2마이컴으로 데이타를 전송하는 과정과, 상기 디지탈 동기신호가 제2상태일시 상기 제2마이컴에서 데이타 송신을 위한 요구신호를 발생하여 상기 제1마이컴으로 전송하며 상기 제2마이컴에서 응답신호 발생시 상기 제2마이컴에서 제1마이컴으로 데이타를 전송하는 과정을 구비하여 60HZ주기 동안에 상기 제1마이컴과 제2마이컴이 상용 교류전원의 주기에 동기되어 한번씩 데이타를 송신 및 수신할 수 있도록 동작함을 특징으로 하는 전력선 전송모듈의 데이타 통신방법.In a method of communicating data between a first microcomputer 10 of a power line transmission module that transmits data by interfacing with a power line of a commercial AC power supply and a second microcom of a general transmission system, the 60HZ signal of the commercial AC power supply is a TTL level square wave. Generating a digital synchronization signal having a period of 60 Hz by converting the signal to a signal; and generating a request signal for data transmission from the first microphone when the digital synchronization signal is in a first state and transmitting the request signal to the second microphone; Transmitting data from the first microcomputer to the second microcomputer when the response signal is generated from the second microcomputer; and generating a request signal for data transmission from the second microcomputer when the digital synchronization signal is in the second state. And transmitting data from the second microcomputer to the first microcomputer when the response signal is generated from the second microcomputer. The 60HZ period during the data communication method of a power line transmission module, characterized in that the first microcomputer and the second microcomputer is operable to transmit and receive data once in synchronization with the period of the commercial AC power source. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900012198A 1990-08-09 1990-08-09 Data communication circuit and the same method KR920011065B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900012198A KR920011065B1 (en) 1990-08-09 1990-08-09 Data communication circuit and the same method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900012198A KR920011065B1 (en) 1990-08-09 1990-08-09 Data communication circuit and the same method

Publications (2)

Publication Number Publication Date
KR920005514A true KR920005514A (en) 1992-03-28
KR920011065B1 KR920011065B1 (en) 1992-12-26

Family

ID=19302147

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900012198A KR920011065B1 (en) 1990-08-09 1990-08-09 Data communication circuit and the same method

Country Status (1)

Country Link
KR (1) KR920011065B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100337398B1 (en) * 1999-12-14 2002-05-21 윤종용 apparatus for control speed of communication in a power line system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100337398B1 (en) * 1999-12-14 2002-05-21 윤종용 apparatus for control speed of communication in a power line system

Also Published As

Publication number Publication date
KR920011065B1 (en) 1992-12-26

Similar Documents

Publication Publication Date Title
KR940012831A (en) Method and apparatus for controlling clock frequency to minimize power consumption of electronic circuits
KR890003084A (en) Circuit and Method for Synchronizing Power Supply in Parallel AC Power System
KR920005514A (en) Data communication circuit and method of power line transmission module
JPH023576B2 (en)
JPS6070937A (en) Time division multiplex transmitting system
KR900011172A (en) Oscillation frequency tracking generator by double loop
KR970031570A (en) A synchronous overhead transmitter of a synchronous transmission system
KR890016869A (en) Distributed control system using power line
KR930018877A (en) Data Clock Demodulation Circuit of Vehicle Tracking System
KR890011160A (en) Power Control System of Unmanned Relay System
KR960009398A (en) Synchronous Clock Generation Circuit
KR950035095A (en) Phase Synchronizer of Digital Signal
KR900002158A (en) Transmission and reception clock supply method of data terminal device
KR940012139A (en) Bus relay circuit of long distance interface device
KR850002199A (en) Keying pulse generator
JPH04239833A (en) Timing generator for repeater
JPS5857250U (en) 3-phase power line conveyance control device
JPS63263838A (en) Spatial light transmission system
KR930018385A (en) Expansion interface system that connects main controller and external device using PC
KR970056487A (en) Home appliance remote control system via cellular modem
KR960024998A (en) 64Kb / s Signal Frame Communication
KR910002070A (en) Signal conversion device for power line return
KR950024424A (en) Phase Detection Control Circuit
KR910008994A (en) Transfer control data transmission / reception method in optical transmission device
KR890009124A (en) Terminal and Integrated Information Network Matching Circuit

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20071109

Year of fee payment: 16

LAPS Lapse due to unpaid annual fee