KR920005477A - GMSK digital modulator and method - Google Patents

GMSK digital modulator and method Download PDF

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Publication number
KR920005477A
KR920005477A KR1019900013715A KR900013715A KR920005477A KR 920005477 A KR920005477 A KR 920005477A KR 1019900013715 A KR1019900013715 A KR 1019900013715A KR 900013715 A KR900013715 A KR 900013715A KR 920005477 A KR920005477 A KR 920005477A
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South Korea
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value
digital
input data
phase
gmsk
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KR1019900013715A
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Korean (ko)
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KR940004196B1 (en
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박상규
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정용문
삼성전자 주식회사
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K7/00Modulating pulses with a continuously-variable modulating signal

Abstract

내용 없음.No content.

Description

GMSK디지틀 변조장치 및 방법GMSK digital modulator and method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 종래 기술에 의한 GMSK디지틀 변조장치의 구성도.1 is a block diagram of a GMSK digital modulation device according to the prior art.

제2도는 본 발명에 의한 GMSK디지틀 변조장치의 구성도.2 is a block diagram of a GMSK digital modulation device according to the present invention.

제3도는 가우시안필터의 단일구형파 응답도.3 is a single square wave response of a Gaussian filter.

제4도는 본 발명에 의한 GMSK디지틀 변조장치의 프로그램 흐름도.4 is a program flow diagram of a GMSK digital modulation device according to the present invention.

제5도는 제4도에 따른 GMSK디지틀 변조방법을 설명하기 위한 파형도.5 is a waveform diagram for explaining a GMSK digital modulation method according to FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 디지틀신호처리부 20,30 : 제1,2디지틀/아날로그신호변환부10: digital signal processing unit 20,30: first and second digital / analog signal conversion unit

40,50 : 제1,2저역통과필터부 60 : 위상천이부40,50: first and second low pass filter 60: phase shifter

70,80 : 제1,2혼합부 90 : 합성부70,80: 1st, 2nd mixing part 90: synthesis part

100 : 대역통과필터부100: band pass filter unit

Claims (4)

입력데이타를 받아서 채용되어 있는 가우시안필터의 출력신호에 의해 순간위상변화량의 정현함수값 및 여현함수값을 계산하는 디지틀신호처리부(10)와, 상기 디지틀신호처리부(10)에서 각기 출력되는 데이타들을 아날로그신호로 변환하는 제1,2디지틀/아날로그신호변환부(20,30)와, 상기 제1,2디지틀/아날로그신호변환부 (20,30)에서 발생되는 양자화 잡음을 제거하기 위한 제1,2저역통과필터부(40,50)와, 반송파를 입력하여 소정 위상천이시키는 위상천이부(60)와, 상기 제1,2저역통과필터부(40,50)의 출력신호에 상기 위상천이부(6)의 출력신호를 혼합하는 제1,2혼합부(70,80)와 ,상기 제1,2혼합부(70,80)에서 출력되는 신호들을 합성하는 합성부(90)와, 상기 합성부(90)의 출력신호를 필터링하는 대역통과필터부(100)를 포함함을 특징으로 하는 GMSK디지틀 변조장치.A digital signal processor 10 for calculating the sine function and the cosine function value of the instantaneous phase change amount based on the output signal of the Gaussian filter that is used to receive the input data, and the data output from the digital signal processor 10 are analogized. First and second digital / analog signal converters 20 and 30 for converting signals into first and second digital / analog signal converters 20 and 30 to remove quantization noise generated by the first and second digital / analog signal converters 20 and 30. The low pass filter unit 40, 50, a phase shifter 60 for inputting a carrier wave, and a predetermined phase shift, and the phase shifter (i) for the output signals of the first and second low pass filter units 40, 50. A first and second mixing unit 70 and 80 for mixing the output signals of 6), a combining unit 90 for synthesizing the signals output from the first and second mixing units 70 and 80, and the combining unit GMSK digital modulation device characterized in that it comprises a band pass filter 100 for filtering the output signal of (90). 제1항에 있어서, 상기 제1,2저역통과필터부(40,50)는 양자화 잡음을 제거하기 위하여 차동증폭기를 이용한 능동필터 또는 스위치 캐패시터필터로 구성됨을 특징으로 하는 GMSK디지틀 변조장치.2. The GMSK digital modulation device according to claim 1, wherein the first and second low pass filter units (40, 50) comprise an active filter or a switch capacitor filter using a differential amplifier to remove quantization noise. 제1항에 있어서, 상기 위상천이부(60)는 입력된 반송파를 90°위상천이 시키도록 구성됨을 특징으로 하는 GMSK디지틀 변조장치.The GMSK digital modulation device of claim 1, wherein the phase shifter (60) is configured to shift the input carrier by 90 °. 디지틀신호처리부(10)에 채용되어 있는 시프트 레지스터의 초기화 및 초기 위상값을 설정하고 입력데이타를 받아서 심볼간 간섭(Inter Symbol Interference; ISI)에 의한 위상값을 계산하는 과정과, 초기위상값과 심볼간 간섭에 의한 위상값을 합하여 소정값으로 모듈로 연산을 행하고 입력데이타의, 비트길이 샘플갯수를 초기화하는 과정과, 입력데이타가 입력되는 구간내에서 샘플하는 순간의 양자화된 위상값을 계산하고 이 위상값이 여현함수값 및 정현함수값을 계산해서 출력하는 과정과, 입력데이타의 비트길이 샘플갯수가 일정값에 도달했는가를 판단하여 일정값이면 시프트 레지스터에 일시 저장되어 있는 입력데이타를 시프트시키고 다음 입력데이타를 디지틀신호처리부(10)에 입력하여 상기 과정들을 반복하는 과정으로 이루어진 것을 특징으로 하는 GMSK디지틀 변조방법.The process of setting the initialization and initial phase value of the shift register employed in the digital signal processor 10, receiving input data, calculating the phase value due to Inter Symbol Interference (ISI), and the initial phase value and the symbol. Modulates the phase values due to interference and performs a modulo operation with a predetermined value, initializes the number of bit length samples of the input data, calculates the quantized phase value at the instant of sampling in the input data input section, and then The phase value calculates and outputs the cosine function value and the sine function value, and determines whether the bit length sample number of the input data has reached a certain value. If it is a constant value, the input data temporarily stored in the shift register is shifted. Characterized in that the input data is input to the digital signal processing unit 10 and the above steps are repeated. GMSK digital modulation method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900013715A 1990-08-31 1990-08-31 Gmsk digital modulate apparatus and method KR940004196B1 (en)

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