KR920005080U - System clock generation circuit of VISA terminal - Google Patents
System clock generation circuit of VISA terminalInfo
- Publication number
- KR920005080U KR920005080U KR2019900013471U KR900013471U KR920005080U KR 920005080 U KR920005080 U KR 920005080U KR 2019900013471 U KR2019900013471 U KR 2019900013471U KR 900013471 U KR900013471 U KR 900013471U KR 920005080 U KR920005080 U KR 920005080U
- Authority
- KR
- South Korea
- Prior art keywords
- generation circuit
- system clock
- clock generation
- visa terminal
- visa
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07F—COIN-FREED OR LIKE APPARATUS
- G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
- G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
- G07F7/12—Card verification
- G07F7/125—Offline card verification
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019900013471U KR930004893Y1 (en) | 1990-08-31 | 1990-08-31 | System-clock generating circuit of visa terminal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019900013471U KR930004893Y1 (en) | 1990-08-31 | 1990-08-31 | System-clock generating circuit of visa terminal |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920005080U true KR920005080U (en) | 1992-03-26 |
KR930004893Y1 KR930004893Y1 (en) | 1993-07-26 |
Family
ID=19302924
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019900013471U KR930004893Y1 (en) | 1990-08-31 | 1990-08-31 | System-clock generating circuit of visa terminal |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930004893Y1 (en) |
-
1990
- 1990-08-31 KR KR2019900013471U patent/KR930004893Y1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR930004893Y1 (en) | 1993-07-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 19980616 Year of fee payment: 6 |
|
LAPS | Lapse due to unpaid annual fee |