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Application filed by 김광호, 삼성전자 주식회사filedCritical김광호
Priority to KR1019900010926ApriorityCriticalpatent/KR920003546A/en
Publication of KR920003546ApublicationCriticalpatent/KR920003546A/en
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 본 발명의 실시예를 나타내는 반도체 제조공정도.1 is a semiconductor manufacturing process chart showing an embodiment of the present invention.
Claims (1)
실리콘 기판 상에 실리콘 산화막을 증착한 다음 P영역을 위한 부분을 사진 식각법으로 애칭하는 공정과, 사진 식각법으로 애칭된 P영역에 불순물을 침적, 침투시켜 P형층을 형성하는 공정과, N영역을 위한 부분을 사진 식각법으로 애칭하는 공정과, 사진 식각법으로 애칭된 N영역에 버퍼 산화막을 형성하는 공정과, 버퍼산화막이 형성된 N영역에 불순물을 침적, 침투시켜 N형층을 형성하는 공정으로 제조됨을 특징으로 하는 반도체 제조방법.Depositing a silicon oxide film on a silicon substrate and then nicking a portion for the P region by photolithography; depositing and penetrating impurities into the P region nicked by photolithography; forming a P-type layer; and N region. A process of etching a portion for photolithography using a photolithography method, a process of forming a buffer oxide film in an N region etched by a photolithography method, and a process of forming an N-type layer by depositing and penetrating impurities into an N region where a buffer oxide film is formed. Semiconductor manufacturing method characterized in that the manufacturing.※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.