KR910019345A - Magnetic frequency automatic synchronization control circuit of display device - Google Patents

Magnetic frequency automatic synchronization control circuit of display device Download PDF

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Publication number
KR910019345A
KR910019345A KR1019900004756A KR900004756A KR910019345A KR 910019345 A KR910019345 A KR 910019345A KR 1019900004756 A KR1019900004756 A KR 1019900004756A KR 900004756 A KR900004756 A KR 900004756A KR 910019345 A KR910019345 A KR 910019345A
Authority
KR
South Korea
Prior art keywords
voltage
frequency
display device
vco
output
Prior art date
Application number
KR1019900004756A
Other languages
Korean (ko)
Inventor
유영관
Original Assignee
정용문
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 정용문, 삼성전자 주식회사 filed Critical 정용문
Priority to KR1019900004756A priority Critical patent/KR910019345A/en
Priority to AU68563/90A priority patent/AU615152B1/en
Priority to JP2415547A priority patent/JPH07325559A/en
Priority to GB9100485A priority patent/GB2242796B/en
Publication of KR910019345A publication Critical patent/KR910019345A/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • H04N5/12Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
    • H04N5/126Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising whereby the synchronisation signal indirectly commands a frequency generator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/101Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop
    • H03L7/102Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop the additional signal being directly applied to the controlled loop oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H03L7/189Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06Phase locked loops with a controlled oscillator having at least two frequency control terminals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronizing For Television (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

내용 없음No content

Description

디스플레이장치의 자기주파수 자동동기 제어회로Magnetic frequency automatic synchronization control circuit of display device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 디스플레이장치의 자기주파수 자동동기 제어회로도, 제3도는 본 발명의 디스플레이장치의 자기주파수 자동동기 제어회로의 주요부분 파형도이다.FIG. 2 is a magnetic frequency automatic synchronous control circuit of the display device of the present invention, and FIG.

Claims (2)

인가되는 주파수신호의 위상을 비교하는 위상비교기(PC)와, 상기 위상비교기(PC)에서 출력되는 신호를 직류전압으로 변환시키는 로우패스필터(LF)와, 상기 로우패스필터(LF)에서 인가되는 직류전압에 따라 일정 주파수를 발진하여 출력하는 전압주파수 변환기(VCO)와, 상기 전압주파수 변환기(VCO)의 출력을 카우트하여 상기 위상비교기(PC)에 인가하는 카운터(C)로 구성된 폐쇄 위상 궤환 회로에 있어서, 상기 로우패스필터(LF)와 전압주파수 발진기(VCO)사이에 구성되어, 상기 로우패스필터(LF)에서 출력되는 직류전압을 기준전압과 비교하는 비교수단과, 상기 비교수단의 출력에 따라 저장된 디지탈신호를 출력하는 마이콤(MC)과, 상기 마이콤(MC)에서 출력되는 디지탈신호를 아나로그신호로 변환시켜 상기 전압주파수 발진기(VCO)를 제어하는 D/A변환기(DAC)와, 로 구성된 디스플레이장치의 자기주파수 자동동기 제어회로.A phase comparator PC for comparing the phase of the frequency signal applied, a low pass filter LF for converting a signal output from the phase comparator PC into a DC voltage, and a low pass filter LF Closed phase feedback consisting of a voltage frequency converter (VCO) for oscillating and outputting a predetermined frequency according to a DC voltage, and a counter (C) for counting the output of the voltage-frequency converter (VCO) and applying it to the phase comparator (PC). A circuit comprising: comparison means for comparing a direct current voltage output from the low pass filter LF and a voltage frequency oscillator VCO with a reference voltage, and an output of the comparison means. A microcomputer (MC) for outputting a digital signal stored in accordance with the present invention, a digital signal converter (DAC) for controlling the voltage frequency oscillator (VCO) by converting the digital signal output from the microcomputer (MC) into an analog signal, By Self-frequency automatic synchronization control circuit of the configured display device. 제1항에 있어서, 상기 비교수단은, 인가되는 기준전압(VREF)을 배분하는 배분용저항(R5),(R6),(R7)과, 상기 로우패스필터(LF)에서 인가되는 전압을 상기 배분용 저항(R11),(R12),(R13)에 배분된 전압을 비교하는 비교기(OP5), (OP6)와, 로 구성된 디스플레이장치의 자기주파수 자동동기회로.The method of claim 1, wherein the comparing means comprises: distribution resistors R5, R6, and R7 for allocating the applied reference voltage VREF, and a voltage applied from the low pass filter LF. A self-frequency automatic synchronization circuit of a display device comprising comparators (OP5) and (OP6) for comparing the voltages allocated to distribution resistors (R11), (R12), and (R13). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900004756A 1990-04-06 1990-04-06 Magnetic frequency automatic synchronization control circuit of display device KR910019345A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019900004756A KR910019345A (en) 1990-04-06 1990-04-06 Magnetic frequency automatic synchronization control circuit of display device
AU68563/90A AU615152B1 (en) 1990-04-06 1990-12-28 Automatic self-frequency synchronizer of display device
JP2415547A JPH07325559A (en) 1990-04-06 1990-12-28 Automatic synchronization control circuit of self-frequency of display apparatus
GB9100485A GB2242796B (en) 1990-04-06 1991-01-10 Automatic frequency synchronizer for a display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900004756A KR910019345A (en) 1990-04-06 1990-04-06 Magnetic frequency automatic synchronization control circuit of display device

Publications (1)

Publication Number Publication Date
KR910019345A true KR910019345A (en) 1991-11-30

Family

ID=19297756

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900004756A KR910019345A (en) 1990-04-06 1990-04-06 Magnetic frequency automatic synchronization control circuit of display device

Country Status (4)

Country Link
JP (1) JPH07325559A (en)
KR (1) KR910019345A (en)
AU (1) AU615152B1 (en)
GB (1) GB2242796B (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2279190A (en) * 1993-06-15 1994-12-21 Ibm Synchronisation apparatus
FI98577C (en) * 1995-03-28 1997-07-10 Nokia Mobile Phones Ltd Oscillator center frequency tuning method
DE19547609A1 (en) * 1995-12-20 1997-06-26 Bosch Gmbh Robert Clock synchronization method
GB2330258B (en) * 1997-10-07 2001-06-20 Nec Technologies Phase locked loop circuit
US6229401B1 (en) * 1998-08-07 2001-05-08 Thomson Consumer Electronics Horizontal frequency generation
EP1698056A1 (en) * 2003-12-19 2006-09-06 Philips Intellectual Property & Standards GmbH Method and arrangement for interference compensation in a voltage-controlled frequency generator
KR100564639B1 (en) 2004-11-06 2006-03-28 삼성전자주식회사 A functional blocks for controlling the state of a display and method thereby
FR2946488B1 (en) * 2009-06-03 2012-05-04 St Ericsson Sa FREQUENCY OFFSET CORRECTION
US8698566B2 (en) * 2011-10-04 2014-04-15 Taiwan Semiconductor Manufacturing Company, Ltd. Phase locked loop calibration

Family Cites Families (12)

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US3567860A (en) * 1968-03-07 1971-03-02 Hewlett Packard Co Television synchronizing system
NL171403C (en) * 1972-06-15 1983-03-16 Philips Nv A circuit for generating a control signal for the grating deflection in a television receiver, as well as a television receiver thereof.
US4272729A (en) * 1979-05-10 1981-06-09 Harris Corporation Automatic pretuning of a voltage controlled oscillator in a frequency synthesizer using successive approximation
JPS5843632A (en) * 1981-09-01 1983-03-14 テクトロニツクス・インコ−ポレイテツド Phase fixing circuit
DE3578493D1 (en) * 1984-10-16 1990-08-02 Philips Nv SYNCHRONIZER CIRCUIT FOR AN OSCILLATOR.
US4593254A (en) * 1984-12-14 1986-06-03 International Business Machines Corp. VCO centering circuit
JPH0646786B2 (en) * 1985-04-19 1994-06-15 ソニー株式会社 Horizontal deflection circuit of multi-scan television receiver
GB8618140D0 (en) * 1986-07-24 1986-09-03 Microvitec Plc Horizontal deflection stage
JPH0785331B2 (en) * 1987-03-03 1995-09-13 ロ−ム株式会社 Digital PLL
JPH01149512A (en) * 1987-12-04 1989-06-12 Matsushita Electric Ind Co Ltd Automatic frequency control circuit
JPH01158878A (en) * 1987-12-15 1989-06-21 Canon Inc Picture reader
JP2877855B2 (en) * 1989-10-03 1999-04-05 旭化成マイクロシステム株式会社 PLL circuit

Also Published As

Publication number Publication date
GB2242796B (en) 1993-12-08
GB9100485D0 (en) 1991-02-20
AU615152B1 (en) 1991-09-19
GB2242796A (en) 1991-10-09
JPH07325559A (en) 1995-12-12

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