KR910017574A - Method of manufacturing interlayer wiring metal - Google Patents
Method of manufacturing interlayer wiring metalInfo
- Publication number
- KR910017574A KR910017574A KR1019900003420A KR900003420A KR910017574A KR 910017574 A KR910017574 A KR 910017574A KR 1019900003420 A KR1019900003420 A KR 1019900003420A KR 900003420 A KR900003420 A KR 900003420A KR 910017574 A KR910017574 A KR 910017574A
- Authority
- KR
- South Korea
- Prior art keywords
- wiring metal
- interlayer wiring
- manufacturing interlayer
- manufacturing
- metal
- Prior art date
Links
- 239000011229 interlayer Substances 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000002184 metal Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900003420A KR920007067B1 (en) | 1990-03-14 | 1990-03-14 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900003420A KR920007067B1 (en) | 1990-03-14 | 1990-03-14 | Manufacturing method of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910017574A true KR910017574A (en) | 1991-11-05 |
KR920007067B1 KR920007067B1 (en) | 1992-08-24 |
Family
ID=19296975
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900003420A KR920007067B1 (en) | 1990-03-14 | 1990-03-14 | Manufacturing method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR920007067B1 (en) |
-
1990
- 1990-03-14 KR KR1019900003420A patent/KR920007067B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR920007067B1 (en) | 1992-08-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 19980616 Year of fee payment: 7 |
|
LAPS | Lapse due to unpaid annual fee |