KR910017532A - Method for forming epitaxial layer of silicon wafer - Google Patents

Method for forming epitaxial layer of silicon wafer

Info

Publication number
KR910017532A
KR910017532A KR1019900002993A KR900002993A KR910017532A KR 910017532 A KR910017532 A KR 910017532A KR 1019900002993 A KR1019900002993 A KR 1019900002993A KR 900002993 A KR900002993 A KR 900002993A KR 910017532 A KR910017532 A KR 910017532A
Authority
KR
South Korea
Prior art keywords
silicon wafer
epitaxial layer
forming epitaxial
forming
wafer
Prior art date
Application number
KR1019900002993A
Other languages
Korean (ko)
Other versions
KR0185985B1 (en
Inventor
전표만
Original Assignee
금성일렉트론주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론주식회사 filed Critical 금성일렉트론주식회사
Priority to KR1019900002993A priority Critical patent/KR0185985B1/en
Publication of KR910017532A publication Critical patent/KR910017532A/en
Application granted granted Critical
Publication of KR0185985B1 publication Critical patent/KR0185985B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30612Etching of AIIIBV compounds
    • H01L21/30621Vapour phase etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
KR1019900002993A 1990-03-07 1990-03-07 Method for forming epitaxial layer in silicon wafer KR0185985B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900002993A KR0185985B1 (en) 1990-03-07 1990-03-07 Method for forming epitaxial layer in silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900002993A KR0185985B1 (en) 1990-03-07 1990-03-07 Method for forming epitaxial layer in silicon wafer

Publications (2)

Publication Number Publication Date
KR910017532A true KR910017532A (en) 1991-11-05
KR0185985B1 KR0185985B1 (en) 1999-04-15

Family

ID=19296735

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900002993A KR0185985B1 (en) 1990-03-07 1990-03-07 Method for forming epitaxial layer in silicon wafer

Country Status (1)

Country Link
KR (1) KR0185985B1 (en)

Also Published As

Publication number Publication date
KR0185985B1 (en) 1999-04-15

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