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Priority to KR1019900003153ApriorityCriticalpatent/KR910017273A/en
Publication of KR910017273ApublicationCriticalpatent/KR910017273A/en
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제5도는 본 발명에 따른 4변수 리플 가산기, 제6도는 본 발명에 따른 4입력 가산회로도.5 is a four variable ripple adder according to the present invention, and FIG. 6 is a four input adder circuit according to the present invention.
Claims (1)
가산변수 비트가 4입력 가산회로의 입력단에 연결되고 4입력 가산회로의 캐리출력이 상좌측 3입력 가산회로의 입력단에 연결되고, 그 가산 출력이 현재 비트의 3입력 가산회로에 연걸되고, 첫 비트(LSB)의 3입력 가산회로의 입력과 캐리입력과 최종단 3입력가산회로의 입력단에 “0″신호를 인가되어 3입력 가산회로의 캐리 출력이 좌측 가산회로의 캐리입력으로 인가되도록 구성된 것을 특징으로 하는 4변수 리플가산기.The add variable bit is connected to the input of the four input adder circuit, the carry output of the four input adder circuit is connected to the input of the upper left three input adder circuit, the add output is connected to the three input adder circuit of the current bit, and the first bit. (0) signal is applied to the input of the three input addition circuit and the carry input of the LSB and the input terminal of the final input three input circuit so that the carry output of the three input addition circuit is applied to the carry input of the left addition circuit. 4-variable ripple adder.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.