KR910012450U - Horizontal synchronization signal control circuit for flat panel display - Google Patents
Horizontal synchronization signal control circuit for flat panel displayInfo
- Publication number
- KR910012450U KR910012450U KR2019890019215U KR890019215U KR910012450U KR 910012450 U KR910012450 U KR 910012450U KR 2019890019215 U KR2019890019215 U KR 2019890019215U KR 890019215 U KR890019215 U KR 890019215U KR 910012450 U KR910012450 U KR 910012450U
- Authority
- KR
- South Korea
- Prior art keywords
- control circuit
- synchronization signal
- flat panel
- panel display
- signal control
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/18—Timing circuits for raster scan displays
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
- H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/147—Digital output to display device ; Cooperation and interconnection of the display device with other functional units using display panels
- G06F3/1475—Digital output to display device ; Cooperation and interconnection of the display device with other functional units using display panels with conversion of CRT control signals to flat panel control signals, e.g. adapting the palette memory
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/12—Synchronisation between the display unit and other units, e.g. other display units, video-disc players
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
- H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen
- H04N3/23—Distortion correction, e.g. for pincushion distortion correction, S-correction
- H04N3/233—Distortion correction, e.g. for pincushion distortion correction, S-correction using active elements
- H04N3/2335—Distortion correction, e.g. for pincushion distortion correction, S-correction using active elements with calculating means
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/12—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
- H04N5/126—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising whereby the synchronisation signal indirectly commands a frequency generator
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2230/00—Details of flat display driving waveforms
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Human Computer Interaction (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Controls And Circuits For Display Device (AREA)
- Synchronizing For Television (AREA)
- Transforming Electric Information Into Light Information (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019890019215U KR920004991Y1 (en) | 1989-12-18 | 1989-12-18 | Control circuit of parallel synchronizing signal for flat display |
DE4040499A DE4040499A1 (en) | 1989-12-18 | 1990-12-18 | Horizontal sync. signal control circuit for flat display panel - corrects horizontal sync. signal by using counters and analysers to detect differences in signal period |
JP400936U JPH0658673U (en) | 1989-12-18 | 1990-12-18 | Horizontal sync signal control circuit for flat panel display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019890019215U KR920004991Y1 (en) | 1989-12-18 | 1989-12-18 | Control circuit of parallel synchronizing signal for flat display |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910012450U true KR910012450U (en) | 1991-07-30 |
KR920004991Y1 KR920004991Y1 (en) | 1992-07-25 |
Family
ID=19293400
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019890019215U KR920004991Y1 (en) | 1989-12-18 | 1989-12-18 | Control circuit of parallel synchronizing signal for flat display |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPH0658673U (en) |
KR (1) | KR920004991Y1 (en) |
DE (1) | DE4040499A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100412306B1 (en) * | 1997-06-12 | 2004-03-26 | 삼성전자주식회사 | Jammed paper removing apparatus for double sided printer |
-
1989
- 1989-12-18 KR KR2019890019215U patent/KR920004991Y1/en not_active IP Right Cessation
-
1990
- 1990-12-18 JP JP400936U patent/JPH0658673U/en active Pending
- 1990-12-18 DE DE4040499A patent/DE4040499A1/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0658673U (en) | 1994-08-12 |
DE4040499A1 (en) | 1991-06-20 |
KR920004991Y1 (en) | 1992-07-25 |
DE4040499C2 (en) | 1992-03-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20020628 Year of fee payment: 11 |
|
LAPS | Lapse due to unpaid annual fee |