KR910009207Y1 - Quasi-fbt pulse generating circuit - Google Patents

Abstract

No content.

Description

Pseudo Flyback Pulse Generator Circuit

1 is a block diagram of a conventional color decoder.

2 is a circuit diagram according to the present invention.

3A to 3I are waveform diagrams of respective parts of FIG.

* Explanation of symbols for the main parts of the drawings

10: color decoder R1 to R8: resistance

Q1 to Q4: Transistors C1 to C4: Condenser

D1 to D2: diode 20, 22: differential circuit

21, 23, 24: inversion circuit 25: pseudo pulse generator

The present invention relates to a pseudo flyback pulse generating circuit, and more particularly to a circuit for generating a pulse similar to a flyback pulse generated in a flyback transformer used in color TV.

In color TVs, the color-processing IC typically requires a flyback pulse from the flyback transformer. therefore. Currently, the PIP circuit employs a dedicated IC capable of color separation without a flyback pulse in the color processing unit for the PIP screen. Such an IC has a drawback in that the IC chip is not only significantly short of demand but also the price of the IC chip is significantly high.

Accordingly, an object of the present invention is to generate a pulse similar to a flyback pulse by using a horizontal output of a color decoder IC used in a conventional color TV, by installing a differential circuit and an inversion circuit composed of simple electronic elements on this output. To provide a pseudo flyback pulse generating circuit.

FIG. 1 shows a conventional color decoder 10. When a composite video signal is input, the luminance and the carrier are separated by using the luminance Y and carrier C separation circuits composed of a band pass filter and a low pass filter. -Decodes the color by gating the burst signal using the synchronously separated horizontal pulses of the flyback pulses coming through the Y output pin. At this time, adjust the tint through color adjustment and phase change. The Y signal separated in this manner is output after being inverted after adjusting brightness and contrast. The separate, horizontal signal is also locked with the flyback pulses coming through the flyback transformer to produce a horizontal output for driving the horizontal output stage. Thus, such a circuit necessarily requires a flyback transformer to generate a flyback pulse.

However, although currently using dedicated ICs that do not require flyback transformers on the order of the consumer to perform these functions, such ICs have a fairly expensive drawback.

The present invention has been devised in view of such a problem, and a circuit diagram for solving the problem is shown in FIG. 2, and the configuration and operation effects of the present invention will be described in detail.

The present invention uses a signal generated from the horizontal output terminal of the color decoder 10 to generate a normal -Y, RY, BY, and GY outputs, in which color decoding and crystal synchronization frequency locking are performed by a flyback pulse. A first means for generating a pulse, a second means for supplying a pulse generated by said first means to a -Y output stage, and a pulse generated by said first means for a flyback pulse input stage of said IC And third means for input.

The first means according to the present invention consists of at least two differential circuits 20, 22 and three inverting circuits 21, 23, 24.

The differential circuit 20 may be composed of a capacitor C1 and a resistor R1, and the inverting circuit 21 may be composed of a transistor Q1 and a resistor R1.

The differential circuit 22 also includes a circuit composed of a capacitor C2 and a resistor R3, and the inverting circuit 33 includes transistors Q2, Q3 and resistors R5-R6.

The second means for generating a pseudo flyback pulse at the Y output stage may be comprised of a diode D1.

The third means according to the present invention includes an emitter floor comprising a transistor (Q4) and a resistor (R7), and may also include a peace circuit composed of a low (R8) and a capacitor (C4). Reference numeral C3 denotes an emitter DC voltage backflow preventing capacitor, and D2 denotes a diode for reducing the voltage supplied to the power terminal of the color decoder 10.

The present invention configured as described above uses a horizontal (H) output as shown in FIG. 3a generated by the color decoder 10, and when the horizontal output passes through the differential circuit 20 composed of the resistor R1 and the capacitor C1. In the differential circuit 20, a waveform as shown in FIG. 3B is obtained. At this time, when the transistor Q1 does not have 1), a dotted line waveform as shown in FIG. 3B is generated. However, when the transistor Q1 is turned on, the base voltage is 0.7 V, resulting in a solid line waveform. Here, the time constant τ1 depends on the resistor R1 and the capacitor C1.

The waveform similar to that of FIG. 3B is phase-inverted in the inversion circuit 21 composed of the transistor Q1 and the resistor R2 to obtain a waveform similar to that of FIG. 3C.

When the phase-inverted waveform is input to the differential circuit 22 made up of the capacitor C2 and the resistor R3, the waveform is differentiated into a waveform by the casting time τ2 = R3 x C2 to obtain a waveform as shown in FIG. 3D. Here, when there is no transistor Q2, a waveform as shown by the dotted line in FIG. 3d is obtained, but when the transistor Q2 is turned on, the base voltage is 0.7V, so a waveform similar to the solid line is obtained.

These waveforms are phase-inverted by an inverting circuit 23 composed of transistors Q2 and resistors R4 to generate waveforms such as those shown in FIG. 3e. These waveforms are resistors R5, R6, and transistors Q3. Is inverted again to obtain the same waveform as in FIG. 3f, which is a pseudo flyback pulse.

This pulse is fed back through the diode D1 to the -Y output pin. Since the peak voltage of this pulse must be equal to the supply voltage Vcc of the color decoder 10 for color separation, Vcc is compensated for the reduced voltage through the diode. A voltage of +0.7 V should be supplied to the power supply of transistor Q4.

Therefore, the peak voltage value of the waveform generated in the selector of the transistor Q4 becomes vcc + 0.7V as shown in FIG. 3f.

On the other hand, when the waveform of FIG. 3f is put into the -Y output through the diode D1, the waveform input to the final -Y output is obtained as the waveform of FIG. 3i.

The waveform as shown in FIG. 3f must be input to the flyback pulse input terminal to obtain the locked horizontal output of the video signal through the phase comparison between the horizontal synchronization and the flyback pulse. At this time, in order to eliminate the influence of the capacitor (C4) used for the smoothing of the waveform, an emitter follower circuit comprising a transistor (Q4) and a resistor (R7) was added. The capacitor C3 was used to prevent the emitter DC voltage of the transistor Q4 from being fed back. Therefore, the voltage appearing at the emitter terminal of the transistor Q4 is obtained with a waveform such as low 3g, and after the waveform is smoothed by the resistor R8 and the capacitor C4 (Fig. 3h), the color decoder 10 Is applied to the flyback pulse input terminal.

The present invention operating in this manner generates a flyback pulse (Fig. 3f) necessary for the color decoder with a simple circuit configuration and smoothes it to input a pseudo flyback pulse (Fig. 3h) similar to the flyback pulse to the color decoder 10. By supplying a similar pulse (Figure 3i) through the diode (D1) to the -Y output, it is not only capable of color decoding without a flyback transformer, but also has a specific cost savings.

Claims (1)

In the conventional color decoder 10 for decoding a composite video signal and outputting a color signal C, a vertical synchronization signal V, a crystal synchronization signal H, and a luminance signal -Y, the horizontal synchronization described above. A differential circuit 20 composed of a resistor R1 and a large capacitor C1 for inputting and differentiating a signal H, and a resistor R2 and a transistor Q1 for inverting the differentiated signal. An inverting circuit 21; A differential circuit (22) consisting of a resistor (R3) and a capacitor (C2) for inverting the inverted signal and an inverting circuit (23) for inverting the differential signal in the differential circuit (22); An inverting circuit (24) consisting of transistors (Q3) and resistors (R5, R6) for inverting the pulses generated by said inverting circuit (23) and providing them to said brightness (-Y) terminals; It operates by inputting the pulse signal output from the inversion circuit 24, the color decoder 10 color decoding even if there is no flyback transformer by providing a pseudo pulse to the flyback transformer input terminal of the color decoder 10 And a pseudo pulse generator 25 comprising transistors Q4, capacitors C3 and C4, and resistors R7 and R8.