KR910007393A - Multilayer printed board and its manufacturing method - Google Patents

Multilayer printed board and its manufacturing method Download PDF

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Publication number
KR910007393A
KR910007393A KR1019900002447A KR900002447A KR910007393A KR 910007393 A KR910007393 A KR 910007393A KR 1019900002447 A KR1019900002447 A KR 1019900002447A KR 900002447 A KR900002447 A KR 900002447A KR 910007393 A KR910007393 A KR 910007393A
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KR
South Korea
Prior art keywords
insulating resin
conductive
multilayer printed
circuit
resin layer
Prior art date
Application number
KR1019900002447A
Other languages
Korean (ko)
Other versions
KR920010177B1 (en
Inventor
마사까즈 시미즈
히로시 시마무라
히데다까 구모따
Original Assignee
고바야시 요오다로
후지 제록스 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1252175A external-priority patent/JPH0648755B2/en
Application filed by 고바야시 요오다로, 후지 제록스 가부시끼가이샤 filed Critical 고바야시 요오다로
Publication of KR910007393A publication Critical patent/KR910007393A/en
Application granted granted Critical
Publication of KR920010177B1 publication Critical patent/KR920010177B1/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

내용 없음No content

Description

다층 프린트기판 및 그 제조법Multilayer printed board and its manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도∼제3도는 본 발명의 강성을 갖는 다층 프린트판의 제조법의 일예를 나타낸 단면 설명도,1 to 3 are cross-sectional explanatory views showing one example of a manufacturing method of a multilayer printed plate having rigidity of the present invention;

제5(a) 및 (b)도는 플렉시블 다층 프린트 기판에 플렉시블성 쉬트상 보강재를 적층한 경우를 나타낸 단면설명도.5 (a) and 5 (b) are cross-sectional explanatory views showing a case where a flexible sheet-like reinforcing material is laminated on a flexible multilayer printed circuit board.

Claims (2)

복수의 절연수지층과 이들 각 절연수지층의 사이 및 최상위의 절연수지층의 상면에 각각 적층되어 소정의 회로패턴으로 에칭된 복수의 금속제 도전회로를 갖는 동시에 서로 인접하는 상하위의 도전회로 사이에서 그 소정의 위치에서 이들 상하위의 도전회로 사이를 전기적으로 연결하는 도전부를 갖는 다층 프린트 기판에 있어서, 상기 복수의 절연수지층중에서 적어도 최하층의 절연수지층을 제외한 절연수지층이 플렉시블성을 갖고 상기 각 도전 회로의 상면과 그 위에 적층된 절연수지층과의 사이에 이 각 도전회로 표면을 흑화처리하여 얻어진 흑화처리막을 설비한 것을 특징으로 하는 다층 프린트 기판.It has a plurality of metal conductive circuits which are respectively laminated between a plurality of insulating resin layers and each of these insulating resin layers and on the upper surface of the uppermost insulating resin layer and etched in a predetermined circuit pattern, and between the upper and lower conductive circuits adjacent to each other. In a multilayer printed circuit board having conductive portions electrically connected between these upper and lower conductive circuits at predetermined positions, the insulating resin layer excluding at least the lowest insulating resin layer among the plurality of insulating resin layers is flexible and each conductive A multilayer printed circuit board comprising a blackening treatment film obtained by blackening each conductive circuit surface between an upper surface of a circuit and an insulating resin layer laminated thereon. 안정된 반경화상태를 나타낸 반경화절연 수지쉬트와 그 상면에 적층되어 소정의 회로패턴으로 에칭된 금속제 도전회로를 갖는 복수의 적층체를 형성하고 이들 각 적층체를 서로 겹쳐서 가열 가압하에 압착시켜 반경화 절연수지쉬트의 반경화 절연수지를 경화시켜서 적층시키는 동시에 서로 인접하는 상하위의 도전회로 사이를 전기적으로 연결하는 도전부를 형성시키고 절연수지층을 거쳐서 복수의 도전회로가 적층된 다층 프린트 기판을 제조할 때에 하위의 도전회로의 위에 상위의 도전 회로를 갖는 반경화 절연수지쉬트를 겹쳐서 가열 가압하에 압착시키기 전에 이 하위 도전회로를 흑화처리하여 그 표면에 흑화처리 막을 형성하는 것을 특징으로 하는 다층 프린트 기판의 제조법.A plurality of laminates having a semi-cured insulating resin sheet exhibiting a stable semi-cured state and a metal conductive circuit laminated on the upper surface thereof and etched with a predetermined circuit pattern are formed. Semi-hardening of Insulation Resin Sheet When curing and stacking insulating resin, and forming a conductive part electrically connected between upper and lower conductive circuits adjacent to each other, and manufacturing a multilayer printed circuit board having a plurality of conductive circuits laminated through the insulating resin layer. A method of manufacturing a multilayer printed circuit board, wherein the lower conductive circuit is blackened and a blackened film is formed on the surface of the lower conductive circuit before superimposing the semi-cured insulating resin sheet having the upper conductive circuit on the lower conductive circuit and pressing it under heat and pressure. . ※ 참고사항 : 최초 출원 내용에 의하여 공개하는 것임.※ Note: It is to be disclosed by the contents of the original application.
KR1019900002447A 1989-09-29 1990-02-26 Multi-layer printed circuit board and method of manufacture KR920010177B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP1252175A JPH0648755B2 (en) 1989-03-30 1989-09-29 Manufacturing method of multilayer printed circuit board
JP89-252175 1989-09-29
JP1-252175 1989-09-29

Publications (2)

Publication Number Publication Date
KR910007393A true KR910007393A (en) 1991-04-30
KR920010177B1 KR920010177B1 (en) 1992-11-19

Family

ID=17233538

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900002447A KR920010177B1 (en) 1989-09-29 1990-02-26 Multi-layer printed circuit board and method of manufacture

Country Status (1)

Country Link
KR (1) KR920010177B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100714321B1 (en) * 1999-12-20 2007-05-04 일렉트록스 코포레이션 Method of manufacture of printed wiring boards and flexible circuitry

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100714321B1 (en) * 1999-12-20 2007-05-04 일렉트록스 코포레이션 Method of manufacture of printed wiring boards and flexible circuitry

Also Published As

Publication number Publication date
KR920010177B1 (en) 1992-11-19

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