KR910007126A - Method of forming buried resistive contact - Google Patents

Method of forming buried resistive contact Download PDF

Info

Publication number
KR910007126A
KR910007126A KR1019890012680A KR890012680A KR910007126A KR 910007126 A KR910007126 A KR 910007126A KR 1019890012680 A KR1019890012680 A KR 1019890012680A KR 890012680 A KR890012680 A KR 890012680A KR 910007126 A KR910007126 A KR 910007126A
Authority
KR
South Korea
Prior art keywords
resistive contact
channel layer
gas channel
electron gas
dimensional electron
Prior art date
Application number
KR1019890012680A
Other languages
Korean (ko)
Other versions
KR920004365B1 (en
Inventor
맹성재
이재진
김진섭
Original Assignee
경상현
재단법인한국전자통신연구소
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 경상현, 재단법인한국전자통신연구소 filed Critical 경상현
Priority to KR1019890012680A priority Critical patent/KR920004365B1/en
Publication of KR910007126A publication Critical patent/KR910007126A/en
Application granted granted Critical
Publication of KR920004365B1 publication Critical patent/KR920004365B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

내용 없음.No content.

Description

매립형 저항성 접촉의 형성방법Method of forming buried resistive contact

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 2 도는 본 발명의 형성방법에 의해 완성도 변조 도핑 전계효과 트랜지스트의 개략도.2 is a schematic diagram of a completeness modulation doped field effect transistor by the forming method of the present invention.

제 3 도는 본 발명의 매립형 저항성 접촉을 형성하는 제작과정을 나타낸 것으로 ,3 is a manufacturing process for forming the buried resistive contact of the present invention,

(a) 도는 반절연성 기판위에 도핑하지 않는 갈륨 비소 완충층과 알루미늄 갈륨 비소 격리층 및 실리콘을 도핑항 알루미륨 갈륨 비소층을 차례로 성장하는 상태를 나타낸 개략도.(a) is a schematic diagram showing a state in which an undoped gallium arsenide buffer layer, an aluminum gallium arsenide isolation layer, and a silicon-doped aluminium gallium arsenide layer are sequentially grown on a semi-insulating substrate.

(b) 도는 활성층 영역을 정의하는 상태를 나타낸 개략도.(b) is a schematic diagram showing a state of defining an active layer region.

(c) 도는 소오스와 드레인 영역을 정의하는 상태의 나타낸 개략도.(c) is a schematic representation of a state defining a source and a drain region.

(d) 도는 금속층을 증착하는 상태를 나타낸 개략도.(d) is a schematic diagram showing a state of depositing a metal layer.

(e) 도는 게이트 영역을 정의하면서 완성하는 상태를 나타낸 개략도.(e) Schematic diagram showing a state of completing while defining a gate region.

Claims (2)

서로 다른 밴트갭을 가진 물질을 접합시켜 감금된 캐리어를 이용하여 변조 도핑전계효과 트랜지스터를 제조함에 있어서, 소오스, 드레인 부분을 2차원 전자가스 채널층까지 식각하고 금속을 증착하여 저항성 접촉을 형성시키도록 한 매립형 저항성 접촉의 형성방법.In the fabrication of a modulated doped field effect transistor using a confined carrier by bonding materials having different bandgaps, the source and drain portions may be etched to a two-dimensional electron gas channel layer and metal may be deposited to form a resistive contact. A method of forming a buried resistive contact. 제 1 항에 있어서, 저항성 접촉 부위를 2차원 전자가스 채널층까지 식각하고 금속을 증착하여 저항성 접촉과 2차원 전자가스 채널층이 직접 접하되도록 한 매립형 저항성 접촉의 형성방법.The method of claim 1, wherein the resistive contact portion is etched to the two-dimensional electron gas channel layer and the metal is deposited to directly contact the resistive contact and the two-dimensional electron gas channel layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890012680A 1989-09-01 1989-09-01 Method fo fabricating a omic contact KR920004365B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890012680A KR920004365B1 (en) 1989-09-01 1989-09-01 Method fo fabricating a omic contact

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890012680A KR920004365B1 (en) 1989-09-01 1989-09-01 Method fo fabricating a omic contact

Publications (2)

Publication Number Publication Date
KR910007126A true KR910007126A (en) 1991-04-30
KR920004365B1 KR920004365B1 (en) 1992-06-04

Family

ID=19289569

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890012680A KR920004365B1 (en) 1989-09-01 1989-09-01 Method fo fabricating a omic contact

Country Status (1)

Country Link
KR (1) KR920004365B1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1092249C (en) * 1998-04-08 2002-10-09 中国科学院福建物质结构研究所二部 Novel corrosion inhibitor for inhibiting iron and steel corrosion in running water
CN1092250C (en) * 1998-04-08 2002-10-09 中国科学院福建物质结构研究所二部 Novel corrosion inhibitor for inhibiting iron and steel corrosion in 10%-25% concentration celery salt solution
CN1092248C (en) * 1998-01-22 2002-10-09 中国科学院福建物质结构研究所二部 Corrosion inhibitor for inhibiting corrosion of iron and steel in sea water

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1092248C (en) * 1998-01-22 2002-10-09 中国科学院福建物质结构研究所二部 Corrosion inhibitor for inhibiting corrosion of iron and steel in sea water
CN1092249C (en) * 1998-04-08 2002-10-09 中国科学院福建物质结构研究所二部 Novel corrosion inhibitor for inhibiting iron and steel corrosion in running water
CN1092250C (en) * 1998-04-08 2002-10-09 中国科学院福建物质结构研究所二部 Novel corrosion inhibitor for inhibiting iron and steel corrosion in 10%-25% concentration celery salt solution

Also Published As

Publication number Publication date
KR920004365B1 (en) 1992-06-04

Similar Documents

Publication Publication Date Title
EP1261035A3 (en) Enhancement- and depletion-mode phemt device and method of forming same
KR860000705A (en) Semiconductor device comprising N-channel and P-channel transistors and method of manufacturing same
KR910007126A (en) Method of forming buried resistive contact
KR900019250A (en) Compound semiconductor devices
KR910013568A (en) Compound Semiconductor Device and Manufacturing Method Thereof
KR950700606A (en) Semiconductor expitaxial substrate
KR930018757A (en) Compound Semiconductor Device
JPH0793323B2 (en) Field effect transistor
KR920017213A (en) Device isolation method of semiconductor device
KR930003473A (en) Manufacturing method of semiconductor laser
KR950034623A (en) Semiconductor device manufacturing method
KR910001930A (en) Self-aligned Low Doped Junction Formation Method
KR940016887A (en) Method of forming fine gate electrode of semiconductor device
KR960039223A (en) Gate electrode formation method of semiconductor device
KR930015046A (en) High-Low Doped AlGaAs / GaAs HEMT Devices
KR910005395A (en) Method of manufacturing high electron mobility transistor
KR920007237A (en) Preparation of Field Effect Transistors
KR910010737A (en) Vertical Heterojunction Field Effect Transistors
JPS63155772A (en) Field effect transistor
KR920013775A (en) Trench using transistor manufacturing method
JPS61276268A (en) Schottky gate field-effect transistor
KR910017679A (en) Semiconductor device
KR930005300A (en) Manufacturing method of buried hetero laser diode
KR970054535A (en) Manufacturing Method of Compound Semiconductor Device
KR940004744A (en) How to grow undoped passivation layer of semiconductor

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 19980601

Year of fee payment: 7

LAPS Lapse due to unpaid annual fee