KR910006230U - Glitch removal circuit when transmitting CMI data - Google Patents
Glitch removal circuit when transmitting CMI dataInfo
- Publication number
- KR910006230U KR910006230U KR2019890013542U KR890013542U KR910006230U KR 910006230 U KR910006230 U KR 910006230U KR 2019890013542 U KR2019890013542 U KR 2019890013542U KR 890013542 U KR890013542 U KR 890013542U KR 910006230 U KR910006230 U KR 910006230U
- Authority
- KR
- South Korea
- Prior art keywords
- transmitting
- removal circuit
- glitch removal
- cmi data
- cmi
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0863—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/125—Discriminating pulses
- H03K5/1252—Suppression or limitation of noise or interference
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/06—Code representation, e.g. transition, for a given bit cell depending only on the information in that bit cell
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Dc Digital Transmission (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019890013542U KR910008256Y1 (en) | 1989-09-12 | 1989-09-12 | Circuit for removing glitch using cmi type data transfer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019890013542U KR910008256Y1 (en) | 1989-09-12 | 1989-09-12 | Circuit for removing glitch using cmi type data transfer |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910006230U true KR910006230U (en) | 1991-04-24 |
KR910008256Y1 KR910008256Y1 (en) | 1991-10-15 |
Family
ID=19290033
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019890013542U KR910008256Y1 (en) | 1989-09-12 | 1989-09-12 | Circuit for removing glitch using cmi type data transfer |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR910008256Y1 (en) |
-
1989
- 1989-09-12 KR KR2019890013542U patent/KR910008256Y1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR910008256Y1 (en) | 1991-10-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20030922 Year of fee payment: 13 |
|
EXPY | Expiration of term |