KR910005812Y1 - Monitor circuit - Google Patents

Monitor circuit Download PDF

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KR910005812Y1
KR910005812Y1 KR2019870002139U KR870002139U KR910005812Y1 KR 910005812 Y1 KR910005812 Y1 KR 910005812Y1 KR 2019870002139 U KR2019870002139 U KR 2019870002139U KR 870002139 U KR870002139 U KR 870002139U KR 910005812 Y1 KR910005812 Y1 KR 910005812Y1
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South Korea
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ttl
signal
resistors
analog
input
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KR2019870002139U
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Korean (ko)
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KR880016993U (en
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신성식
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대우전자 주식회사
김용원
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/153Digital output to display device ; Cooperation and interconnection of the display device with other functional units using cathode-ray tubes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006Details of the interface to the display terminal

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Color Television Systems (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

내용 없음.No content.

Description

디지탈 (TTL)과 아날로그 신호의 공용입력 모니터회로Common input monitor circuit for digital (TTL) and analog signals

제 1 도는 본 고안의 회로도.1 is a circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

I1:스위칭 IC B1: TTL 16 칼라 프로세서I 1 : switching IC B 1 : TTL 16 color processor

B2: 비데오 프리앰프(Video Pre-Amp) B3: 비데오 앰프(Video Amp)B 2 : Video Pre-Amp B 3 : Video Amp

F : 디지털 또는 아날로그 입력단 S1: TTL 또는 아날로그 선택스위치F: Digital or analog input S 1 : TTL or analog select switch

본 고안은 R, G, B 신호를 입력으로하는 컴퓨터 모니터의 입력회로에 있어서, 디지탈(TTL) 신호와 아날로그(Analog)신호가 동시에 입력이 가능하도록 한 디지탈(TTL)과 아날로그 신호의 공용입력모니터회로에 관한 것이다.The present invention is a common input monitor of digital (TTL) and analog signals in which the digital (TTL) signal and the analog (Analog) signal can be input at the same time in the input circuit of the computer monitor which inputs R, G, and B signals. It is about a circuit.

일반적으로 모니터의 입력신호로 사용하는 컴퓨터의 R, G, B 신호출력은 최대전압이 5Vp-p의 디지탈 신호인 TTL 출력과 최대전압이 1V p-p인 아날로그 출력으로 구분된다.In general, R, G, B signal output of computer used as input signal of monitor is divided into TTL output which is 5Vp-p digital signal and analog output which is 1V p-p maximum voltage.

따라서 서로 다른 전압레벨을 가지고 모니터에 입력되는 두 신호출력의 최대크기가 서로 같은 값을 미리 조절하여 모니터의 출력앰프와 연결하여야 하며, 서로 동일한 크기를 갖도록 조절한 TTL과 아날로그 신호는 조절전과 조절후의 주파수 특성에는 하등의 변화가 없어야한다.Therefore, the maximum size of the two signal outputs inputted to the monitor with different voltage levels should be adjusted beforehand and connected to the output amplifier of the monitor. TTL and analog signals adjusted to have the same size should be adjusted before and after adjustment. There should be no change in frequency characteristics.

본고안은 이러한 점에 착안하여 안출한 것으로 커플링 콘덴서, 다이오드 저항등을 상호접속하여 주파수 특성에는 변화가 없는 디지탈(TTL)과 아날로그 신호의 공용입력 모니터회로를 제공하는데, 본 고안의 목적이 있다.The purpose of the present invention is to provide a common input monitor circuit for digital (TTL) and analog signals with no change in frequency characteristics by interconnecting coupling capacitors and diode resistors. .

이하 첨부된 도면에 의거하여 본 고안의 구성 및 작용효과를 상세히 설명하면 다음과 같다.Hereinafter, the configuration and operation of the present invention will be described in detail with reference to the accompanying drawings.

스위칭 IC(I1)의 15, 4, 14번 핀들은 각기 입력단자(F)의 R, G, B 단자와 접속되고, 9, 10, 11번 핀들은 저항(R18)을 통해 전원(B+)과 연결되고, 2, 5, 12번 핀들은 접지저항(R'1, R'2, R'3, R'7, R'8, R'9)과 비데오 프리앰프(B2)와 접속되고, 1, 3, 13번 핀들은 입력단자(F)의 I단자는 풀다운(full-down)저항(R1, R2, R3, R4), B1(TTL 16 color process), 전원(B+)과 연결된 풀업 저항(R5, R6, R7, R8)과 접속되고, TTL16 칼라프로세서(B1)는 저항 저항(R9, R10, R11)을 통해 각 콜렉터는 전원(B+)과 연결되고, 에미터 저항(R12, R13, R14)을 통해 접지된 트랜지스터(Q1, Q2, Q3)의 베이스와 접속되었고, 또한 상기 트랜지스터(Q1, Q2, Q3)의 에미터는 저항(R15, R16, R17)을 통해 비데오 프리앰프(B2)와 접속된 공지의 회로에, 스위칭 IC(I1)의 2, 5, 12번 핀은 비데오 커플링 콘덴서(C1, C2, C3)및 다이오드(D1, D2, D3)을 통해 프리엠프(B2)와 연결하였으며, 커플링 콘덴서(C1, C2, C3)에 연결된 저항(R'4, R'5, R'6)은 스위치(S1)에 연결하여서 구성되는 것을 특징으로 하는 본 고안은 R, G, B 신호가 입력단자(F)를 통해 입력되면 스위칭 IC(I1)가 아날로그, 또는 TTL신호를 스위치(S1)에 의하여 선택을 한다.Pins 15, 4 and 14 of the switching IC I 1 are connected to the R, G and B terminals of the input terminal F, respectively, and pins 9, 10 and 11 are connected to the power supply B through the resistor R 18 . Pins 2, 5, and 12 are connected to ground resistors (R ' 1 , R' 2 , R ' 3 , R' 7 , R ' 8 , R' 9 ) and the video preamplifier (B 2 ). Pins 1, 3, and 13 are connected, and the I terminal of the input terminal (F) has a pull-down resistor (R 1 , R 2 , R 3 , R 4 ), B1 (TTL 16 color process), power supply. The pull-up resistors (R 5 , R 6 , R 7 , R 8 ) connected to (B + ) are connected, and the TTL16 color processor (B 1 ) is connected to each collector through the resistor resistors (R 9 , R 10 , R 11 ). It is connected to the power source B + and connected to the base of the transistors Q 1 , Q 2 , Q 3 , which are grounded through emitter resistors R 12 , R 13 , R 14 , and the transistors Q 1 , The emitters of Q 2 , Q 3 ) are known circuits connected to the video preamplifier B 2 via resistors R 15 , R 16 and R 17 , and are numbered 2, 5 and 12 of the switching IC I 1 . The pin is a video coupling condenser (C 1, C 2, C 3) and a diode (D 1, D 2, D 3) resistor connected was connected to the preamplifier (B 2) via a coupling capacitor (C 1, C 2, C 3) The present invention is characterized in that (R ' 4 , R' 5 , R ' 6 ) is configured by connecting to the switch (S 1 ), when the R, G, B signal is input through the input terminal (F) switching IC ( I 1 ) selects the analog or TTL signal by the switch S 1 .

한편 스위칭 IC(I1)은 9, 10, 11번 핀들이 모두 "H"상태이면 1, 3, 13번 핀들이 "ON"상태로 되며, 9, 10, 11번 핀들이 모두 "L"상태이면, 2, 5, 12번 핀들이 모두 "ON"상태가 되도록 되어 있으며, 스위치(S1)가 TTL단자와 접속되면, 트랜지스터(Q4)는 동작을 하지 못하므로, 스위칭 IC(I1)의 9, 10, 11번 핀의 "H"상태가 되어, 1, 3, 13번 핀들이 모두 "ON"상태가 되므로 TTL신호는 풀다운 저항(R1, R2, R3, R4)과 풀업저항(R5, R6, R7, R8)을 거쳐 TTL 16 칼라프로세서(TTL 16 color process, B1)에 인가되어 16칼라로 합성된후 트랜지스터(Q1, Q2, Q3)의 베이스에 인가되어 에미터에서 출력을 얻는데 트랜지스터(Q1, Q2, Q3)는 저항(R12, R13, R14)와 함께 버퍼작용을 하여 출력 임피던스를 낮추고 (임피던스정합)저항(R'7, R'8, R'9, R15, R16, R17)에 의하여 레벨이 조정된후 비데오 프리앰프(B2)에 아날로그 입력신호와 동일한 크기로 입력된다.On the other hand, in switching IC (I 1 ), if pins 9, 10 and 11 are all "H", pins 1, 3 and 13 are "ON" and all pins 9, 10 and 11 are "L". In this case, pins 2, 5, and 12 are all set to the "ON" state. When the switch S 1 is connected to the TTL terminal, the transistor Q 4 does not operate, and thus the switching IC I 1 Of pins 9, 10, and 11 of the "H" state, and pins 1, 3, and 13 are all "ON", so the TTL signal is connected to the pull-down resistors (R 1 , R 2 , R 3 , and R 4 ). After the pull-up resistors (R 5 , R 6 , R 7 , R 8 ) are applied to the TTL 16 color processor (TTL 16 color process, B1) and synthesized 16 colors, the transistors (Q 1 , Q 2 , Q 3 ) Transistors (Q 1 , Q 2 , and Q 3 ) are applied to the base to obtain an output from the emitter, which buffers the resistors (R 12 , R 13 , and R 14 ) to lower the output impedance (impedance match) and the resistance (R '7, R' 8, R '9, R 15, R 16, R 17) after the video level is adjusted by the program The reamplifier B 2 is input with the same magnitude as the analog input signal.

(R'7, R'8, R'9를 설정한 후 R15R16R17을 설정 B2에 입력되는 TTL의 레벨이 D1D2D3을 경우한 아날로그 신호레벨과 같게 설정한다)(Set R ' 7 , R' 8 , R ' 9 and then set R 15 R 16 R 17 to the same level as the analog signal level when TTL input to setting B 2 is D 1 D 2 D 3 )

또한 스위치(S1)가 아날로그 단자와 접속되면 트랜지스터(Q4)가 턴온되어, 스위치 IC(I1)의 9, 10, 11번 핀은 "L"상태가 유지되므로 2, 5, 12번 핀들은 모두 "ON"상태가 되어, 아날로그 신호는 입력저항(R'1, R'2. R'3)을 거쳐, 커플링 콘덴서(C1, C2, C3)를 거치면서 DC 커플링된후, 다이오드(D1, D2, D3)를 통해 비데오 프리앰프(B2)에 인가된다.In addition, when the switch S 1 is connected to the analog terminal, the transistor Q 4 is turned on so that pins 9, 10, and 11 of the switch IC I 1 are kept in an “L” state, so pins 2, 5, and 12 are connected. Are all “ON”, and the analog signal is DC-coupled through the input resistors (R ' 1 , R' 2. R ' 3 ) and through the coupling capacitors (C 1 , C 2 , C 3 ). Thereafter, it is applied to the video preamplifier B 2 through the diodes D 1 , D 2 , D 3 .

이때 비데오 프리앰프(B2)에 인가된 신호는 브라이트 또는 콘트라스트를 조절하여 적절한 크기로 증폭한 후 비데오 프리앰프(B3)를 거쳐, 화면상에 나타나게 된다.At this time, the signal applied to the video preamplifier B 2 is amplified to an appropriate size by adjusting the brightness or contrast, and then appears on the screen via the video preamplifier B 3 .

한편, 아날로그 신호는 비데오 프리앰프(B2)에 입력시 다이오드(D1, D2, D3)에 의하여 TTL 신호단과 합성이 되므로, 상기 다이오드(D1, D2, D3)를 통과한 아날로그 신호는 0.7V 정도 크기가 감소하게 되므로, 저항(R'4, R'5, R'6)으로 바이어스를 걸어 신호의 감속 및 주파수 특성을 보상하고 있다.On the other hand, since the analog signal is synthesized with the TTL signal stage by the diodes D 1 , D 2 , and D 3 when input to the video preamplifier B 2 , the analog signals passed through the diodes D 1 , D 2 , and D 3 . Since the analog signal is reduced in size by about 0.7V, the analog signal is biased with resistors R ' 4 , R' 5 and R ' 6 to compensate for the deceleration and frequency characteristics of the signal.

상기한 바와 같이 본 고안은 R, G, B 신호를 입력으로 하는 컴퓨터 모니터에 1V p-p크기의 아날로그신호 또는 5V p-p 크기의 TTL 신호가 입력되어도 두신호의 주파수 특성에는 영향을 미치지 않고, 동일한 크기를 가지고, 비데오 프리앰프(B2)에 입력될수 있도록 하므로서, TTL 신호와 아날로그 신호가 동시에 모니터에 입력되더라도 동일한 전압 레벨을 갖도록 조절하여 상기 두 신호를 비데오 프리앰프(B2)에 인가될수 있다는 장점이 있다.As described above, the present invention does not affect the frequency characteristics of the two signals even when an analog signal of 1V pp size or a TTL signal of 5V pp size is input to a computer monitor that receives R, G, and B signals. have, hameuroseo to be inputted to the video preamplifier (B 2), the advantage be applied to the TTL signal and an analog signal is inputted at the same time on the monitor adjusted to have the same voltage level to the two video preamplifier (B 2) a signal have.

Claims (1)

제 1 도와 같이 스위치(S1)의 TTL 단자와 아날로그 단자와의 접속상태에 의하여 동작하는 스위칭 IC(I1)와 R, G, B 입력단의 입력단자(F), 저항(R'1, R'2, R'3, R'7, R'8, R'9)을 통해 비데오 프리앰프(B3)와 연결된 비데오 프리앰프(B2), 저항(R1, R2, R3, R4, R5, R6, R7, R8)을 통해 TTL 16 칼라 프로세스(B1)과 접속하고, 상기 TTL 16 칼라프로세서(B1)은 트랜지스터(Q1, Q2, Q3)와 저항(R9, R10, R11, R15, R16, R17)을 통해 비데오 프리앰프(B2)와 접속된 공지의 회로에 스위칭IC(I1)와 비데오 프리앰프(B2)를 커플링 콘덴서(C1, C2, C3), 스위치(S1)의 TTL 단자와 연결되어 감소된 신호 및 주파수 특성을 보상해 주는 저항(R'4, R'5, R'6), 다이오드(D1, D2, D3)를 접속하여 구성되는 것을 특징으로 하는 TTL 과 아날로그 신호의 공용입력 모니터회로.As shown in FIG. 1, the switching IC I 1 operated by the connection state between the TTL terminal of the switch S 1 and the analog terminal, the input terminal F of the R, G, and B input terminals, and the resistors R ' 1 and R Video preamplifier (B 2 ), resistors (R 1 , R 2 , R 3 , R) connected to video preamplifier (B 3 ) via ' 2 , R' 3 , R ' 7 , R' 8 , R ' 9 ) 4 , R 5 , R 6 , R 7 , R 8 ) and the TTL 16 color processor B 1 , and the TTL 16 color processor B 1 is connected to the transistors Q 1 , Q 2 , Q 3 . Switching IC (I 1 ) and video preamplifier (B 2 ) to a known circuit connected to video preamplifier (B 2 ) through resistors R 9 , R 10 , R 11 , R 15 , R 16 , R 17 . Is connected to the coupling capacitors (C 1 , C 2 , C 3 ) and the TTL terminals of the switch (S 1 ) to compensate for the reduced signal and frequency characteristics (R ' 4 , R' 5 , R ' 6 ) And a common input monitor circuit for the TTL and analog signals, comprising diodes (D 1 , D 2 , D 3 ) connected to each other.
KR2019870002139U 1987-02-24 1987-02-24 Monitor circuit KR910005812Y1 (en)

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KR2019870002139U KR910005812Y1 (en) 1987-02-24 1987-02-24 Monitor circuit

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Application Number Priority Date Filing Date Title
KR2019870002139U KR910005812Y1 (en) 1987-02-24 1987-02-24 Monitor circuit

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KR910005812Y1 true KR910005812Y1 (en) 1991-08-03

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