KR910005782B1 - Computer graphic image processing apparatus - Google Patents

Abstract

The system for improving the speed and variety of computer graphic image data processing includs 2nd memory (800) for storing the image data, a digital signal processor (200) for converting the image data, a 3rd memory (600) for storing the program to control the DSP (200), a memory control interface (500), a frame buffer (300) for storing the image display data, an image output circuit (700) for interfaceng between the frame buffer (300) and a monitor (900), a graphic system processor (100) for processing the data from the 2nd memory (800) through the memory control interface (500), and a 1st memory (400) for storing the control program of the graphic system processor (100).

Description

Computer graphics image processing equipment

1 is a conventional system block diagram.

2 is a system block diagram of the present invention.

* Explanation of symbols for main parts of the drawings

100: graphics system processor 200: digital signal processor

300: frame buffer 400: first memory

500: memory control interface unit 600: third memory

700: image output unit 800: second memory

900: Monitor

The present invention relates to computer graphics in an image processing system, and more particularly, to an image processing circuit capable of high speed image processing and various image processing.

In general, a conventional circuit for implementing a computer graphics device is configured as shown in FIG. 1 so that when a computer is powered on, a Graphic System Processor (GSP) is downloaded and loaded into the system memory. Image data is processed in order by the programmed program and the main CPU.

At this time, the GSP can be downloaded by two methods, one of which is to download the GSP from the main CPU and the other is downloaded through the gap of the GSP side.

Therefore, the process of displaying an image on the screen is described in order to display an image on a display device such as a monitor in the main CPU through the GSP or direct memory access (DMA) method. Write on the frame buffer.

The image data on the frame buffer is transmitted to the color palette by the control signal and the address signal of the GSP.

At this time, the image data existing in the pallet is converted into a video signal required for a screen display device such as a monitor by the pallet control signal and the video control signal generated from the GSP, and the image is displayed on the screen.

However, the conventional method as described above has a disadvantage in that it takes a long time for the main CPU to process the data already having a large amount of data because the image is processed in the main CPU and sent to the GSP.

Therefore, the present invention allows the image data processed in the main CPU to be processed on the side of the signaling processor (Digital Signaling Processor (DSP)) to speed up the image processing speed and reduce the burden on the main CPU to improve the efficiency of the entire system. In providing a processing signal.

Hereinafter, the present invention will be described with reference to the accompanying drawings.

2 is a circuit diagram of the present invention, in which image data can be stored in the second memory 800 by inputting image data from a computer through a second memory 800 and a PC bus (a) for storing data about an image. Selecting the image data from the DPS 200 in the third memory 600 and the second memory 800 that stores the digital DPS 200 and the program for controlling the operation of the DPS 200 to convert to An image processing unit (B) comprising a memory control interface unit (500) for subscribing to or reading image data written in the second memory (800) by receiving a predetermined control signal, and a frame buffer for storing data for image display. And a monitor 900 for displaying the contents of the frame buffer 300 and the image output unit 700 for interfacing between the frame buffer 300 and the monitor 900 and the PC bus a. Im via computer Receiving a control command to display meaningful graphic data on the screen of the monitor 900, the graphic data may be projected from the second memory 800 through the memory control interface 500 to be graphically displayed on the screen of the monitor 900. It is composed of a graphics output unit (A) consisting of a graphics system processor 100 to process to output to the frame buffer (300).

The present invention will be described in detail based on the above configuration.

In FIG. 2, the DSP 200 inputs information on mutual communication and image latch through a PC bus (a) of a computer.

The information signals input from the computer to the DSP 200 through the address bus d and the control signal e are controlled by the control signal i for the third memory 600 in which the program of the DSP 200 is embedded. The address and data signal h are converted and output.

At this time, the DSP 200 reads the program and data embedded in the third memory 600 according to the control signal i, the address and the data signal h, and transmits the data through the memory control interface 500. The program for writing the image data into the two memory 800 can be performed.

The image data stored in the second memory 800 as described above is information on an image display to display arbitrary data from the computer on the GSP 100 via an address data bus b and a control signal bus c. If given, the GSP 100 may control and read the memory control interface 500.

In addition, the read image data is stored in the frame buffer 300. At this time, the frame buffer 300 operates under the control of the GPS through the control signal bus g.

When the control signal generated from the GSP 100 drives the frame buffer 300 and the image output unit 700, the image data stored in the frame buffer 300 is converted into a video signal m and is monitored. ) To be displayed on the screen.

As described above, by processing the image data processed by the main CPU of the computer against the DSP side, the GSP can process other image data at the same time as displaying the image on the monitor and processing the image data at high speed. In addition to reducing the workload of the CPU required for image processing, there is an advantage that can improve the efficiency of the entire system.

Claims (1)

A computer graphics image processing apparatus comprising: a second memory (800) for storing data relating to an image and image data capable of inputting image data from a computer via a PC bus (a) and storing the image data in the second memory (800). And converts the image data from the DSP 200 into the third memory 600 and the second memory 800 which store a digital signaling processor 200 for converting the data into a digital signal processor 200 and a program for controlling the operation of the DSP 200. A memory control interface 500 for selecting and writing image data written in the second memory 800 by receiving a predetermined control signal, a frame buffer 300 for storing data for image display, and An image output unit 700 for interfacing between the monitor 900 for displaying the contents of the frame buffer 300 and arbitrary graphic data from a computer via the PC bus a on the monitor 900 screen. After receiving a control command to display, the image data is read from the second memory 800 through the memory control interface 500 and processed to display a graphic on the screen of the monitor 900. And a first memory (400) for storing a program for controlling the operation of the graphic system processor (100).

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