KR910005695Y1 - Intermittence circuits of charging/discharging with electricity of battery - Google Patents
Intermittence circuits of charging/discharging with electricity of battery Download PDFInfo
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- KR910005695Y1 KR910005695Y1 KR2019870006285U KR870006285U KR910005695Y1 KR 910005695 Y1 KR910005695 Y1 KR 910005695Y1 KR 2019870006285 U KR2019870006285 U KR 2019870006285U KR 870006285 U KR870006285 U KR 870006285U KR 910005695 Y1 KR910005695 Y1 KR 910005695Y1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/0036—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using connection detecting circuits
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
내용 없음.No content.
Description
도면은 본 고안의 회로도.The figure is a circuit diagram of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
FF : 플립플롭 BAT : 바테리FF: flip-flop BAT: battery
Q1-Q6: 트랜지스터 R1-R9: 저항Q 1 -Q 6 : Transistor R 1 -R 9 : Resistance
C1-C2: 콘덴서 VR : 가변저항C 1 -C 2 : Capacitor VR: Variable resistor
D1-D2: 다이오드D 1 -D 2 : Diode
본 고안은 바테리 충방전 단속회로에 관한 것이다.The present invention relates to a battery charge and discharge intermittent circuit.
종래의 소형 카세트의 충전회로는 충전 DC어댑터를 사용 하는데 충전과 세트를 병렬로 동작시키는 경우에 충전바테리의 충전이 완료되어도 충전전원과 충전바테리를 분리할 수 있는 스위칭 회로가 내장되어 있지 않아 일정전류가 계속해서 흐르고 있어 바테리의 수명이 단축되고, 전력손실이 3배정도로 커지는 문제점이 있었다.In the conventional small cassette charging circuit, a charging DC adapter is used, and when the charging and the set are operated in parallel, the switching circuit which separates the charging power and the charging battery even when the charging battery is completed has no built-in current. As the flow continues, the battery life is shortened and the power loss is about three times larger.
본 고안은 상기한 문제점을 해결하기 위한 바테리 충방전단속 회로로써, 누설전류에 의한 소모전력을 줄이고, 충전바테리의 수명을 연장시키는 것이 본 고안의 목적이다.The present invention is a battery charge and discharge control circuit for solving the above problems, it is an object of the present invention to reduce the power consumption by leakage current, and to extend the life of the charge battery.
이하에 첨부된 도면을 참조하여 본 고안의 실시예를 상세히 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도면을 참조하면, 바테리 충방전 단속회로는 접점(A)이 접지된 DC잭(Jack)의 접점(B)이 저항(R1)을 통해서 접지된 콘덴서(C1)와 플립플롭(FF)의 입력단자(J.K)와 저항(R4)과 각각의 트랜지스터(Q2,Q3,Q4)의 콜렉터에 연결되고, 또 플립플롭(FF)의 클리어단자(CLR)와 접지된 저항(R2)에 연결되며, 플립플롭(FF)의 클럭단자(CLK)는 콘덴서(C2)를 통해서 접지된 저항(R8)과 트랜지스터(Q6)의 에미터에 연결되고, 출력(Q)은 접지된 저항(R3)과 각각의 트랜지스터(Q1,Q4)의 베이스에 연결되며, 에미터가 접지된 트랜지스터(Q1)의 콜렉터는 저항(R4)과 트랜지스터(Q2)의 베이스에 연결되고, 트랜지스터(Q2)의 에미터는 접지된 가변저항(VR)과 트랜지스터(Q3)의 베이스에 연결되며, 트랜지스터(Q3)의 에미터는 저항(R5)을 통해서 음극(-)이 접지된 바테리(BAT)의 양극(+)과 각각의 트랜지스터(Q4,Q5)의 에미터와 베이스와 저항(R6,R7)을 통해서 각각의 트랜지스터(Q5,Q6)의 콜렉터에 연결되고, 트랜지스터(Q5)의 에미터는 트랜지스터(Q6)의 베이스와 직렬 접속된 다이오드(D1,D2)를 통해서 접지에 연결되며, 트랜지스터(Q4)의 콜렉터는 세트의 전원전압(B2)에 연결되었다.Referring to the drawing, the battery charge / discharge intermittent circuit includes a capacitor C 1 and a flip-flop FF in which the contact B of the DC jack in which the contact A is grounded is grounded through the resistor R 1 . A resistor R 2 connected to the input terminal JK and the resistor R 4 and the collector of each of the transistors Q 2 , Q 3 and Q 4 , and the clear terminal CLR of the flip-flop FF and the grounded resistor R 2. The clock terminal CLK of the flip-flop FF is connected to the grounded resistor R 8 and the emitter of the transistor Q 6 through the capacitor C 2 , and the output Q is grounded. Connected to the base of the resistor R 3 and the respective transistors Q 1 and Q 4 , and the collector of the transistor Q 1 with the emitter grounded is connected to the base of the resistor R 4 and the transistor Q 2 . connected and a transistor emitter cathode through the emitter resistor (R 5) of a grounded variable resistor (VR) and the transistor connected to the base of (Q 3), a transistor (Q 3) of the (Q 2) (-) a Positive (+) of grounded battery (BAT) Each of the transistors (Q 4, Q 5) of the emitter and the base and a resistor (R 6, R 7) a via is connected to a collector of each transistor (Q 5, Q 6), the emitter of the transistor (Q 5) It is connected to ground through diodes D 1 and D 2 connected in series with the base of transistor Q 6 , and the collector of transistor Q 4 is connected to the supply voltage B 2 of the set.
먼저, 소형 카세트를 동작시키기 위하여 DC잭에 어댑터를 연결하면 DC잭의 접점(A,B)은 분리되고, 저항(R1)을 통해 저항(R2)에 전압이 인가되어 플립플롭(FF)은 클리어상태에서 다시 원래의 상태로 된다. 이때 플립플롭(FF)의 출력은 로우상태(L)이므로 트랜지스터(Q2)의 온.오프 제어용 트랜지스터(Q1)는 오프되고, 트랜지스터(Q3)의 바이어스공급용 트랜지스터(Q2)는 저항(R4)의 바이어스공급으로 온이되고 충전 바테리 전원공급용 트랜지스터(Q3)의 베이스에 바이어스를 공급하여, 트랜지스터(Q3)의 바이어스양은 가변저항(VR)에 의해 조정된다.First, when the adapter is connected to the DC jack to operate the small cassette, the contacts A and B of the DC jack are separated, and a voltage is applied to the resistor R 2 through the resistor R 1 to flip the flip-flop FF. Returns to the original state from the clear state. The output is a low state (L) because the transistor on. Off-current transistor (Q 1) is off, the bias supply transistor (Q 2) for the transistor (Q 3) of the (Q 2) of the flip-flop (FF) is the resistance is (R 4) adjusted by the amount the variable resistance (VR) of the bias is turned on to supply bias supply a bias to the base of the charging batteries the power supply transistor (Q 3) for a transistor (Q 3) of the.
트랜지스터(Q3)의 콜렉터에는 세트 전원전압(B+)이 공급됨과 동시에 바테리 충전용 저항(R5)을 통해서 충전 바테리 전류가 흐르므로써 바테리(BAT)에 충전이 시작된다.As the set power supply voltage B + is supplied to the collector of the transistor Q 3 , the charging battery current flows through the battery charging resistor R 5 to start charging the battery BAT.
이때 충전완료 감지용 트랜지스터(Q5)의 베이스는 충전바테리(BAT)의 양극(+)에 연결되고, 에미터는 직렬 접속된 트랜지스터(Q5)의 동작전압 설정용 다이오드(D1,D2)를 통해서 접지에 연결되어서 트랜지스터(Q5)가 온될 수 있는 베이스전압은 다이오드의 턴온전압의 3배가 된다.At this time, the base of the charging completion detection transistor Q 5 is connected to the positive electrode (+) of the charging battery BAT, and the emitter is a diode (D 1 , D 2 ) for setting the operating voltage of the transistor Q 5 connected in series. The base voltage at which the transistor Q 5 can be turned on by being connected to ground through the diode is three times the turn-on voltage of the diode.
충전바테리(BAT)에 충전이 완료되어 양극(+)전압이 상승하면 트랜지스터(Q5)는 온이되고, 다이오드(D1,D2)에 바이어스가 공급되어 트랜지스터(Q6)도 온이되므로 저항(R8)에 하이레벨의 전압이 인가되며, 펄스패스용 콘덴서(C2)에 의해 플립플롭(FF)의 클럭단자(CLK)에 펄스가 인가되어 출력(Q)은 하이상태(H)로 되고, 트랜지스터(Q1)가 온이되어 트랜지스터(Q2)의 베이스 바이어스는 접지되며, 트랜지스터(Q3)의 베이스에 바이어스가 공급되지 않아 트랜지스터(Q3)가 오프되므로 충전이 완료된 충전바테리(BAT)에 전류가 흐르지 않는다. 따라서 트랜지스터(Q4)의 베이스에도 역바이어스가 걸려 트랜지스터(Q4)가 오프되어 충전바테리(BAT)의 충전이 완료되면 충방전통로는 완전 차단되고, 세트는 트랜지스터(Q3)의 콜렉터 즉 전원공급선로와 연결되어서 트랜지스터(Q3,Q4)의 온,오프와 무관하게 작동시키고 싶으면 작동이 된다.When the charging battery BAT is fully charged and the positive voltage rises, the transistor Q 5 is turned on, and a bias is supplied to the diodes D 1 and D 2 so that the transistor Q 6 is turned on. A high level voltage is applied to the resistor R 8 , and a pulse is applied to the clock terminal CLK of the flip-flop FF by the pulse path capacitor C 2 so that the output Q is in the high state H. as being a transistor (Q 1) is the base bias of the transistor (Q 2) on is grounded, since the bias is not to be supplied to the transistor (Q 3) is off the base of the transistor (Q 3) charging Battery charging is completed No current flows in (BAT). Therefore, transistor (Q 4) is hung transistor (Q 4) to reverse bias the base are OFF of when charging is completed, the charging Battery (BAT) charging and discharging path is cut off completely, set the collector of the transistor (Q 3) that is powered If it is connected to the supply line and wants to operate regardless of the on and off of the transistors Q 3 and Q 4 , it is activated.
소형카세트를 어댑터와 분리하면 DC잭의 접점(A,B)이 연결되어 플립플롭(FF)의 클리어단자(CLR)는 접지되므로 플립플롭(FF)이 클리어되고, 출력(Q)은 로우상태(L)가 되어 트랜지스터(Q4)의 베이스에는 저항(R3)에 의해 순바이어스가 걸리고, 충전된 바테리(BAT)에서 트랜지스터(Q4)가 온 됨에 따라 세트의 전원(B+)에 전압을 공급하여 세트를 동작 시킨다.When the small cassette is separated from the adapter, the contacts A and B of the DC jack are connected, and the clear terminal CLR of the flip-flop FF is grounded, so the flip-flop FF is cleared and the output Q is low ( L) and a forward bias is applied to the base of the transistor Q 4 by the resistor R 3 , and a voltage is applied to the power supply B + of the set as the transistor Q 4 is turned on in the charged battery BAT. Supply the set to operate.
상기한 바와 같은 본 고안의 회로에 의하면, 충전바테리에 충전이 완료된 후에도 누설전류가 세트동작 전류의 약 3배가 흐르는 것을 방지할 수 있어 전력의 소모를 줄이고, 충전 바테리의 무리를 감소시켜 바테리의 수명을 연장시킬 수 있다.According to the circuit of the present invention as described above, the leakage current can be prevented from flowing about three times the set operating current even after the charging battery is completed, reducing power consumption, reducing the number of charge batteries, the life of the battery Can be extended.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019870006285U KR910005695Y1 (en) | 1987-04-28 | 1987-04-28 | Intermittence circuits of charging/discharging with electricity of battery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019870006285U KR910005695Y1 (en) | 1987-04-28 | 1987-04-28 | Intermittence circuits of charging/discharging with electricity of battery |
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| Publication Number | Publication Date |
|---|---|
| KR880020665U KR880020665U (en) | 1988-11-30 |
| KR910005695Y1 true KR910005695Y1 (en) | 1991-07-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019870006285U KR910005695Y1 (en) | 1987-04-28 | 1987-04-28 | Intermittence circuits of charging/discharging with electricity of battery |
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| Country | Link |
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| KR (1) | KR910005695Y1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018097354A1 (en) * | 2016-11-23 | 2018-05-31 | ㈜ 트라이너스 | Automatically-activated electronic device and charging cable therefor |
-
1987
- 1987-04-28 KR KR2019870006285U patent/KR910005695Y1/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018097354A1 (en) * | 2016-11-23 | 2018-05-31 | ㈜ 트라이너스 | Automatically-activated electronic device and charging cable therefor |
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| Publication number | Publication date |
|---|---|
| KR880020665U (en) | 1988-11-30 |
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