KR910005463B1 - Switching mode power supply - Google Patents
Switching mode power supply Download PDFInfo
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- KR910005463B1 KR910005463B1 KR1019890009085A KR890009085A KR910005463B1 KR 910005463 B1 KR910005463 B1 KR 910005463B1 KR 1019890009085 A KR1019890009085 A KR 1019890009085A KR 890009085 A KR890009085 A KR 890009085A KR 910005463 B1 KR910005463 B1 KR 910005463B1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
Description
제1도는 종래의 회로도.1 is a conventional circuit diagram.
제2도는 본 발명의 회로도.2 is a circuit diagram of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
PR1 : 포터릴레이 TOC1 : 트랜스퍼머PR1: Port Relay TOC1: Transformer
R1-R3 : 저항 C1-C3 : 캐패시터R1-R3: Resistor C1-C3: Capacitor
ZD1-ZD3 : 저항ZD1-ZD3: Resistance
본 발명은 펄스폭변조(Pulse Width Modulation : 이하 PWM이라 칭함)방식의 스위칭모드 파워 서플라이(Switching Mode Power Supply : 이하 SMPS라 칭함)에 관한 것으로, 특히 셔트 다운(Shyt Down)방식을 사용한 SMPS의 보호회로에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching mode power supply (hereinafter referred to as SMPS) of pulse width modulation (hereinafter referred to as PWM). It is about a circuit.
일반적으로 SMPS에서 1차측에 PWM집적회로를 사용할 경우 과전압(over voltage) 및 과전류(over current)에 대한 셔트 다운방식 설계가 이용하지 않아 래치(Latch)방식을 사용하였다. 상기 레치방식을 사용할 경우 장시간 방치시 각 부품이 스트레스(Stress)를 받아 세트(set)가 페일(Fail)되는 현상이 나타난다. 종래의 SMPS회로의 실예를 보면 제1도에서 도시한 바와 같이 5VDC전원(V11) 또는 12VDC전원(V12)이 과전압 발생시 이 과전압이 SCR11에 유입되므로 SCR11이 도통된다. 즉 SCR11이 도통이 되면 전원(V12)단이 쇼트(Short)되는 결과가 되므로 1차측회로의 트래지스터(Q1) 베이스단에 연결된 PWM집적회로(1)는 과전류가 흐르게 된다. 상기 PWM직접회로(1)가 저항(R12)을 통해 흐르므로 제1노드(N1)의 전압을 기준으로 제2노드(N2)에는 더 낮은 음(-)전압이 걸린다. 그래서 음전압이 저항(R11)을 통해 PWM직접회로(1)로 인가하는데 이 음전압이 깊어져서 PWM직접회로(1)는 오프(off)된다. 상기 PWM직접회로(1)가 오프로 되면 저항(R12)에 전류가 흐르지 않으므로 PWM직접회로(1)는 다시 동작을 시작하여 상기와 같은 동작을 반복하게 된다. 즉 래치현상이 반복된다. 이러한 래치동작은 장시간 방치시 시스템의 페일에 직접 영향을 주거나 페일되지 않더라도 제품의 신뢰성이 저하되는 문제점이 있었다.In general, when the PWM integrated circuit is used on the primary side of SMPS, the latch-down method is used because the shutter-down method for over voltage and over current is not used. In the case of using the latch method, when a component is left for a long time, a phenomenon occurs in which a set is failed due to stress. As an example of the conventional SMPS circuit, as shown in FIG. 1, when the 5VDC power supply V11 or the 12VDC power supply V12 generates an overvoltage, the overvoltage flows into the SCR11 so that the SCR11 is turned on. That is, when the SCR11 becomes conductive, the result is that the power supply V12 terminal is shorted, so that the overcurrent flows through the PWM integrated circuit 1 connected to the transistor Q1 base of the primary circuit. Since the PWM direct circuit 1 flows through the resistor R12, a lower negative voltage is applied to the second node N2 based on the voltage of the first node N1. Thus, a negative voltage is applied to the PWM direct circuit 1 through the resistor R11. The negative voltage is deepened, and the PWM direct circuit 1 is turned off. When the PWM direct circuit 1 is turned off, no current flows in the resistor R12, so the PWM direct circuit 1 starts operation again and repeats the above operation. That is, the latch phenomenon is repeated. This latching operation has a problem in that the reliability of the product is deteriorated even if it does not directly affect or fail the system when left for a long time.
따라서 본 발명의 목적은 PWM직접회로 사용시 집적회로 공급전원을 별도로 하여 2차측회로에서 사용해야만 셔트 다운방식이 가능한데 PWM직접회로를 1차회로에서 사용하고도 셔트 다운을 할 수 있는 셔트 다운방식을 이용한 스위칭모드 파워 서플라이 보호회로를 제공함에 있다.Therefore, the purpose of the present invention is to use a shutter down method only when the integrated circuit power supply is used separately in the secondary circuit when the PWM direct circuit is used. It is to provide a switching mode power supply protection circuit.
이하 본 발명을 도면을 참조하여 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the drawings.
제2도는 본 발명의 회로도로서, 제1, 2전원(V1,V2)단에 과전압 인가에 따라 스위칭하기 위해 제너다이오드(ZD2,ZD3) 및 저항(R2) 및 캐패시터(C2)로 이루어진 과전압 검출제어수단과, 과전류가 흐를 경우에 따라 충전전압을 상승시켜 스위칭하기 위해 트랜스포머(TOC1) 및 다이오드(D1) 및 저항(R3) 및 캐패시터(C3) 및 제너다이오드(ZD1)로 이루어진 과전류 검출제어수단과, 상기 과전압 검출제어수단 및 과전류 검출제어수단의 출력에 따라 포토릴레이(PR1)가 동작하여 PWM집적회로의 동작을 제어하기 위해 포토릴레이(PR1) 및 저항(R1) 및 캐피시터(C1)로 이루어진 과전압 및 과전류 검출수단으로 구성한다.FIG. 2 is a circuit diagram of the present invention, in which an overvoltage detection control including zener diodes ZD2 and ZD3, a resistor R2, and a capacitor C2 is switched to switch over voltages applied to the first and second power supplies V1 and V2. Means and an overcurrent detection control means comprising a transformer (TOC1), a diode (D1), a resistor (R3), a capacitor (C3), and a zener diode (ZD1) to increase and switch the charging voltage as the overcurrent flows; In order to control the operation of the PWM integrated circuit by operating the photo relay PR1 according to the output of the overvoltage detection control means and the overcurrent detection control means, an overvoltage comprising a photo relay PR1 and a resistor R1 and a capacitor C1 and It consists of an overcurrent detection means.
상술한 구성에 의거하여 본 발명을 첨부된 도면을 참조하여 상세히 설명한다.With reference to the accompanying drawings based on the above-described configuration will be described in detail.
우선 컴퓨터에 부착되는 SMPS가 정상 동작할 경우 본 발명은 전혀 동작하지 않는다. 즉 동작해서는 안된다. 만약 SMPS 또는 외부원인으로 이상이 생길 경우 하기와 같은 동작원리로 인해 시스템 이상현상이 제거될때까지 페일되지 않고 안전하게 보호회로가 동작한다.First of all, the present invention does not work at all when the SMPS attached to the computer operates normally. It should not work. If an error occurs due to SMPS or an external cause, the protection circuit operates without fail until the system error is eliminated due to the following operation principle.
먼저 과전압에 의한 셔트 다운회로 동작을 보면+5VDC 제1전원(V1)이 과전압이 발생할 경우에 제너다이오드(ZD2)에는 제너전압 이상의 전압이 걸리므로 제너다이오드(ZD2)는 도통되어 포토릴레이(Photo Relay)(PR1)의 2차측 포토다이오드(P6)를 통해 전류가 흐르게 된다. 상기 전류의 흐름이 포토다이오드(PD)를 발광시키고, 이 빛이 포토릴레이(PR1)의 1차측 SCR을 동작하게 만든다. 상기 SCR이 도통되면 캐패시터(C1)에서 충전되고 이 SCR이 오프될 경우 저항(R1)으로 방전시킨다. 상기 SCR이 도통되면 케패시터(C1)에서 충전되고 이 SCR이 오프될 경우 저항(R1)으로 방전시킨다. 상기 SCR이 도통될 때 PWM 집적회로 반전입력단(PI)이 제로(Zero)전압으로 되어 P. W. M.집적회로는 동작을 중단하게 된다.First, when the shutter-down circuit is operated due to overvoltage, when the + 5VDC first power supply V1 is overvoltageed, the zener diode ZD2 takes more than the zener voltage, so the zener diode ZD2 is turned on and the photo relay Current flows through the secondary side photodiode P6 of PR1). The flow of current causes the photodiode PD to emit light, which causes the primary side SCR of the photorelay PR1 to operate. When the SCR is turned on, it is charged in the capacitor C1 and discharged to the resistor R1 when the SCR is turned off. When the SCR is turned on, it is charged in the capacitor C1 and discharged to the resistor R1 when the SCR is turned off. When the SCR is conducted, the PWM integrated circuit inverting input terminal PI becomes a zero voltage and the P. W. M. integrated circuit stops operating.
상기와 마찬가지로 +12VDC 제2전압(V2)이 과전압일 경우 다이오드(ZD3)에는 제너전압이상의 전압이 걸리므로 다이오드(ZD3)가 도통되어 상기와 같은 동작을 하여 SMPS의 동작을 정지시킨다.As described above, when the + 12VDC second voltage V2 is an overvoltage, the diode ZD3 is subjected to a voltage equal to or greater than the zener voltage, so that the diode ZD3 is turned on to stop the operation of the SMPS.
여기서 저항(R2)은 포토다이오드(PD) 및 제너다이오드(ZD2,ZD3)의 전류제한저항이며 캐패시터(C2)는 순간적인 과전압에 의한 오동작을 막기 위한 서어지(Surge)전압 제거소자이다.Here, the resistor R2 is a current limiting resistor of the photodiode PD and the zener diodes ZD2 and ZD3, and the capacitor C2 is a surge voltage removing device for preventing malfunction due to instantaneous overvoltage.
다음은 과전류에 의한 셔트 다운회로 동작을 보면 과전류 센서(Senser) 트랜스포머(Transformer)(TOC1) 1차측에 과전류가 흐를 경우 또는 쇼트될 겨우 트랜스포머(TOC1) 2차측으로 유기되는 전압레벨이 높아진다. 상기 전압은 정류다이오드(D1)를 통해 캐패시터(C3)의 충전전압을 상승시킨다. 상기 전압레벨이 제너다이오드(ZD1)의 제너전압 이상으로 되면 이에 역시 과전압에 의한 동작때와 마찬가지로 포토릴레이(PR1)가 동작하여 PWM직접회로는 셔트 다운이 된다. 여기서 레지스터(R3)는 방전저항으로 시스템 파워를 오프시켰을 경우 캐패시터(C3)의 전압을 보다 빨리 방전시켜 주는 것이다.Next, the operation of the shutter down circuit caused by the overcurrent increases the voltage level induced when the overcurrent flows to the primary side of the overcurrent sensor Transformer or TOC1, or shorted to the secondary side of the transformer TOC1. The voltage raises the charging voltage of the capacitor C3 through the rectifying diode D1. When the voltage level is equal to or higher than the zener voltage of the zener diode ZD1, the photo relay PR1 operates as in the case of the overvoltage operation, and the PWM direct circuit is shut down. Here, the resistor R3 discharges the voltage of the capacitor C3 faster when the system power is turned off by the discharge resistor.
상술한 바와 같이 PWM방식의 SMPS에서 래치방식을 사용치 않고 셔트 다운방식을 사용하여 불량의 장시간 방치시 SMPS가 페일되는 현상이 나타나지 않는 보다 신뢰성이 향상된 이점이 있고, 1차회로에 PWM직접회로를 사용하므로 별도의 집적회로 전원공급회로를 필요로 하지 않으므로 원가절감이 되는 이점이 있다.As described above, the SMPS of the PWM method does not use the latch method but the shutter-down method is used to improve the reliability that the SMPS does not appear to fail when left for a long time. Since it does not require a separate integrated circuit power supply circuit there is an advantage that the cost is reduced.
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KR1019890009085A KR910005463B1 (en) | 1989-06-29 | 1989-06-29 | Switching mode power supply |
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KR1019890009085A KR910005463B1 (en) | 1989-06-29 | 1989-06-29 | Switching mode power supply |
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KR910002085A KR910002085A (en) | 1991-01-31 |
KR910005463B1 true KR910005463B1 (en) | 1991-07-29 |
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KR1019890009085A KR910005463B1 (en) | 1989-06-29 | 1989-06-29 | Switching mode power supply |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7394675B2 (en) | 2005-08-29 | 2008-07-01 | Samsung Electronics Co., Ltd. | Power supplying apparatus and power supplying method |
CN112859966A (en) * | 2019-11-27 | 2021-05-28 | 华中科技大学 | Integrated closed-loop feedback PWM control system and method for optical device parameter locking |
Families Citing this family (1)
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KR100412228B1 (en) * | 2001-02-01 | 2003-12-24 | 한림인텍 주식회사 | A hard polyurethane foam of continous bubble make facility of hot forming, and the finishing material of a car using thereof |
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1989
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7394675B2 (en) | 2005-08-29 | 2008-07-01 | Samsung Electronics Co., Ltd. | Power supplying apparatus and power supplying method |
CN112859966A (en) * | 2019-11-27 | 2021-05-28 | 华中科技大学 | Integrated closed-loop feedback PWM control system and method for optical device parameter locking |
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KR910002085A (en) | 1991-01-31 |
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