KR910005430A - 반도체 소자의 금속 배선 공정방법 - Google Patents

반도체 소자의 금속 배선 공정방법 Download PDF

Info

Publication number
KR910005430A
KR910005430A KR1019890012567A KR890012567A KR910005430A KR 910005430 A KR910005430 A KR 910005430A KR 1019890012567 A KR1019890012567 A KR 1019890012567A KR 890012567 A KR890012567 A KR 890012567A KR 910005430 A KR910005430 A KR 910005430A
Authority
KR
South Korea
Prior art keywords
semiconductor device
metal wiring
process method
wiring process
spatter
Prior art date
Application number
KR1019890012567A
Other languages
English (en)
Other versions
KR0132512B1 (ko
Inventor
서광하
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019890012567A priority Critical patent/KR0132512B1/ko
Publication of KR910005430A publication Critical patent/KR910005430A/ko
Application granted granted Critical
Publication of KR0132512B1 publication Critical patent/KR0132512B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53219—Aluminium alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53233—Copper alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음

Description

반도체 소자의 금속 배선 공정방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도 내지 제4도는 본 발명의 공정도이다.

Claims (1)

  1. 콘택트 형성 후 스파터로 티타늄(10)을 증착시키고 레이저를 일정시간동안 아르곤 분위기에서 조사하여 Tisi2(20)을 형성하며 다시 질소 분위기에서 일정시간 조사하여 TiN(30)을 형성한 후 알루미늄-구리의 합금(40)을 증착시킴을 특징으로 하는 반도체 소자의 금속 배선 공정방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890012567A 1989-08-31 1989-08-31 반도체소자의금속배선공정방법 KR0132512B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890012567A KR0132512B1 (ko) 1989-08-31 1989-08-31 반도체소자의금속배선공정방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890012567A KR0132512B1 (ko) 1989-08-31 1989-08-31 반도체소자의금속배선공정방법

Publications (2)

Publication Number Publication Date
KR910005430A true KR910005430A (ko) 1991-03-30
KR0132512B1 KR0132512B1 (ko) 1998-04-16

Family

ID=19289496

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890012567A KR0132512B1 (ko) 1989-08-31 1989-08-31 반도체소자의금속배선공정방법

Country Status (1)

Country Link
KR (1) KR0132512B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100338102B1 (ko) * 1999-06-25 2002-05-24 박종섭 반도체 소자의 구리 배선 형성 방법

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100477834B1 (ko) * 1997-12-27 2005-07-04 주식회사 하이닉스반도체 티타늄실리사이드막형성방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100338102B1 (ko) * 1999-06-25 2002-05-24 박종섭 반도체 소자의 구리 배선 형성 방법

Also Published As

Publication number Publication date
KR0132512B1 (ko) 1998-04-16

Similar Documents

Publication Publication Date Title
IT7924031A0 (it) Metodo per produrre leghe di metallo refrattario e metallo nobile nonche' leghe e catalizzatori cosi' ottenuti.
YU46662B (sh) Postupak za proizvodnju keramičkog tela koj sadrži modifikovanu matalnu komponentu i dobijeni keramički proizvod
CA2004796A1 (en) Inhibited composition and method for stripping tin, lead or tin-lead alloy from copper surfaces
ATA190482A (de) Stanzverfahren und vorrichtung zum ausstanzen von aus wellpappe, metall, kunststoff u.dgl. bestehenden zuschnitten
MX9710108A (es) Refinacion moderada de aceite de triglicerido.
GB9501287D0 (en) Surface treatment
CA2197973A1 (en) Process for surface-treating body made of metal
KR910005430A (ko) 반도체 소자의 금속 배선 공정방법
AU5498096A (en) Process for manufacturing components on a metal film base
ATE77656T1 (de) Metall extraktion verfahren.
JPS51143518A (en) Wear resistant iron-base sintered alloy for rocker arm
IT8026891A0 (it) Procedimento e dispositivo per fondere metalli, specialmente metalli leggeri, pesanti e nobili, nonche' loro leghe.
CA2288647A1 (en) Process for the removal of heavy metals
JPS5242506A (en) Hydrotreating process of petroleum wax
JPS53110082A (en) Copper-clad aluminum wire
JPS5212745A (en) Ornamental ceramic plate for fence, gate door, etc.
DE2861370D1 (en) Antifriction alloy, process for the manufacture thereof, and die and lubricant containing such an alloy
JPS53112595A (en) Laser working device
IT7921534A0 (it) Metodo per formare nuclei di metallo nobile con precipitazione d'argento.
KR960039314A (ko) 리드프레임 제조방법
JPS52114602A (en) Lubricant composition
KR850001737A (ko) N,n-디메틸-2-클로로-5-[3-메틸-2-(페닐이미노)-4-티아졸린-4-일]-페닐설폰아미이드의 포합화합물의 제조방법
JPS51117904A (en) A method for collecting gas generated in metal winning by the wet elec trolytic process
JPS51113902A (en) Assembly bore breakage preventive device for light metal alloy wheels of automobiles
ES2067180T3 (es) Procedimiento de aromatizacion de hidrocarburos que contienen de 5 a 9 atomos de carbono por molecula.

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20091126

Year of fee payment: 13

LAPS Lapse due to unpaid annual fee