KR910003962A - Circuit arrangement for dematrix and distribution of acoustic signals - Google Patents

Circuit arrangement for dematrix and distribution of acoustic signals Download PDF

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Publication number
KR910003962A
KR910003962A KR1019900010449A KR900010449A KR910003962A KR 910003962 A KR910003962 A KR 910003962A KR 1019900010449 A KR1019900010449 A KR 1019900010449A KR 900010449 A KR900010449 A KR 900010449A KR 910003962 A KR910003962 A KR 910003962A
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KR
South Korea
Prior art keywords
stage
input
capacitor
switch
signal
Prior art date
Application number
KR1019900010449A
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Korean (ko)
Inventor
슈바르쯔 헨닝
브란트 하요
Original Assignee
프레데릭 얀 스미트
엔.브이.필립스 글로아이람펜파브리켄
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Application filed by 프레데릭 얀 스미트, 엔.브이.필립스 글로아이람펜파브리켄 filed Critical 프레데릭 얀 스미트
Publication of KR910003962A publication Critical patent/KR910003962A/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H19/00Networks using time-varying elements, e.g. N-path filters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H19/00Networks using time-varying elements, e.g. N-path filters
    • H03H19/004Switched capacitor networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/60Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals
    • H04N5/607Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals for more than one sound signal, e.g. stereo, multilanguages

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Stereo-Broadcasting Methods (AREA)
  • Stereophonic System (AREA)

Abstract

내용 없음.No content.

Description

음향 신호의 매트릭스 해제 및 분배를 위한 회로 장치Circuit arrangement for dematrix and distribution of acoustic signals

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 의한 스위치가 콘덴서 기술로 스테레오 음향 신호 또는 2채널 음향 신호의 매트릭스를 해제시키기 위한 회로장치의 도시도,1 is a diagram showing a circuit arrangement for a switch according to the present invention to release a matrix of stereo sound signals or two-channel sound signals by condenser technology;

제3도는 제1도에 도시한 회로 장치내에서 스위칭 과정을 실시하는 제어 논리의 도시도.FIG. 3 shows control logic for performing a switching process in the circuit arrangement shown in FIG.

Claims (4)

스테레오 또는 2채널 음향 신호의 매트릭스를 해제하고, 스위치 콘덴서식으로 분배하는 회로 장치로서, - 제1입력 (1)을 제1출력(2)에 결합시키고, 제1입력(1)에 공급되는 제1신호를 주사하는 2개의 병렬 접속가능 콘덴서 (C)로 구성된 제1입력 - 스위치 콘덴서단(3)과 이에 접속되고, 제1입력 - 스위치 콘덴서단(3)으로부터 공급되는 제1신호의 주사 값을 적분하는 제1적분단(4)으로 구성되어 있는 제1 전송분기, - 제2입력(5)을 공급되는 제2출력(6)과 결합시키고, 제2입력(5)에 제2신호를 주사하는 제2입력 - 스위치 콘덴서단(7)과 이에 접속되고, 제2입력 - 스위치 콘덴서단(7)으로부터 공급되는 제2신호의 주사 값을 적분하는 제2적분단(8)으로 구성되어있는 제2전송분기, - 고정 접속되어 있는 피드백 콘덴서(C1)와 선택적으로 주사 사이클로 접속 가능한 피드백 콘덴서(Co)에 의하여 교락되는 증폭기가 포함된 제1 및 제2적분기(4,8), - 2개의 콘덴서, 즉 제2신호를 주사하고, 제1콘덴서(C)와 직렬로 접속될 수 있는(P5P7을 거쳐) 제2콘덴서 (2C)와 신호를 계송하고, 제1적분단(4)와 결합될 수 있는 (P8을 거쳐)콘덴서로 구성된 제3스위치 콘덴서단(9)으로 구성되어 있는 제2입력 (5)으로부터 제1적분단(4)으로의 제1결합분기 등이 제공되어 있는 회로 장치에 있어서, - 제1입력 - 스위치 콘덴서단(3)의 콘덴서중 하나로부터 제2적분단(8)까지 접속가능한 제2결합기, -제2입력- 스위치 콘덴서단(7)과 제2적분단(8)사이에, 제2입력(5)에 신호가 제2입력 - 스위치 콘덴서단(7)에 대하여 평행으로 주사될 수 있고, 이러한 2개의 스위치 콘덴서단(7,11)의 주사값이 공통 콘덴서(2C)에 전송될 수 있고, 주사값이 이 콘덴서로부터 제2적분단(8)에 공급될 수 있도록 삽입되어있는 추가 스위치 콘덴서단(11), - 제3스위치 콘덴서단(9)내에서 제1콘덴서에 병렬 접속될 수 있는 (P8을 거쳐)제3콘덴서 등이 더 제공되어 있는 것을 특징으로 하는 회로 장치.A circuit arrangement for releasing a matrix of a stereo or two-channel acoustic signal and distributing it in a switch condenser type, comprising:-a first input (1) coupled to the first output (2) and supplied to the first input (1); Scan value of the first input-switch capacitor stage 3 composed of two parallel connectable capacitors C for scanning one signal and the first signal supplied from the first input-switch capacitor stage 3 connected thereto. A first transmission branch, consisting of a first integrating stage (4), which integrates the second input (5) with the supplied second output (6) and providing a second signal to the second input (5). And a second integrating stage 8 connected to the second input-switch capacitor stage 7 for scanning and integrating the scan value of the second signal supplied from the second input-switch capacitor stage 7. the second transmission branch, - feedback capacitor which is fixed connected to (C 1) and selectively connectable scanning cycle feedback condenser The first and second integrators 4 and 8 with amplifiers entangled by (Co), scan two capacitors, i.e., the second signal, and be connected in series with the first capacitor (C) Consisting of a third switch condenser stage 9 consisting of a capacitor (via P 8 ) which can carry the signal with the second capacitor 2C) via P 5 P 7 and can be coupled with the first integrating stage 4. 1. In a circuit arrangement provided with a first coupling branch from the second input 5 to the first integrating stage 4, etc., the first input-the second from one of the capacitors of the switch capacitor stage 3; A second coupler connectable to the integrating stage 8,-a second input-between the switch condenser stage 7 and the second integrating stage 8, the signal being input to the second input 5 in the second input-switch condenser stage Scanned in parallel with respect to (7), the scan values of these two switch capacitor stages 7 and 11 can be transferred to the common capacitor 2C, and the scan values are transferred from this capacitor to the second integrator stage 8 To be supplied to The additional switch capacitor stage 11 inserted so that it can be inserted in the third switch condenser stage 9 is further provided with a third capacitor (via P 8 ) which can be connected in parallel to the first capacitor. Circuit device. 제1항에 있어서, 적분단(4,8)의 고정 접속된 피드백 콘덴서(C1)에 선택적으로 또다른 피드백 콘덴서(CO1,CO2)를 연속적으로 병렬 접속시킬 수 있는 (S4내지 S7을 거쳐)것을 특징으로 하는 회로 장치.The method according to claim 1, wherein another feedback capacitor (CO 1 , CO 2 ) can be successively connected in parallel to the fixedly connected feedback capacitor (C 1 ) of the integration stage (4, 8) (S 4 to S). Circuit device, characterized in that 7 ). 제1항 또는 제2항에 있어서, 입력신호 선택단 (S1,S2)이 직렬 접속되어 있는 것을 특징으로 하는 회로 장치.The circuit arrangement according to claim 1 or 2, wherein the input signal selection terminals (S 1 , S 2 ) are connected in series. 제1항, 제2항 또는 제3항에 있어서, 입력에 대역 제한 필터(16,17)가 직렬 접속되어 있는 것을 특징으로 하는 회로 장치.4. The circuit arrangement according to claim 1, 2 or 3, wherein a band limiting filter (16, 17) is connected in series with the input. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900010449A 1989-07-12 1990-07-11 Circuit arrangement for dematrix and distribution of acoustic signals KR910003962A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3922867A DE3922867C2 (en) 1989-07-12 1989-07-12 Circuit arrangement for dematrifying and distributing sound signals
NLP3922867.3 1989-07-12

Publications (1)

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KR910003962A true KR910003962A (en) 1991-02-28

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Application Number Title Priority Date Filing Date
KR1019900010449A KR910003962A (en) 1989-07-12 1990-07-11 Circuit arrangement for dematrix and distribution of acoustic signals

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DE (1) DE3922867C2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8503183A (en) * 1985-11-19 1987-06-16 Philips Nv DEMATRICATION CIRCUIT OF THE SWITCHED CAPACITIES TYPE.

Also Published As

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DE3922867A1 (en) 1991-01-24
DE3922867C2 (en) 1997-04-10

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