KR910003754Y1 - Switching circuit for increasing voltage type constant voltage circuit - Google Patents
Switching circuit for increasing voltage type constant voltage circuit Download PDFInfo
- Publication number
- KR910003754Y1 KR910003754Y1 KR2019860005524U KR860005524U KR910003754Y1 KR 910003754 Y1 KR910003754 Y1 KR 910003754Y1 KR 2019860005524 U KR2019860005524 U KR 2019860005524U KR 860005524 U KR860005524 U KR 860005524U KR 910003754 Y1 KR910003754 Y1 KR 910003754Y1
- Authority
- KR
- South Korea
- Prior art keywords
- transistor
- circuit
- voltage
- switching circuit
- type constant
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
- H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
Landscapes
- Dc-Dc Converters (AREA)
Abstract
내용 없음.No content.
Description
제 1 도는 본 고안의 블록도.1 is a block diagram of the present invention.
제 2 도는 본 고안의 회로도.2 is a circuit diagram of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
R1-R2: 저항 Q1-Q3: 트랜지스터R 1 -R 2 : Resistor Q 1 -Q 3 : Transistor
ZD : 제너다이오드ZD: Zener Diode
본 고안은 저전위 입력전압으로 다수개의 고전위 출력전압을 얻을 경우 복잡한 트랜스의 스위칭 회로를 간단하게 구성한 승압형 정전압 회로의 스위칭 회로에 관한 것이다.The present invention relates to a switching circuit of a step-up constant voltage circuit that simply constitutes a switching circuit of a complex transformer when a plurality of high potential output voltages are obtained with a low potential input voltage.
종래에는 일반적으로 저전압이 입력되어 고정위의 출력전압을 얻는 승압형 정전압 회로에 있어서 다수개의 전위전압이 필요할 경우에 이에 따른 정류 및 평활회로의 수가 증가됨으로서 트랜스의 구조가 복잡하여지고 그에 따른 가격 및 소비전력을 상승 되었었다.Conventionally, in a boost type constant voltage circuit in which a low voltage is input to obtain a fixed voltage output voltage, when a plurality of potential voltages are required, the number of rectification and smoothing circuits is increased, resulting in a complicated structure of the transformer and thus a cost and Power consumption had risen.
본 고안은 상기와 같은 종래의 제결점을 해소시키기 위하여 정전압 회로의 스위칭 회로를 간단하게 고안함으로서 다수개의 고전위 출력을 얻을 수 있도록 한 것이다.The present invention is intended to obtain a plurality of high potential output by simply devising a switching circuit of the constant voltage circuit in order to solve the above conventional drawbacks.
이하, 본 고안의 바람직한 구성을 첨부된 도면에 의하여 상세히 설명하면 다음과 같다.Hereinafter, described in detail by the accompanying drawings a preferred configuration of the present invention as follows.
통상의 발진기에 있어서, 출력단의 접속점(a)에 트랜지스터(Q1)(Q2)를 다링톤 접속하고 저항(R1) 및 트랜지스터(Q3)의 컬렉터를 연결하되 그의 베이스 측에는 저항(R2) 및 제너다이오드(ZD)의 캐소우드 측과 접속점(b)에 다이오드(D1) 및 콘덴서(C1)를 연결하여서 구성된 것이다.In a typical oscillator, Darlington connects transistors Q 1 and Q 2 to the connection point a of the output terminal, and connects the collectors of resistors R 1 and Q 3 to the base side of the resistor R 2. ) And a diode (D 1 ) and a capacitor (C 1 ) are connected to the cathode side of the zener diode (ZD) and the connection point (b).
도면중 미설명부호 (L1)는 인덕터를 표시한다.In the drawing, reference numeral L 1 denotes an inductor.
이와 같이 구성된 본 고안의 작용효과를 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above are as follows.
입력단(A)에 저전위 입력전압이 입력되면 발진기는 발진을 하게되며 전류는 저항(R1)을 통하여 트랜지스터(Q1)에 인가되며 트랜지스터(Q1)은 npn형이므로 도통되어 입력전류는 인덕터(L1)를 통하여 트랜지스터(Q1)의 컬렉터와 에미터에 전류를 흘릴 때 트랜지스터(Q1)의 에미터에 접속되어 있는 트랜지스터(Q2)의 베이스와 에키터도 도통되므로 입력 전류는 트랜지스터(Q2)의 컬렉터와 에미터로 전류를 흘리게 된다.When the low potential input voltage is input to the input terminal A, the oscillator oscillates and the current is applied to the transistor Q 1 through the resistor R 1 , and the transistor Q 1 is npn type, so it is conducting and the input current is inductor. When current flows through the collector and emitter of transistor Q 1 through L 1 , the base and the emitter of transistor Q 2 connected to the emitter of transistor Q 1 are also conducted, so that the input current Current will flow through the collector and emitter at (Q 2 ).
따라서 접속점(b)는 저전위가 되고 인덕터(L1)에는 자기 전류가 발생되며 콘덴서(C1)은 인덕터(L1)의 자기 전력과 입력전력이 더해져 충전을 하게 되며 콘덴서(C1)가 설정 전압에 도달하게 되면 전류는 제너다이오드(ZD)와 저항(R2)를 거쳐 트랜지스터(Q3)의 베이스에 가해지므로 트랜지스터(Q3)는 도통되어 트랜지스터(Q1)(Q2)에 흐르던 전류는 저항(R1)을 거쳐 트랜지스터(Q3)의 컬렉터와 에미터로 흐르게 되므로 트랜지스터(Q1)(Q2)는 오프된다.Therefore, the connection point (b) is a low potential and is, the magnetic current generated inductor (L 1) a capacitor (C 1) is deohaejyeo the magnetic power and the input power of the inductor (L 1) and the charging capacitor (C 1) is When the set voltage is reached, current is applied to the base of the transistor Q 3 through the zener diode ZD and the resistor R 2 , so that the transistor Q 3 is conducted and flows in the transistor Q 1 (Q 2 ). The current flows through the resistor R 1 to the collector and emitter of the transistor Q 3 , so the transistor Q 1 and Q 2 are turned off.
따라서 접속점(b)는 입력 전류와 동일 전위가 되고 콘덴서(C1)에 충전된 전하는 방전을 하게되며 콘덴서(C1)의 방전으로 인하여 저항(R2)과 제너다이오드(ZD) 및 트랜지스터(Q3)의 베이스와 에미터의 한계 전압 이하가 되면 트랜지스터(Q3)는 부도통되어 오프되고 입력전류는 저항(R1)을 거쳐 트랜지스터(Q1)(Q2)를 도통시키므로 콘덴서(C1)는 인덕터(L1)의 자기 전류와 입력 전압이 더해져 충전을 한다. 따라서 위와 같은 연속 동작으로 콘덴서(C1)가 충방전을 하여 출력단(B)에는 입력전류와 인덕터(L1)의 자기 전류가 더해져 입력단(A) 보다 높은 고전위의 출력 전압을 유지한다.Therefore, the connection point (b) is the same potential as the input current and the capacitor (C 1) and to the charge discharging a charged due to the discharge of the capacitor (C 1) resistance (R 2) and a Zener diode (ZD) and a transistor for (Q 3) When the threshold voltage or less of the base and the emitter transistor (Q 3) is off the barrel default input current resistance (R 1) a through because the transistor (Q 1) (Q 2) interconnecting the condenser (C 1 ) Is charged by adding the magnetic current of the inductor (L 1 ) and the input voltage. Therefore, the capacitor C 1 charges and discharges in the continuous operation as described above, and the output current B is added to the input current and the magnetic current of the inductor L 1 to maintain the high voltage output voltage higher than the input terminal A.
이상에서와 같이 본 고안은 저전위의 입력전압으로 다수개의 고전위 출력 전압이 필요할 경우 이에 따른 트랜스내의 정전압 회로에서 스위칭회로를 간단하게 하여 제품의 소형화의 가격의 절감 및 고효율을 얻을 수 있는 효과가 있다.As described above, the present invention has the effect of reducing the cost and minimizing the size of the product by simplifying the switching circuit in the constant voltage circuit in the transformer when a plurality of high potential output voltages are required as the low potential input voltage. have.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860005524U KR910003754Y1 (en) | 1986-04-23 | 1986-04-23 | Switching circuit for increasing voltage type constant voltage circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860005524U KR910003754Y1 (en) | 1986-04-23 | 1986-04-23 | Switching circuit for increasing voltage type constant voltage circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR870017462U KR870017462U (en) | 1987-11-30 |
| KR910003754Y1 true KR910003754Y1 (en) | 1991-06-01 |
Family
ID=19250998
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019860005524U KR910003754Y1 (en) | 1986-04-23 | 1986-04-23 | Switching circuit for increasing voltage type constant voltage circuit |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR910003754Y1 (en) |
-
1986
- 1986-04-23 KR KR2019860005524U patent/KR910003754Y1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR870017462U (en) | 1987-11-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5436550A (en) | AC-DC converter having saw-tooth wave generating circuit in active filter | |
| KR100381971B1 (en) | Self-contained DC-DC converter | |
| US5699237A (en) | Self-oscillating switching power supply with output voltage regulated from the primary side | |
| US5341085A (en) | Power supply circuit with standby arrangement | |
| EP0612140A1 (en) | Charge pump circuit | |
| EP0662747B1 (en) | A DC/DC converter for outputting multiple signals | |
| EP0507398B1 (en) | Circuit arrangement | |
| KR910003754Y1 (en) | Switching circuit for increasing voltage type constant voltage circuit | |
| US4347561A (en) | Alternating current to direct current power supply | |
| CN115940642A (en) | Switch tube conduction speed control circuit | |
| US4163179A (en) | Circuit for providing saw-tooth current in a coil | |
| JPH04127307A (en) | Power source circuit | |
| US4247805A (en) | Circuit for driving saw-tooth current in a coil | |
| US4698559A (en) | Power amplifiers for driving inductive loads | |
| EP0580198B1 (en) | Power supply circuit with standby arrangement | |
| SU913534A1 (en) | Self-excited transistorized inverter | |
| SU892606A1 (en) | Smoothing filter | |
| JPS5843215Y2 (en) | Plunger drive circuit | |
| SU750455A1 (en) | Switch-type dc voltage stabilizer | |
| JP2614056B2 (en) | DC / DC converter | |
| SU1081698A1 (en) | Device for control of electromagnetic mechanism | |
| JPH05347546A (en) | Switching circuit for electrostatic induction thyristor | |
| JPS5924216Y2 (en) | power circuit | |
| KR790001139Y1 (en) | Switching circuit | |
| JPS6149221A (en) | Power supply device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E902 | Notification of reason for refusal | ||
| E701 | Decision to grant or registration of patent right | ||
| REGI | Registration of establishment | ||
| FPAY | Annual fee payment |
Payment date: 19990601 Year of fee payment: 9 |
|
| LAPS | Lapse due to unpaid annual fee |