KR900018838A - Priority interrupt control circuit - Google Patents

Priority interrupt control circuit Download PDF

Info

Publication number
KR900018838A
KR900018838A KR1019890007317A KR890007317A KR900018838A KR 900018838 A KR900018838 A KR 900018838A KR 1019890007317 A KR1019890007317 A KR 1019890007317A KR 890007317 A KR890007317 A KR 890007317A KR 900018838 A KR900018838 A KR 900018838A
Authority
KR
South Korea
Prior art keywords
control circuit
interrupt control
encoder
cpu
priority interrupt
Prior art date
Application number
KR1019890007317A
Other languages
Korean (ko)
Other versions
KR910007748B1 (en
Inventor
서정석
Original Assignee
정용문
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 정용문, 삼성전자 주식회사 filed Critical 정용문
Priority to KR1019890007317A priority Critical patent/KR910007748B1/en
Publication of KR900018838A publication Critical patent/KR900018838A/en
Application granted granted Critical
Publication of KR910007748B1 publication Critical patent/KR910007748B1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

내용 없음No content

Description

우선순위 인터럽트 제어회로Priority interrupt control circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 회로도.2 is a circuit diagram of the present invention.

Claims (2)

CPU 및 주변기기들을 구비한 퍼스널콤퓨타나 자동제어장치에 있어서, 주변기기로부터 인터럽트신호가 발생되는가를 검출하여 정해진 순위에 따라 코드화하는 인코더(30)와, 상기 검출된 인터럽트 신호가 시스템에 의해 발생되었는지의 여부를 판단하여 CPU에 IRQ를 인가하기 위하여 상기 인코더(30)의 출력을 기준 인터럽트 레벨값과 비교는 비교기(40)와, 상기 인코더(30)과 주변기기들 사이에 접속되어 인터럽트신호를 중계하는 중계수단으로 구성됨을 특징으로 하는 우선순위 인터럽트 제어회로.In a personal computer or automatic control device having a CPU and peripheral devices, an encoder 30 which detects whether an interrupt signal is generated from a peripheral device and codes it according to a predetermined rank, and whether or not the detected interrupt signal is generated by a system. The relay means for comparing the output of the encoder 30 with the reference interrupt level value to determine the value and apply the IRQ to the CPU is connected between the comparator 40 and the encoder 30 and the peripheral devices to relay the interrupt signal. Priority interrupt control circuit, characterized in that consisting of. 제1항에 있어서, 중계수단은CPU로부터 인가되는SIE에 의해 작동을 개시하고 비교기(40)의 출력인IRQ 에 의해 작동을 종료함을 특징으로 하는 우선순위 인터럽트 제어회로.The priority interrupt control circuit according to claim 1, wherein the relay means starts operation by an SIE applied from the CPU and ends operation by an IRQ which is an output of the comparator (40). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890007317A 1989-05-31 1989-05-31 Priority interrupt control circuit KR910007748B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890007317A KR910007748B1 (en) 1989-05-31 1989-05-31 Priority interrupt control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890007317A KR910007748B1 (en) 1989-05-31 1989-05-31 Priority interrupt control circuit

Publications (2)

Publication Number Publication Date
KR900018838A true KR900018838A (en) 1990-12-22
KR910007748B1 KR910007748B1 (en) 1991-09-30

Family

ID=19286610

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890007317A KR910007748B1 (en) 1989-05-31 1989-05-31 Priority interrupt control circuit

Country Status (1)

Country Link
KR (1) KR910007748B1 (en)

Also Published As

Publication number Publication date
KR910007748B1 (en) 1991-09-30

Similar Documents

Publication Publication Date Title
KR890012385A (en) Semiconductor integrated circuit
KR830008282A (en) Control method of electronic device
KR920010561A (en) Home Bus Control Device
KR970049288A (en) Reset device and method of central processing unit
KR870004569A (en) Automatic gain control device
KR900005311A (en) Interrupt Control Device
ATE33372T1 (en) CIRCULATING RACK.
KR960001991A (en) Information processing device
KR910017255A (en) Vehicle control unit
KR870010435A (en) Display data output control device of data processing device
KR900018838A (en) Priority interrupt control circuit
KR840004964A (en) Key board with microcomputered encoder
KR840003159A (en) Inverter Control Circuit
KR910009307A (en) Input device for computer
KR870007588A (en) Emergency reset circuit of semiconductor laser driver
KR870009335A (en) Tracking control device
KR930008577A (en) Sleep Mode Circuit Unaffected by Timer Interrupts
KR840007188A (en) Machine check interrupt processing system
KR830007412A (en) Call signal converter of elevator
KR890010632A (en) Platen protector of electronic copier
KR890009689A (en) Auto stop device
KR840000803A (en) Response Measurement Control
JPS5741745A (en) Malfunction preventing circuit of microprocessor
KR910012945A (en) Control device of computer peripheral device and its control method
KR930001580A (en) Keyboard Controller Reset Circuit

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20020830

Year of fee payment: 12

LAPS Lapse due to unpaid annual fee