KR900009974Y1 - Mode control of a/v system - Google Patents
Mode control of a/v system Download PDFInfo
- Publication number
- KR900009974Y1 KR900009974Y1 KR2019860015765U KR860015765U KR900009974Y1 KR 900009974 Y1 KR900009974 Y1 KR 900009974Y1 KR 2019860015765 U KR2019860015765 U KR 2019860015765U KR 860015765 U KR860015765 U KR 860015765U KR 900009974 Y1 KR900009974 Y1 KR 900009974Y1
- Authority
- KR
- South Korea
- Prior art keywords
- transistor
- mode
- signal
- video
- switching
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/46—Receiver circuitry for the reception of television signals according to analogue transmission standards for receiving on more than one standard at will
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/002—Switching arrangements with several input- or output terminals
- H03K17/007—Switching arrangements with several input- or output terminals with several outputs only
Abstract
내용 없음.No content.
Description
제1도는 본 고안의 블럭도.1 is a block diagram of the present invention.
제2도는 본 고안의 상세한 회로도.2 is a detailed circuit diagram of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 모드선택부 2 : 주제어부1: Mode selector 2: Main controller
3 : 스위칭제어부 4 : 표시부3: switching control unit 4: display unit
5 : 입출력스위치부5: I / O switch unit
본 고안은 A/V(Audio/Video)시스템의 텔레비젼 신호와 비데오신호를 절환하여 입력하는 모드제어회로에 관한 것이다.The present invention relates to a mode control circuit for switching and inputting a television signal and a video signal of an A / V (Audio / Video) system.
종래의 A/V 시스템의 모드 선택시에 비데오 신호와 텔레비젼 신호를 수신할 경우 하나의 스위치를 이용해서 수신하기 때문에 모드 절환에 따른 표시가 나타나지 않아 사용자의 불편이 있었다.When the video signal and the TV signal are received in the mode selection of the conventional A / V system, since the signal is received using a single switch, the display according to the mode switching does not appear, which causes inconvenience to the user.
따라서, 본 고안의 목적은 마이크로 컴퓨터를 이용해서 비데오신호와 텔레비젼 신호를 수신할 때 절환표시가 나타나게 해주어서 사용자가 쉽게 구별할 수 있도록한 모드제어회로를 제공하는 데 있다.Accordingly, it is an object of the present invention to provide a mode control circuit that enables a user to easily distinguish between the display and the display when a video signal and a television signal are received using a microcomputer.
이하 첨부된 도면에 의거하여 본 고안을 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
제1도는 본 고안의 블럭도로서, 비데오와 텔레비젼 수신신호를 선택하도록 하는 모드선택부(1)에서 어떤 모드가 선택되면, 마이크로 컴퓨터의 주제어부(2)에서는 비데오모드가 선택될 때에는 논리 "0"(로우레벨)신호를 출력하고, 텔레비젼 모드가 선택될시에는 논리 "1"(하이레벨)신호가 출력된다.FIG. 1 is a block diagram of the present invention, in which a mode is selected in the mode selection unit 1 for selecting a video and a television reception signal, a logic " 0 " when the video mode is selected in the main control unit 2 of the microcomputer. Outputs a "(low level) signal, and a logic" 1 "(high level) signal is output when the television mode is selected.
그리고, 상기한 주제어부(2)의 출력신호에 따라 스위칭되는 스위칭제어부(3)에서는 모드 선택을 표시하는 표시부(4)에 발광다이오드의 구동신호를 출력함과 동시에 텔레비젼 신호와 비데오 신호가 절환되어서 입출력되도록 하는 입출력스위치부(5)에 제어신호를 출력한다.In addition, in the switching controller 3 which is switched according to the output signal of the main controller 2, the driving signal of the light emitting diode is output to the display unit 4 indicating the mode selection, and the television signal and the video signal are switched. A control signal is output to the input / output switch unit 5 which inputs and outputs.
제2도는 상기한 구성을 갖는 본 고안의 상세한 회로도이다.2 is a detailed circuit diagram of the present invention having the above configuration.
도면에서, 모드선택부(1)는 스위치(SW1-SW3)에 대응되고, 주제어부(2)는 마이크로 컴퓨터에 대응되며, 스위칭제어부(3)는 낸드게이트 IC(NAND)와 트랜지스터(Q1-Q6) 및 저항(R1-R10)에 대응된다.In the figure, the mode selector 1 corresponds to the switches SW1-SW3, the main control unit 2 corresponds to a microcomputer, and the switching controller 3 corresponds to the NAND gate IC (NAND) and the transistors Q1-Q6. ) And resistors R1-R10.
그리고, 표시부(4)는 발광다이오드(D1-D3)에 대응되고 입출력스위치부(5)는 스위칭회로(SH1,SH2)와 저항(R11-R16) 및 콘덴서(C1-C6)에 대응된다.The display unit 4 corresponds to the light emitting diodes D1-D3, and the input / output switch unit 5 corresponds to the switching circuits SH1 and SH2, the resistors R11-R16, and the capacitors C1-C6.
이와같이 본 고안의 구성에서 사용자가 제1비데오 신호를 인가할 경우에 스위치(SW3)을 "온"시키면 주제어부(2)인 마이크로 컴퓨터의 인가단자(A/V)에서 논리 "0"신호가 인가되는데, 이 논리 "0"신호가 트랜지스터(Q5)의 베이스에 인가되어서 도통시킴에 따라 트랜지스터(Q5)의 에미터에 나타난 논리 "1"신호가 콜렉터를 거쳐 발광다이오드(D3)를 도통시켜서 제1비데오 신호를 사용함을 표시한다.As described above, when the user applies the first video signal, when the switch SW3 is turned on, a logic "0" signal is applied from the application terminal A / V of the microcomputer, which is the main control unit 2. As the logic " 0 " signal is applied to the base of transistor Q5 and conducts, the logic " 1 " signal appearing at the emitter of transistor Q5 conducts the light emitting diode D3 through the collector and conducts the first operation. Indicates that a video signal is used.
이 때, 트랜지스터(Q5)의 콜렉터신호가 트랜지스터(Q6)의 베이스에 인가되어 도통시켜서 이 트랜지스터(Q6)의 콜렉터에 나타나는 논리 "0"신호가 스위칭회로(SH1,SH2)에 인가됨에 따라 제1비데오 신호가 절환된다.At this time, the collector signal of the transistor Q5 is applied to the base of the transistor Q6 and conducts, so that a logic " 0 " signal appearing at the collector of the transistor Q6 is applied to the switching circuits SH1 and SH2. The video signal is switched.
그러나, 제2비데오 신호를 인가할 경우 스위치(SW2)를 "온"시키면 마이크로 컴퓨터의 인가단자(A/V)에서 논리 "0"신호가 출력되기 때문에 트랜지스터(Q2)의 콜렉터에 논리 "1"신호가 나타나고, 트랜지스터(Q2)의 베이스에는 논리 "0"신호가 인가되므로 다이오드(D2)가 점등됨과 동시에 트랜지스터(Q3)의 콜렉터에 나타난 논리 "1" 신호가 스위칭회로(SH1,SH2)에 인가되기 때문에 제2비데오 신호를 수신할 수 있다.However, when the second video signal is applied, when the switch SW2 is turned "on", the logic "1" is outputted to the collector of the transistor Q2 because a logic "0" signal is output from the application terminal A / V of the microcomputer. A signal appears and a logic "0" signal is applied to the base of the transistor Q2, so that the diode D2 is turned on and a logic "1" signal appearing at the collector of the transistor Q3 is applied to the switching circuits SH1 and SH2. The second video signal can be received.
또한, 스위치(SW1)를 "온"시키면 마이크로 컴퓨터의 인가단자(A/V)에서 논리 "1"신호가 출력되기 때문에 트랜지스터(Q3,Q6)의 콜렉터에 나타난 논리 "1"신호가 스위칭회로(SH1,SH2)에 인가된다.In addition, when the switch SW1 is turned "on", the logic "1" signal is output from the application terminal A / V of the microcomputer, so that the logic "1" signal appearing at the collectors of the transistors Q3 and Q6 is converted into a switching circuit ( SH1, SH2).
이 때, 텔레비젼 신호를 수신할 수 있으며 표시부(4)의 발광다이오드(D1)가 점등되어 표시된다.At this time, a television signal can be received and the light emitting diode D1 of the display section 4 is lit and displayed.
이상과 같이 본 고안에 의하면 비데오와 텔레비젼의 신호를 절환하여 수신됨과 동시에 모드 선택의 표시를 할 수 있다.As described above, according to the present invention, the mode and the display of the mode selection can be displayed while the signals of the video and the television are switched.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860015765U KR900009974Y1 (en) | 1986-10-15 | 1986-10-15 | Mode control of a/v system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860015765U KR900009974Y1 (en) | 1986-10-15 | 1986-10-15 | Mode control of a/v system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR880008861U KR880008861U (en) | 1988-06-30 |
| KR900009974Y1 true KR900009974Y1 (en) | 1990-10-22 |
Family
ID=19256285
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019860015765U KR900009974Y1 (en) | 1986-10-15 | 1986-10-15 | Mode control of a/v system |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR900009974Y1 (en) |
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1986
- 1986-10-15 KR KR2019860015765U patent/KR900009974Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR880008861U (en) | 1988-06-30 |
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