KR900008856Y1 - Signal switching circuit in reservation rewrding - Google Patents

Signal switching circuit in reservation rewrding Download PDF

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Publication number
KR900008856Y1
KR900008856Y1 KR2019870013245U KR870013245U KR900008856Y1 KR 900008856 Y1 KR900008856 Y1 KR 900008856Y1 KR 2019870013245 U KR2019870013245 U KR 2019870013245U KR 870013245 U KR870013245 U KR 870013245U KR 900008856 Y1 KR900008856 Y1 KR 900008856Y1
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South Korea
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transistor
line
tuner
vps
base
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KR2019870013245U
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Korean (ko)
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KR890005503U (en
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김종화
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주식회사 금성사
최근선
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B15/00Driving, starting or stopping record carriers of filamentary or web form; Driving both such record carriers and heads; Guiding such record carriers or containers therefor; Control thereof; Control of operating function
    • G11B15/02Control of operating function, e.g. switching from recording to reproducing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/268Signal distribution or switching

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Signal Processing For Recording (AREA)
  • Electronic Switches (AREA)

Abstract

내용 없음.No content.

Description

예약녹화시 신호 절환회로Signal switching circuit during reservation recording

첨부된 도면은 본 고안의 신호 절환회로도이다.The accompanying drawings are signal switching circuit diagrams of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

TR1-TR5 : 트랜지스터 R1-R9 : 저항TR1-TR5: Transistor R1-R9: Resistor

C1-C4 : 콘덴서 D1,D2 : 다이오드C1-C4: Capacitor D1, D2: Diode

SW1 : VPS 구동스위치 SW2 : 라인/튜너 선택스위치SW1: VPS drive switch SW2: Line / tuner selection switch

L1 : 라인영상신호입력단자 TU : 영상신호입력단자.L1: Line video signal input terminal TU: Video signal input terminal.

본 고안은 VPS(Video Programming System)으로 자동제어 되는 비디오 카세트 레코더에 있어서 VPS 구동스위치를 단락시켜 예약녹화를 할 경우에 라인/튜너선책스위치의 절환에 관계없이 튜너영상신호 즉, 튜너부가 텔레비젼 방송신호를 튜닝한 영상신호를 자동으로 선택하여 출력하게 한 예약녹화시 신호 절환회로에 관한 것이다.The present invention is a video cassette recorder that is automatically controlled by a VPS (Video Programming System), when the VPS drive switch is short-circuited and reserved recording is performed, the tuner video signal, that is, the tuner unit is a television broadcast signal regardless of the line / tuner selection switch switching. The present invention relates to a signal switching circuit during reservation recording which automatically selects and outputs a tuned video signal.

종래에는 VPS 구동스위치의 단락에 관계없이 라인/튜너 스위치의 절환에 따라 라인영상신호 또는 튜너 영상신호가 출력되게 구성하였으므로 VPS 구동스위치를 단락시켜 예약녹화를 할 경우에 사용자가 실수로 라인영상신호가 선택되게 라인/튜너선택스위치를 절환시키면, 예약녹화시간이 되어 비디오 카세트 레코더가 정상적인 녹화상태로 되어도 비디오 테이프에 아무신호도 녹화되지 않는 결함이 있었다.In the related art, the line video signal or tuner video signal is outputted according to the line / tuner switch switching regardless of the short circuit of the VPS drive switch. When the line / tuner selection switch was switched to be selected, there was a defect that no signal was recorded on the video tape even when the video cassette recorder became a normal recording state due to the reserved recording time.

본 고안은 이와같은 종래의 결함을 감안하여 VPS 구동 스위치를 단락시키면, 라인/튜너선택스위치의 절환에 관계없이 튜너영상신호가 출력되게 함으로써 예약녹화시 비디오 테이프에 아무신호도 녹화되지 않는 것을 방지하게 안출한 것으로, 이를 첨부된 도면에 의하여 상세히 설명하면 다음과 같다.The present invention, in view of such a conventional deficiency, short-circuits the VPS drive switch so that the tuner video signal is output regardless of the line / tuner selection switch switching, thereby preventing any signal from being recorded on the video tape during the scheduled recording. It will be described in detail with reference to the accompanying drawings as follows.

첨부된 도면은 본 고안의 절환회로도로서, 이에 도시한 바와 같이 라인 및 튜너영상신호입력단자(L1)(TU)를 트랜지스터(TR1)(TR2)의 베이스에 접속하여 트랜지스터(TR1)(TR2)의 에미터를 저항(R1)(R2)및 콘덴서(C1)(C2)에 접속함과 아울러 그 접속점을 콘덴서(C3)(C4) 및 저항 (R3)(R4), 다이오드(D1)(D2)를 통해 출력단자(OUT)에 접속하고, 전원단자(Vcc)를 저항(R5)및 VPS 구동스위치(SW1)를 통해 시스템 콘트롤러에 접속함과 아울러 그 접속점을 저항(R6)(R7)을 각기 통해 트랜지스터(TR3)의 베이스와, 트랜지스터(TR4)의 베이스 및 저항(R8)에 접속하여, 그 트랜지스터(TR4)의 콜렉터를 트랜지스터(TR5)의 베이스에 접속하고, 트랜지스터(TR3)(TR5)의 콜렉터는 상기 콘덴서(C3)(C4)및 저항 (R3)(R4), 다이오드(D1)(D2)의 접속점에 접속하는 한편, 전원단자(Vcc)를 저항(R9)을 통해 라인/튜너선택스위치(SW2)의 가동단자에 접속하고, 라인/튜너선택스위치(SW2)의 일측 및 타측고정단자(a2)(b)는 상기 트랜지스터(TR3)(TR5)의 베이스에 접속하여 구성하였다.The accompanying drawings are a switching circuit diagram of the present invention, and as shown therein, the line and tuner video signal input terminals L1 and TU are connected to the bases of the transistors TR1 and TR2 to form the transistors TR1 and TR2. Connect the emitter to resistors R1 (R2) and capacitors C1 (C2), and connect the capacitors to capacitors C3 (C4), resistors R3 (R4), and diodes D1 (D2). To the output terminal (OUT) through the power supply terminal (Vcc) to the system controller through the resistor (R5) and VPS drive switch (SW1), and the connection point through the resistors (R6) and (R7) respectively The base of the transistor TR3, the base of the transistor TR4, and the resistor R8 are connected, the collector of the transistor TR4 is connected to the base of the transistor TR5, and the collectors of the transistors TR3, TR5 are The capacitor C3 (C4) and resistors R3 (R4) and diodes D1 (D2) are connected to the connection points, while the power supply terminal Vcc is connected via the resistor R9 to the line / tuner selection switch. Connected to a movable terminal of the (SW2), and the one side and the other side fixed terminal of a line / tuner selection switch (SW2) (a2) (b) was formed by connecting the base of said transistor (TR3) (TR5).

이와 같이 구성된 본 고안의 작용효과를 상세히 설명하면 다음과 같다.Referring to the effect of the present invention configured in this way in detail as follows.

전원단자(Vcc)에 전원이 인가되고, 라인 및 튜너영상 신호입력단자(L1)(TU)로 라인 및 튜너영상신호가 각기 입력되는 상태에서 VPS 구동스위치(SW1)를 개방시키고, 라인/튜너선택스위치(SW2)의 가동단자를 일측고정단자(a2)에 단락시키면, 전원단자(Vcc)의 전원이 저항(R9)및 라인/튜너선택스위치(SW2)를 통해 트랜지스터(TR3)의 베이스에 인가되어 그가 온되고, 이에 따라 라인영상신호입력단자(LI)로 입력되어 트랜지스터(TR1)의 에미터로 출력된 라인영상신호는 콘덴서(C3)및 트랜지스터(TR3)를 통해 접지로 흐르게 되어 출력단자(OUT)로는 출력되지 않게 된다. 또한 트랜지스터(TR5)의 베이스에는 저전위가 인가되어 그가 오프되므로 튜너영상신호입력단자(TU)로 입력되어 트랜지스터(TR2)에 에미터로 출력되는 튜너영상신호는 콘덴서(C4)및 다이오드(D2)를 통해 출력단자(OUT)로 출력된다.Open the VPS drive switch (SW1) while power is supplied to the power supply terminal (Vcc) and the line and tuner video signals are input to the line and tuner video signal input terminals (L1) (TU), respectively. When the movable terminal of the switch SW2 is shorted to one fixed terminal a2, the power of the power supply terminal Vcc is applied to the base of the transistor TR3 through the resistor R9 and the line / tuner selection switch SW2. It is turned on, and thus, the line video signal inputted to the line video signal input terminal LI and output to the emitter of the transistor TR1 flows to the ground through the capacitor C3 and the transistor TR3 to output the output terminal OUT. ) Will not be printed. In addition, since the low potential is applied to the base of the transistor TR5 and it is turned off, the tuner video signal input to the tuner video signal input terminal TU and output to the transistor TR2 as an emitter is a capacitor C4 and a diode D2. It is output to the output terminal (OUT) through.

그리고, 라인/튜너선택스위치(SW2)의 가동단자를 타측고정단자(b2)에 단락시키면, 전원단자(Vcc)의 전원이 저항(R9)및 라인/튜너선택스위치(SW2)를 통해 트랜지스터(TR5)의 베이스에 인가되어 그가 온되고, 트랜지스터(TR3)의 베이스에는 저전위가 인가되어 오프된다. 이에 따라 트랜지스터(TR1)의 에미터로 출력되는 라인영상신호는 콘덴서(C3)및 다이오드(D1)를 통해 출력되고, 트랜지스터(TR2)의 에미터로 출력되는 튜너영상신호는 콘덴서(C4)및 트랜지스터(TR5)를 통해 접지로 흐르게 된다.Then, when the movable terminal of the line / tuner selector switch SW2 is shorted to the other fixed terminal b2, the power supply of the power supply terminal Vcc passes through the resistor R9 and the line / tuner selector switch SW2 through the transistor TR5. Is applied to the base of < RTI ID = 0.0 >), and < / RTI > Accordingly, the line image signal output to the emitter of the transistor TR1 is output through the capacitor C3 and the diode D1, and the tuner image signal output to the emitter of the transistor TR2 is the capacitor C4 and the transistor. It flows to ground through TR5.

즉, VPS 구동스위치(SW1)를 개방시킨 상태에서는 라인/튜너선택스위치(SW2)의 절환에 따라 라인영상신호 또는 튜너영상신호가 선택되어 출력단자(OUT)로 출력된다.That is, in the state where the VPS driving switch SW1 is opened, the line image signal or the tuner image signal is selected and output to the output terminal OUT according to the switching of the line / tuner selection switch SW2.

한편, VPS 기능으로 예약녹화를 하기 위하여 VPS 구동스위치(SW1)를 단락시키면, 전원단자(Vcc)의 전원이 저항(R5)및 그 VPS 구동스위치(SW1)를 통해 시스템 콘트롤러에 입력되어 VPS가 구동됨과 아울러 트랜지스터(TR3)(TR4)의 베이스에 고전위가 인가되어 그 트랜지스터(TR3)(TR4)가 온된다.On the other hand, when the VPS drive switch SW1 is shorted to perform the reserved recording by the VPS function, the power of the power supply terminal Vcc is input to the system controller through the resistor R5 and the VPS drive switch SW1 to drive the VPS. In addition, a high potential is applied to the base of the transistors TR3 and TR4, and the transistors TR3 and TR4 are turned on.

따라서 이때 라인/튜너선택스위치(SW2)가 라인선택단자인 타측고정단자(b2)에 단락되어 있는 경우에도 그 라인/튜너선택스위치(SW2)의 타측고정단자(b2)를 통하게 되는 전원은 상기 트랜지스터(TR4)를 통해 접지로 흐르게 되어 트랜지스터(TR5)의 베이스에 저전위가 인가되므로 그 트랜지스터(TR5)는 오프상태를 유지하게 된다.Therefore, even when the line / tuner selection switch SW2 is short-circuited to the other fixed terminal b2, which is a line selection terminal, the power supplied through the other fixed terminal b2 of the line / tuner selection switch SW2 is the transistor. Since the potential flows to ground through TR4 and a low potential is applied to the base of the transistor TR5, the transistor TR5 is maintained in the off state.

이와 같이 VPS 구동스위치(SW1)를 단락시킨 경우에는 라인/튜너선택스위치(SW2)의 선택위치에 관계없이 트랜지스터(TR3)은 온되고, 트랜지스터(TR5)는 오프상태를 유지하게 되고, 이에따라 트랜지스터(TR1)의 에미터로 출력되는 라인 영상신호는 콘덴서(C3)및 트랜지스터(TR3)를 통해 접지로 흐르게 되고 (TR2)의 에미터로 출력되는 튜너영상신호는 콘덴서(C3) 및 트랜지스터(TR3)르 통해 출력단자(OUT)로 출력된다.When the VPS drive switch SW1 is shorted as described above, the transistor TR3 is turned on and the transistor TR5 is kept off regardless of the selection position of the line / tuner selection switch SW2. The line video signal output to the emitter of TR1 flows to ground through the capacitor C3 and the transistor TR3, and the tuner video signal output to the emitter of TR2 is connected to the capacitor C3 and the transistor TR3. Through the output terminal (OUT) through.

이상에서 설명한 바와 같이 본 고안은 VPS 구동스위치를 단락시켜 예약녹화를 할 경우에 라인/튜너선택스위치의 절환에 관계없이 튜너영상신호를 선택하여 출력하므로 예약녹화시 사용자의 조작미숙으로 인하여 라인/튜너선택스위치가 라인위치에 있는 경우에도 비디오 테이프에 아무신호도 녹화되지 않는 것을 방지하는 효과가 있다.As described above, the present invention selects and outputs a tuner video signal regardless of switching of the line / tuner selection switch when making a reservation recording by shorting the VPS drive switch. Even when the selector switch is in the line position, there is an effect of preventing any signal from being recorded on the videotape.

Claims (1)

라인 및 튜너영상신호입력단자(LI)(TU)를 트랜지스터(TR1)(TR2)의 베이스에 접속하여 그의 에미터를 출력단자(OUT)측에 접속하고, 전원단자(Vcc)를 VPS 구동스위치(SW1)를 통해 트랜지스터(TR3)(TR4)의 베이스측에 접속하여, 그 트랜지스터(TR4)의 콜렉터를 트랜지스터(TR5)의 베이스에 접속하며, 상기 트랜지스터(TR3)(TR5)의 콜렉터는 상기 트랜지스터(TR1)(TR2)의 에미터측에 접속하고, 전원단자(Vcc)측에 접속된 라인/튜너선택스위치(SW2)의 일측 및 타측고정단자(a2)(b2)느 상기 트랜지스터(TR3)(TR5)의 베이스에 접속하여 구성된 것을 특징으로 하는 예약녹화시 신호 절환회로.The line and tuner video signal input terminals LI and TU are connected to the bases of the transistors TR1 and TR2, and their emitters are connected to the output terminal OUT, and the power supply terminal Vcc is connected to the VPS drive switch ( It connects to the base side of transistor TR3 (TR4) via SW1, and connects the collector of this transistor TR4 to the base of transistor TR5, The collector of said transistor TR3 (TR5) is said transistor ( The transistors TR3 and TR5 connected to the emitter side of TR1) and TR2, and one side and the other fixed terminal a2 and b2 of the line / tuner selector switch SW2 connected to the power supply terminal Vcc side. A signal switching circuit during reservation recording, characterized in that connected to the base of the recording.
KR2019870013245U 1987-08-07 1987-08-07 Signal switching circuit in reservation rewrding KR900008856Y1 (en)

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KR2019870013245U KR900008856Y1 (en) 1987-08-07 1987-08-07 Signal switching circuit in reservation rewrding

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KR890005503U KR890005503U (en) 1989-04-20
KR900008856Y1 true KR900008856Y1 (en) 1990-09-28

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