KR900004348Y1 - Separating circuit of wide band brightness and color signal - Google Patents

Separating circuit of wide band brightness and color signal Download PDF

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Publication number
KR900004348Y1
KR900004348Y1 KR2019870018788U KR870018788U KR900004348Y1 KR 900004348 Y1 KR900004348 Y1 KR 900004348Y1 KR 2019870018788 U KR2019870018788 U KR 2019870018788U KR 870018788 U KR870018788 U KR 870018788U KR 900004348 Y1 KR900004348 Y1 KR 900004348Y1
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South Korea
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transistor
signal
collector
base
variable resistor
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KR2019870018788U
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KR890009853U (en
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윤종웅
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주식회사 금성사
최근선
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/77—Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase
    • H04N9/78—Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase for separating the brightness signal or the chrominance signal from the colour television signal, e.g. using comb filter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/64—Circuits for processing colour signals
    • H04N9/70—Circuits for processing colour signals for colour killing

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

내용 없음.No content.

Description

광대역 휘도 및 칼라신호 분리회로Broadband luminance and color signal separation circuit

제1도는 종래의 분리회로 블록도.1 is a conventional separate circuit block diagram.

제2도는 본 고안의 광대역 휘도 및 칼라신호 분리회로도.2 is a broadband luminance and color signal separation circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : CCD 지연기 2,3 : 저역통과필터1: CCD delayer 2,3: Low pass filter

4 : 지연기 TR1-TR8: 트랜지스터4: Delay TR 1- TR 8 : Transistor

VR1-VR3: 가변저항 C1-C3: 콘덴서VR 1 -VR 3 : Variable resistor C 1 -C 3 : Capacitor

R1-R20: 저항R 1 -R 20 : resistance

본 고안은 텔레비젼 수상기 및 브이씨알 등에 있어서 광대역 휘도 및 칼라신호 분리회로에 관한 것으로 특히 입력되는 복합영상신호중에 칼라신호를 제거하여 분리하는 휘도신호가 대역손실에 따른 화질의 열화가 발생되지 않게한 광대역 휘도 및 칼라신호 분리회로에 관한 것이다.The present invention relates to a wideband luminance and color signal separation circuit in television receivers and TVs. In particular, a luminance signal that removes and separates a color signal from an input composite video signal prevents degradation of image quality due to bandwidth loss. The present invention relates to a luminance and color signal separation circuit.

종래의 휘도신호와 칼라신호 분리회로도를 제1도에 도시한 바와 같이 복합영상신호 입력단자(DVS)로 입력되는 복합 영상신호는 가산기(AD1) 및 감산기(ST1)에 입력됨과 아울러 CCD(Charge-Coupled Device)지연기(1)를 통해 1H(63.5μsec) 지연된 신호로 출력되어 가산기(AD1) 및 감산기(ST1)에 입력되므로 가산기(AD1)에서는 상기 입력된 복합영상신호와 1H 지연된 신호가 합해져 칼라신호가 제거된 영상휘도신호가 출력단자(OUT1)로 출력되는 한편, 이때 감산기(ST1)에서는 상기 입력된 복합영상신호와 1H지연된 신호가 출력단자(OUT1)로 출력되는 한편, 이때 감산기(ST1)에서는 상기 입력된 복합영상신호와 1H지연된 신호가 감산되어 휘도신호가 제거된 칼라성분에 의하여 휘도신호의 화질의 열화 즉, 영상휘도신호 대역의 스펙트럼(spectrum)손실이 발생되어 고화질의 영상신호를 실현시킬 수 없는 결함이 있었다.As shown in FIG. 1, the conventional luminance signal and color signal separation circuit diagram is input to the complex video signal input terminal DVS, and the complex video signal is input to the adder AD 1 and the subtractor ST 1 and the CCD ( Charge-Coupled Device) As a delayed signal 1H (63.5μsec) is output to the adder (AD 1 ) and the subtractor (ST 1 ), the adder (AD 1 ) in the inputted composite video signal and 1H The video luminance signal from which the delayed signals are summed and the color signal is removed is output to the output terminal OUT 1 , while the subtractor ST 1 outputs the input composite video signal and the 1H delayed signal to the output terminal OUT 1 . In this case, the subtractor ST 1 subtracts the input composite video signal and the 1H delayed signal and deteriorates the image quality of the luminance signal by the color component from which the luminance signal is removed, that is, the spectrum loss of the image luminance signal band. This has caused high definition There was a defect that the video signal could not be realized.

본 고안은 이와 같은 종래의 결함을 감안하여 입력되는 복합영상신호에서 칼라성분의 신호를 제거하여 그 분리한 영상 휘도신호의 대역손실에 의한 화질의 열화발생을 대역보충을 위한 신호를 인가하여 방지하게 안출한 것으로 이를 첨부된 도면에 의하여 상세히 설명하면 다음과 같다.The present invention removes the color component signal from the inputted composite video signal in consideration of such a conventional defect, and prevents the degradation of image quality due to the band loss of the separated video luminance signal by applying a signal for band replenishment. When described in detail by the accompanying drawings to be drawn as follows.

제2도는 본 고안의 광대역 휘도 및 칼라신호 분리회로도로서 이에 도시한 바와 같이, 복합영상신호 입력단자(DVS)를 콘덴서(C1)를 통해 통상의 CCD(Charge-Coupled Device) 지연기(1) 입력단자(I1)에 접속함과 아울러 저항(R1)(R2)의 접속점과 함께 트랜지스터(TR1)의 베이스에 접속하고 상기 CCD지연기(1)의 출력단자(I0)는 트래지스터(TR4)의 베이스에 접속하여 그의 에미터를 저항(R10) 및 트랜지스터(TR5)의 베이스에 접속하고, 트랜지스터(TR5)의 콜렉터는 저항(R11) 및 저역통과필터(3)를 통해 가변저항(VR2)에 접속하고, 트랜지스터(TR6)의 에미터는 저항(R13)을 접속하여 그 접속점을 저항(R4)(R5)을 통한 상기 트랜지스터(TR1)의 에미터와 함께 저항(R14) 및 가변저항(VR3), 콘덴서(C3)를 통해 상기 콘덴서(C1) 및 저항(R15)을 통한 복합영상신호입력단자(DVS)와 공통으로 트랜지스터(TR7)의 베이스에 접속하며, 트랜지스터(TR7)의 콜렉터는 저항(R16) 및 지연기(4)를 통해 저항(R16) 및 트랜지스터(TR5)의 베이스에 접속하는 한편, 상기 트랜지스터(TR1)의 콜렉터는 저항(R3) 및 저역통과필터(2)를 통해 저항(R6) 및 트랜지스터(TR2)의 베이스에 접속하여 그의 콜렉터를 가변저항(VR1)에 접속하고, 그 가변저항(VR1)의 가변단자는 트랜지스터(TR3)의 베이스에 접속하여 그의 콜렉터를 저항(R8) 및 콘덴서(C2), 저항(R9)을 통해 상기 트랜지스터(TR8)의 에미터에 접속하여, 트랜지스터(TR8)의 콜렉터는 저항(R20) 및 출력단자(OUT)에 접속하여 구성한 것으로 도면의 설명중 미설명 부호 Vcc는 전원단자이다.2 is a circuit diagram of a broadband luminance and color signal separation circuit according to the present invention. As shown therein, a conventional CCD (Charge-Coupled Device) retarder 1 is connected to a composite video signal input terminal DVS through a capacitor C 1. It is connected to the input terminal I 1 and to the base of the transistor TR 1 together with the connection point of the resistors R 1 and R 2 , and the output terminal I 0 of the CCD delay unit 1 register (TR 4) for its emitter connected to the base resistor (R 10) and the transistor connected to the base of (TR 5) and the collector of the transistor (TR 5) has a resistance (R 11) and a low pass filter (3, Is connected to the variable resistor VR 2 , and the emitter of the transistor TR 6 connects the resistor R 13 to connect the connection point of the transistor TR 1 through the resistor R 4 (R 5 ). The composite image signal input terminal through the capacitor (C 1 ) and the resistor (R 15 ) through the resistor (R 14 ), the variable resistor (VR 3 ), and the capacitor (C 3 ) together with the emitter ( The base of DVS) and, and commonly connected to the base of the transistor (TR 7), a transistor (TR 7) The collector resistor (R 16) and a resistor (R 16 through the retarder (4)) and the transistor (TR 5) On the other hand, the collector of the transistor TR 1 is connected to the base of the resistor R 6 and the transistor TR 2 via a resistor R 3 and a low pass filter 2 and connects the collector thereof with a variable resistor ( VR 1 ), and the variable terminal of the variable resistor VR 1 is connected to the base of the transistor TR 3 , and its collector is connected through a resistor R 8 , a capacitor C 2 , and a resistor R 9 . connected to the emitter of the transistor (TR 8), the collector of the transistor (TR 8) has a resistance (R 20) and an output terminal, reference numeral Vcc of the description of the drawings to be configured to connect to the (OUT) is a power supply terminal.

이와 같이 구성된 본 고안의 작용효과를 상세히 설명하면 다음과 같다.Referring to the effect of the present invention configured in this way in detail as follows.

전원단자(Vcc)에 전원이 인가되고, 복합영상신호 입력단자(DVS)에 복합영상신호가 입력되면, 그 입력된 복합 영상신호는 콘덴서(C1)를 통해 트랜지스터(TR1)의 베이스에 인가됨과 아울러 CCD지연기(1)를 통해 1H(63.5μsec) 지연된 신호로 출력되어 버퍼로 동작되는 트랜지스터(TR4) 및 트랜지스터(TR5)를 통해 증폭된 후 저역통과필터(3)를 통해 필터링 즉, 고주파 클럭 노이즈가 제거되고, 그 제거된 신호는 가변저항(VR2)를 통해 그 가변저항(VR2)의 가변에 따라 레벨이 조정되며, 그 조정된 신호는 버퍼로 동작되는 트랜지스터(TR6)를 통한 후 저항(R5)을 통해 트랜지스터(TR1)의 에미터에 인가됨과 아울러 저항(R14) 및 가변저항(VR3), 콘덴서(C3)를 다시 통해 콘덴서(C1) 및 저항(R5)을 통한 복합영상신호와 함께 합성되어 칼라성분이 제거된 신호로 트랜지스터(TR7)를 다시 통해 증폭된 후 지연기(4)를 통해 일정시간 지연된 신호로 출력되고, 그 출력된 신호는 트랜지스터(TR8)의 베이스에 인가되는 한편, 이때 상기 트랜지스터(TR1)의 베이스에 인가된 복합영상신호는 1H지연되어 인가되는 신호와 그 태랜지스터(TR1)를 통해 합성되어 저역통과필터(2)를 통해 필터링 즉, 고역부분인 칼라신호 대역성분이 제거된 신호를 트랜지스터(TR2)의 베이스에 인가되고, 그 인가된 신호는 그 트랜지스터(TR2)를 통해 증폭된 후 가변저항(VR1)을 통해 그 가변저항(VR1)의 가변에 따라 레벨이 조정되고, 그 조정된 신호는 버퍼로 동작되는 트랜지스터(TR3) 및 콘덴서(C3), 저항(R9)을 통해 상기 트랜지스터 콘덴서(TR8)의 에미터에 인가되어 상기 그의 베이스에 인가되는 칼라성분이 제거된 신호와 그 트랜지스터(TR8)를 통해 합성되고, 그 합성된 신호 즉, 휘도신호는 출력단자(OUT)로 출력된다.When power is applied to the power supply terminal Vcc and the composite video signal is input to the composite video signal input terminal DVS, the input composite video signal is applied to the base of the transistor TR 1 through the capacitor C 1 . At the same time, the signal is outputted as a 1H (63.5μsec) delayed signal through the CCD delay unit 1 and amplified through the transistors TR 4 and TR 5 operated as a buffer and then filtered through the low pass filter 3. , a high-frequency clock noise is removed, and that the cancellation signal is adjusted level in accordance with the varying of the variable resistor (VR 2) through a variable resistor (VR 2), and the adjustment signal is a transistor that is operated as a buffer (TR 6 ) and then through soon as applied to the emitter of the transistor (TR 1) via a resistor (R 5) as well as a resistance (R 14) and a variable resistor (VR 3), the capacitor through the capacitor (C 3) again (C 1) and Transition to a signal where color components are removed by combining with a composite video signal through a resistor (R 5 ) Amplified through the STER (TR 7 ) again and is output as a delayed signal through the delay unit 4, the output signal is applied to the base of the transistor (TR 8 ), while the transistor (TR 1 ) The composite video signal applied to the base of the signal is synthesized through the 1H delayed signal and its transistor (TR 1 ) and filtered through the low pass filter (2), that is, the signal from which the color signal band component of the high band is removed. a is applied to the base of the transistor (TR 2), that is a signal that the transistor that a variable resistor (VR 1) is adjusted level in accordance with the variable through a variable resistor (VR 1) and then amplified through (TR 2) And the adjusted signal is applied to the emitter of the transistor capacitor TR 8 through the transistor TR 3 , the capacitor C 3 , and the resistor R 9 operated as a buffer and applied to the base thereof. the component signal is removed and the transistor (TR 8) It is synthesized, and the synthesized signals, that is, the luminance signal is output to the output terminal (OUT).

이상에서 설명한 바와 같이 본 고안은 입력도는 복합영상신호의 휘도 및 칼라신호 분리에 있어서, 분리된 휘도신호의 대역손실에 의한 화질의 열화를 대역 보충을 위한 신호를 인가하여 방지함으로써 광대역을 필요로 하는 영상신호의 화질의 열화를 방지할 수 있게되어 고화질의 영상신호를 실현시킬 수 있는 효과가 있다.As described above, the present invention requires wideband by preventing the deterioration of image quality due to the band loss of the separated luminance signal by applying a signal for band replenishment in the separation of the luminance and the color signal of the composite image signal. It is possible to prevent deterioration of the image quality of the video signal, thereby realizing the high quality video signal.

Claims (1)

복합영상신호 입력단자(DVS)를 트랜지스터(TR1)의 베이스 측에 접속함과 아울러 통상의 CCD지연기(1)를 통해 트랜지스터(TR4)의 베이스에 접속하고, 트랜지스터(TR4)의 에미터측은 트랜지스터(TR5)의 베이스측에 접속하여 그의 콜렉터측을 저역통과필터(3)를 통해 가변저항(VR2)에 접속하며, 그 가변저항(VR2)의 가변단자를 트랜지스터(TR6)의 베이스에 접속하여 그의 에미터측을 상기 트랜지스터(TR1)의 에미터측에 접속하고, 그 접속점은 가변저항(VR3) 및 콘덴서(C3)를 통해 상기 복합영상신호 입력단자(DVS)와 공통으로 트랜지스터(TR7)의 콜렉터측은 지연기(4)를 통해 트랜지스터(TR8)의 베이스측에 접속하는 한편, 상기 트랜지스터(TR1)의 콜렉터측은 저역통과필터(2)를 통해 트랜지스터(TR2)의 베이스측에 접속하여 그의 콜렉터를 가변저항(VR1)에 접속하고, 그 가변저항(VR1)의 가변단자는 트랜지스터(TR3)의 베이스에 접속하여 그의 콜렉터를 상기 트랜지스터(TR8)의 에미터측에 접속하며, 트랜지스터(TR8)의 콜렉터측은 출력단자(OUT)에 접속하여 구성함을 특징으로 하는 광대역 휘도 및 칼라신호 분리회로.The composite video signal input terminal DVS is connected to the base side of the transistor TR1, and is connected to the base of the transistor TR 4 through the normal CCD delay unit 1, and the emitter of the transistor TR 4 is connected. The side is connected to the base side of the transistor TR 5 , and the collector side thereof is connected to the variable resistor VR 2 through the low pass filter 3, and the variable terminal of the variable resistor VR 2 is connected to the transistor TR 6 . The emitter side is connected to the emitter side of the transistor TR 1 , and its connection point is common to the composite video signal input terminal DVS through a variable resistor VR 3 and a capacitor C 3 . Thus, the collector side of transistor TR 7 is connected to the base side of transistor TR 8 via retarder 4, while the collector side of transistor TR 1 is connected to transistor TR 2 through low pass filter 2. ) Is connected to the base side and the collector thereof is connected to the variable resistor (VR 1 ). In, and the variable terminal of the variable resistor (VR 1) shall access his collector connected to the base of the transistor (TR3) the emitter teocheuk of the transistor (TR 8), side of the collector of the transistor (TR 8) output terminals ( And wide-band luminance and color signal separation circuits.
KR2019870018788U 1987-10-31 1987-10-31 Separating circuit of wide band brightness and color signal KR900004348Y1 (en)

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KR900004348Y1 true KR900004348Y1 (en) 1990-05-19

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