KR920003404Y1 - Color trab switching circuit of pal/ntsc - Google Patents

Color trab switching circuit of pal/ntsc Download PDF

Info

Publication number
KR920003404Y1
KR920003404Y1 KR2019880022653U KR880022653U KR920003404Y1 KR 920003404 Y1 KR920003404 Y1 KR 920003404Y1 KR 2019880022653 U KR2019880022653 U KR 2019880022653U KR 880022653 U KR880022653 U KR 880022653U KR 920003404 Y1 KR920003404 Y1 KR 920003404Y1
Authority
KR
South Korea
Prior art keywords
signal
color
ntsc
pal
stage
Prior art date
Application number
KR2019880022653U
Other languages
Korean (ko)
Other versions
KR900013812U (en
Inventor
안성민
Original Assignee
삼성전자주식회사
안시환
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사, 안시환 filed Critical 삼성전자주식회사
Priority to KR2019880022653U priority Critical patent/KR920003404Y1/en
Publication of KR900013812U publication Critical patent/KR900013812U/en
Application granted granted Critical
Publication of KR920003404Y1 publication Critical patent/KR920003404Y1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/64—Circuits for processing colour signals
    • H04N9/642—Multi-standard receivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/64—Circuits for processing colour signals
    • H04N9/70—Circuits for processing colour signals for colour killing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/77—Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

내용 없음.No content.

Description

멀티 방식의 칼라 트랩 스위칭회로Multi-Color Color Trap Switching Circuit

제1도는 종래의 회로도.1 is a conventional circuit diagram.

제2도는 본 고안의 회로도.2 is a circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 영상복합 신호 증폭단 20 : 휘도신호 지연단10: image composite signal amplifier stage 20: luminance signal delay stage

30 : 스위칭단 40, 50 : 트랩회로30: switching stage 40, 50: trap circuit

Q1, Q2: 트랜지스터 D : 지연소자Q 1 , Q 2 : Transistor D: Delay element

C1, C2, C3: 콘덴서 L1, L2: 코일C 1 , C 2 , C 3 : condenser L 1 , L 2 : coil

R1-R5: 저항R 1 -R 5 : resistance

본 고안은 멀티 시스템인 PAL/NTSC방식의 칼라 텔레비젼에 있어서, 휘도신호 지연단을 공용함으로써 발생되는 PAL/NTSC방식의 칼라신호가 휘도신호에 대한 간섭을 배제하도록 칼라신호를 트랩 스위칭 하도록한 멀티 방식의 칼라 트랩 스위칭회로에 관한 것이다.The present invention is a multi-system PAL / NTSC color television system, in which a multi-system PAL / NTSC color signal generated by sharing a luminance signal delay stage traps a color signal so as to trap interference of the luminance signal. Relates to a color trap switching circuit.

종래 회로도인 제1도를 살펴보면 트랜지스터(Q1)에 인가되는 PAL/NTSC방식의 영상 복합 신호가 증폭되도록 영상복합 신호 증폭단(10)을 구성하고 트랩회로(50)에 인가되는 PAL방식의 칼라신호(4.43㎒)는 코일(L1)과 콘덴서(C1)로 트랩되어 지연소자(D)를 통하여 출력단자(Y0)에 휘도신호로 출력되게 구성한 것이다.The color signal of the PAL system is applied to the conventional circuit of Fig. 1 the look transistor (Q 1) is PAL / NTSC such way video composite signal is amplified in the configuration of the video composite signal amplification stage 10, and the trap circuit 50 is in (4.43 MHz) is configured to be trapped by the coil L 1 and the condenser C 1 and output as a luminance signal to the output terminal Y 0 through the delay element D.

그리고 영상복합 신호 증폭단(10)에서 증폭된 영상복합 신호가 스위치(SW)로 제어되는 다이오드(D1), (D2)에 의해서 트랩회로(40)에서 NTSC방식의 칼라신호(3.58㎒)가 트랩된후 지연소자(D)에서 지연된 휘도신호로 출력되게 스위칭단(30)을 구성한 것이다.The NTSC-based color signal (3.58 MHz) is generated in the trap circuit 40 by the diodes D 1 and D 2 controlled by the switch SW to control the image composite signal amplified by the image composite signal amplifying stage 10. The switching stage 30 is configured to output a delayed luminance signal from the delay element D after being trapped.

그러나 영상복합 신호 증폭단(10)에서 증폭된 PAL/NTSC방식의 영상 복합 신호는 스위치(SW)가 온이 될때 트랩회로(40), (50)에서 트랩되는 상기 두 칼라 신호를 트랩회로의 직렬공진에 의한 임피던스가 적어 칼라신호 뿐만 아니라 휘도신호까지도 트랩되어 신호의 손실을 가져오는 결정이 있었다.However, the PAL / NTSC video composite signal amplified by the image composite signal amplifying stage 10 has the two color signals trapped by the trap circuits 40 and 50 when the switch SW is turned on. Due to the low impedance, some crystals trapped not only color signals but also luminance signals, resulting in signal loss.

따라서 이와 같은 점을 감안하여 본 고안은 PAL방식의 칼라신호(4.43㎒)는 콘덴서와 코일의 병렬 접속으로 트랩시키고 NTSC방식의 칼라신호(3.58㎒)는 코일과 콘덴서의 직렬 공진으로 트랩시킨후 휘도신호 지연단을 공용하므로써 PAL/NTSC의 휘도신호에 대한 칼라 신호의 간섭을 배제할수 있도록 한 것이다.Therefore, in view of the above, the present invention traps PAL color signal (4.43MHz) by parallel connection of capacitor and coil and NTSC color signal (3.58MHz) by series resonance of coil and capacitor. By using the signal delay stage, it is possible to eliminate the interference of the color signal to the luminance signal of the PAL / NTSC.

이를 첨부된 도면에 의하여 상세히 설명하면 다음과 같다.This will be described in detail with reference to the accompanying drawings.

영상 복합신호가 저항(R1-R2)과 콘덴서(C4)로 연결된 트랜지스터(Q1)를 제어하며 휘도신호 지연단(20)에 증폭된 영상 복합 신호가 인가되게 영상 복합신호 증폭단(10)을 구성하고 휘도신호 지연단(20)의 콘덴서(C1)와 코일(L1)과 지연소자(D)를 통하여 PAL방식의 4.43㎒의 칼라신호를 트랩시키고 지연소자(D)로 지연된 휘도신호가 스위칭단(30)에 인가되게 구성한 것이다.The image composite signal controls the transistor Q 1 connected by the resistors R 1 -R 2 and the capacitor C 4 , and the image composite signal amplifying stage 10 is applied such that the amplified image composite signal is applied to the luminance signal delay stage 20. ) And traps the 4.43 MHz color signal of the PAL method through the capacitor C 1 , the coil L 1 and the delay element D of the luminance signal delay stage 20, and the delayed luminance to the delay element D. The signal is configured to be applied to the switching stage 30.

그리고 스위칭단(30)의 스위치(SW)로 트랜지스터(Q2)가 제어되며 NTSC방식의 칼라신호(3.58㎒)는 코일(L2)과 콘덴서(C2)로 구성된 트랩회로(40)로 트랩된후 콘덴서(C3)를 통하여 휘도신호가 출력되도록 스위칭단(30)을 구성한 것이다.The transistor Q 2 is controlled by the switch SW of the switching stage 30, and the NTSC color signal (3.58 MHz) is trapped by the trap circuit 40 composed of the coil L 2 and the condenser C 2 . After that, the switching stage 30 is configured to output the luminance signal through the capacitor C 3 .

그리고 스위치(SW)를 "오프"상태로 하면 PAL방송수신이 되는 것으로 이때 영상복합 신호의 4.43㎒칼라 신호는 휘도신호 지연단(20)에서 트랩되고 지연소자(D)에는 순수 휘도신호만이 인가되어 PAL방송의 칼라신호 처리 시간차 만큼 지연되어 출력되고 또한 스위칭단(30)의 스위치 (SW)를 "온"하면 트랜지스터(Q2)가 구동되므로 영상복합 신호 증폭단(10)에서 인가되는 NTSC의 칼라신호(3.58㎒)는 휘도신호 지연단(20)과 트랩 회로(40)를 통하여 제거되게 구성한 것이다.When the switch SW is turned "off", PAL broadcasting is received. At this time, the 4.43 MHz color signal of the video composite signal is trapped at the luminance signal delay stage 20, and only the pure luminance signal is applied to the delay element D. Is output by being delayed by the color signal processing time difference of PAL broadcasting, and when the switch SW of the switching stage 30 is "on", the transistor Q 2 is driven so that the color of the NTSC applied from the image complex signal amplifying stage 10 is increased. The signal (3.58 MHz) is configured to be removed through the luminance signal delay stage 20 and the trap circuit 40.

이와같이 구성된 본 고안의 작용효과를 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above are as follows.

영상복합 신호는 영상복합 신호 증폭단(10)의 트랜지스터(Q1)에서 증폭된후 휘도 신호 지연단(20)에 입력이 된다. 이때 스위칭단(30)의 스위치(SW)를 수동으로 "오프"시킬 경우 스위칭단(30)의 트랜지스터(Q1)가 "턴오프"되므로 3.58㎒트랩용 트랩회로(40)는 구동되지 않게 된다.The image composite signal is amplified by the transistor Q 1 of the image composite signal amplifying stage 10 and then input to the luminance signal delay stage 20. At this time, when the switch SW of the switching stage 30 is manually "off", the transistor Q 1 of the switching stage 30 is "turned off", so that the trap circuit 40 for the 3.58 MHz trap is not driven. .

따라서 영상 복합 신호 증폭단(10)의 영상 복합 신호는 휘도 신호 지연단(20)의 콘덴서(C1)와 병렬로 접속된 코일(L1)의 병렬공진에 의하여 PAL방송의 4.43㎒인 칼라신호가 트랩된후 지연소자(D)에는 휘도신호가 인가되며 PAL방송의 칼라신호(4.43㎒)가 처리되는 시간차 만큼 휘도신호는 지연소자(D)에서 지연되도록 한 후 출력단자(Y0)에 휘도신호를 출력시키는 것으로써 휘도신호에 대한 PAL방식의 칼라신호(4.43㎒)의 방해를 방지할수 있으며 이때 NTSC방식의 대역이 4㎒이므로 휘도신호 지연단(20)에 입력된 NTSC의 영상신호는 지연소자(D)에서 PAL방식의 휘도신호와 같이 지연된후 출력단자(Y0)를 통하여 순수휘도신호가 출력되는 것이다.Therefore, the video composite signal of the video composite signal amplifying stage 10 has a color signal of 4.43 MHz of PAL broadcasting due to the parallel resonance of the coil L 1 connected in parallel with the condenser C 1 of the luminance signal delay stage 20. After being trapped, the luminance signal is applied to the delay element D, and the luminance signal is delayed by the delay element D by the time difference processed by the color signal (4.43 MHz) of the PAL broadcast, and then the luminance signal is output to the output terminal Y 0 . It is possible to prevent interference of the PAL type color signal (4.43MHz) with respect to the luminance signal by outputting the NSC image signal of the NTSC signal input to the luminance signal delay stage 20 since the band of the NTSC system is 4 MHz. In (D), after the delay is performed like the PAL type luminance signal, the pure luminance signal is output through the output terminal Y 0 .

그리고 상기 동작 상태에서 스위치를 수동으로 "온"상태로 하면 전원(B+)이 저항(R5)을 통하여 트랜지스터(Q2)의 베이스에 하이레벨을 인가시켜 트랜지스터(Q2)는 "턴온"되므로 영상 복합 신호 증폭단(10)을 통하여 증폭된 영상 복합 신호가 휘도신호 지연단(20)에 인가되며 이때 NTSC의 밴드폭이 4㎒정도이므로 휘도신호 지연단(20)에 인가되는 트랜지스터(Q1)의 콜렉터 출력인 영상 복합신호는 휘도신호 지연단(20)에 인가되어 콘덴서(C1)와 코일(L1)에 의한 병렬 공진으로 PAL방식의 칼라신호(4.43㎒)가 트랩되고 지연소자(D)에 인가 되는 휘도신호(Y)는 NTSC의 칼라신호(3.58㎒)가 처리되는 시간차 만큼 지연되어 지연소자(D)를 통하여 인가되는 NTSC의 칼라신호는 스위치(SW)를 "온"시킴으로써 트랜지스터(Q1)의 베이스에 하이레벨을 인가시켜 턴온되는 트랜지스터(Q2)의 콜렉터에 직렬 접속된 코일(L2)과 콘덴서(C2)로 구성된 트랩회로(40)의 직렬공진에 의해 NTSC방식의 칼라신호(3.58㎒)가 트랩되어 출력단자(Y0)에는 순수한 휘도신호만 출력되게 되는 것이다.When the switch is manually turned on in the operating state, the power supply B + applies a high level to the base of the transistor Q 2 through the resistor R 5 so that the transistor Q 2 is turned on. Therefore, the image complex signal amplified by the image complex signal amplifying stage 10 is applied to the luminance signal delay stage 20. At this time, since the bandwidth of NTSC is about 4 MHz, the transistor Q 1 is applied to the luminance signal delay stage 20. Image complex signal, which is the collector output, is applied to the luminance signal delay stage 20, and the PAL type color signal (4.43 MHz) is trapped by the parallel resonance by the capacitor C 1 and the coil L 1 . The luminance signal Y applied to D) is delayed by the time difference in which the NTSC color signal (3.58 MHz) is processed, so that the NTSC color signal applied through the delay element D is turned on by turning on the switch SW. Transitive is turned on by applying a high level to the base of (Q 1) Emitter connected in series to the collector coil (L 2) and a capacitor (C 2) a trap color signal (3.58㎒) of the NTSC system by the series resonant circuit 40 consisting of (Q 2) is a trap output terminal (Y 0 ) only pure luminance signal is output.

따라서 PAL/NTSC의 수신용 멀티시스템의 텔레비젼에 휘도신호 지연단(20)을 공용함으로써 발생되는 휘도 신호에 대한 칼라신호의 방해를 휘도신호 지연단(20)의 코일(L1)과 콘덴서(C1)로 PAL방식의 칼라 신호를 트랩시키고 스위칭단(30)의 스위치 (SW)로 제어되는 트랜지스터(Q2)의 콜렉터에 직렬 연결된 코일(L2)과 콘덴서(C2)로 NTSC방식의 칼라신호를 트랩되게 하여 지연소자(D)에서 지연된 휘도신호가 출력단자(Y0)를 통해 출력되게 한 것이다.Therefore, the interference of the color signal with respect to the luminance signal generated by sharing the luminance signal delay stage 20 with the television of the reception multi-system of PAL / NTSC is prevented by the coil L 1 and the capacitor C of the luminance signal delay stage 20. 1 ) trap the color signal of the PAL method and the NTSC color to the coil (L 2 ) and condenser (C 2 ) connected in series to the collector of the transistor (Q 2 ) controlled by the switch (SW) of the switching stage 30 The signal is trapped so that the luminance signal delayed by the delay element D is output through the output terminal Y 0 .

이상에서와 같이 본 고안은 PAL/NTSC의 멀티시스템 방식의 텔레비젼에 한개의 휘도신호 지연단을 사용하여 PAL/NTSC의 칼라신호를 트랩시켜 주므로써 휘도신호에 대한 칼라 신호의 간섭을 방지할 수 있는 효과가 있는 것이다.As described above, the present invention traps the color signal of PAL / NTSC by using one luminance signal delay stage in a multi-system television system of PAL / NTSC, thereby preventing interference of the color signal with respect to the luminance signal. It works.

Claims (1)

영상 복합 신호 증폭단(10)에서 증폭시킨 영상 복합 신호의 칼라신호를 제거하여 지연시킨후 휘도신호로 출력시키는 멀티 시스템의 칼라신호 제거회로에 있어서, 상기 영상복합 신호의 PAL방식 칼라 신호를 제거시켜 지연시키는 휘도신호 지연단(20)과, 상기 휘도신호 지연단(20)의 NTSC칼라신호를 스위치(SW)에 의해 제어 되는 트랜지스터(Q2)에 접속된 트랩회로(40)에서 트랩시키는 스위칭단(30)으로 구성된 멀티 방식의 칼라 트랩 스위칭회로.In a color signal removal circuit of a multi-system which removes and delays a color signal of an image composite signal amplified by the image composite signal amplifying stage 10 and outputs it as a luminance signal, the PAL method color signal of the image composite signal is removed and delayed. A switching stage for trapping the luminance signal delay stage 20 and the NTSC color signal of the luminance signal delay stage 20 in the trap circuit 40 connected to the transistor Q 2 controlled by the switch SW ( Multi-color color trap switching circuit composed of 30).
KR2019880022653U 1988-12-31 1988-12-31 Color trab switching circuit of pal/ntsc KR920003404Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019880022653U KR920003404Y1 (en) 1988-12-31 1988-12-31 Color trab switching circuit of pal/ntsc

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019880022653U KR920003404Y1 (en) 1988-12-31 1988-12-31 Color trab switching circuit of pal/ntsc

Publications (2)

Publication Number Publication Date
KR900013812U KR900013812U (en) 1990-07-06
KR920003404Y1 true KR920003404Y1 (en) 1992-05-30

Family

ID=19282977

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019880022653U KR920003404Y1 (en) 1988-12-31 1988-12-31 Color trab switching circuit of pal/ntsc

Country Status (1)

Country Link
KR (1) KR920003404Y1 (en)

Also Published As

Publication number Publication date
KR900013812U (en) 1990-07-06

Similar Documents

Publication Publication Date Title
US4263610A (en) Controlled output composite keying signal generator for a television receiver
RU2115262C1 (en) Color tv receiver
KR920003404Y1 (en) Color trab switching circuit of pal/ntsc
KR950001444B1 (en) Delay and filter network with chrominance trap between series input resistors
KR900008520Y1 (en) Colour television system
KR910005705Y1 (en) Automatic color signal deleting circuit of pal/secam method
JPS6358510B2 (en)
KR900010959Y1 (en) SECAM Color Noise Reduction Circuit of PAL / SECAM TV
KR880001279Y1 (en) Color and green modulating circuit of a monitor
KR910005011Y1 (en) Noise removing circuit
JPS6151832B2 (en)
KR880003612Y1 (en) Band compensating ckt for colour television
KR0116640Y1 (en) Picture noise reduction circuit in time receiving low electric
KR910005008Y1 (en) Color noize removing circuit
KR100269218B1 (en) Apparatus for separating the luminance signal of the multiple ccd camera
KR880003610Y1 (en) Pal/secam t.v.circuit
KR910005539Y1 (en) Picture image signal separating circuit of color tv
JP2523757B2 (en) Television multi-system video receiving circuit
KR940002754Y1 (en) Pal/secam signal automatic switching apparatus
SU1125782A1 (en) Brightness signal channel for secam colour television receiver
JPH01122292A (en) Chrominance signal processing circuit
KR890001357Y1 (en) Broadcasting selection circuit of pal and ntsc
KR890006334Y1 (en) Intermediate frequency circuit for multi-system sound receiver
KR860000728Y1 (en) Video receiver in multimode
SU766040A1 (en) Signal decoder

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20020429

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee