KR900001467B1 - Portable electro-circuit testing apparatus - Google Patents

Abstract

The tester tests the connection or logical operation states of the electronic parts with a display as well as an audio sound. The tester includes a logic level discriminator (1) for classfying the testing logic device to TTL or CMOS one, a resistance discriminator (2) for measuring the resistance of the testing device, a test mode selection switch (SWA) for selecting the test mode from the resistance or logical device mode, a lamp circuit (5) for turning on or off the lamp according to the pulse provided from a pulse input detection circuit (4), and a oscillation control circuit (6) for providing the audio sound when the testing device is faulty.

Description

Portable Electronic Circuit Tester

1 is a block diagram of a portable electronic circuit test apparatus according to the present invention.

2 is a detailed circuit diagram of FIG.

FIG. 2A is a detailed circuit diagram of the TTL and CMOS logic level detection classification circuit in FIG.

2b is a detailed circuit diagram of the resistance detection classification in FIG.

FIG. 2C is a detailed circuit diagram of the pulse input detection circuit in FIG.

FIG. 2D is a detailed circuit diagram of the power supply circuit and the internal battery voltage checking circuit in FIG.

FIG. 2E is a detailed circuit diagram of the oscillation control circuit in FIG.

* Explanation of symbols for main parts of the drawings

1: TTL and COMS logic level detection classification circuit

2: resistance detection classification circuit 3: power supply connection circuit

4 pulse input detection circuit 5 lamp display circuit

6: oscillation control circuit 7: oscillation and output circuit

8: internal battery voltage check circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a portable electronic circuit test apparatus. In particular, the present invention relates to a portable electronic circuit test apparatus, in which an electronic circuit is used to acoustically and visually display whether a wiring is disconnected or short-circuited, whether a transistor, a diode, a light emitting diode, or the like is defective, and an operating state of a TTL and COMS logic remel circuit. Relates to a device.

In the past, an analog or digital tester was required to determine whether a circuit was broken, a short circuit, a transistor, a diode, or the like. Moreover, a light emitting diode, such as a separate power source, was used to flow a current and emit light to report a defect. Whether it could be measured.

In addition, in order to measure the operation of computer circuits and other general logic circuits (TTL and CMOS logic), which are common in recent years, an oscilloscope or a separate logic circuit tester was required. It was impossible to repair a device composed of logic circuits such as a computer.

Accordingly, an object of the present invention is to provide a small portable single device that can measure logic circuits and determine whether circuits are disconnected or short-circuited in electronic circuits, or whether semiconductor components such as transistors, diodes, and light emitting diodes are defective. It is possible to check the negative terms without visually checking every measurement such as oscilloscope, etc., to solve the inconveniences of those in the field of electronics who can easily make measurements in very dense electronic circuits.

In addition, each semiconductor component is measured in the advanced electronic and electronic fields that are increasingly IC, and can be easily measured as a portable electronic circuit test apparatus of the present invention without the need for testers, oscilloscopes, and other logic circuit measuring instruments. It is extremely compact and mass-produced, and it is very inexpensive.

Hereinafter, with reference to the accompanying drawings of the present invention will be described in more detail.

FIG. 1 is a block diagram of a circuit constituting the present invention, which is first selected by a test item selection switch circuit SWA according to whether an object to be measured is an element of a resistive component or a logic level circuit operated at a high or low level. The selected input signal is applied to the resistance detection classification circuit 2 or the TTL and CMOS logic level detection classification circuit 1 according to the test object, and the signal classified and detected by the resistance detection classification circuit 2 is displayed on the display lamp circuit 5. ) And the oscillation control circuit 6 and the oscillation and output circuit 7 to generate a dial tone. Here, when the test object is selected at the TTL and CMOS logic levels, if the input signal is a pulse, the output is interrupted by the pulse input detection circuit 4 at regular intervals and applied to the oscillation and output circuit 7. In addition, the output of the resistance detection sorting circuit 2 can select a visual LAMP output or a sound output by a switch SWB.

The internal battery voltage check circuit 8 outputs a signal by sound and visual LAMP by the battery check function when the voltage of the battery is in phase, but when the battery voltage is lower than the set voltage, the signal is not output and the battery is consumed. The power connection circuit 3 is a circuit that cuts off battery power when an external power source is connected.

FIG. 2 is a detailed circuit diagram of the apparatus of the present invention, wherein the circuit of FIG. 2a is a detailed circuit diagram of the CMOS and TTL logic level detection classification circuit 1, and its operation is as follows. The level comparator IC1 is a TTL and CMOS logic high level detection device, and IC2 is a TTL and CMOS logic low level detection device. When the negative reference voltage of IC1 is CMOS logic, the resistors R ₁ , R ₄ , R ₅ , and R ₆ And 70% of the supply voltage by the R ₇ resistor network, _{1 7 1 7 8 4} ＂＂ _{4 of} R ₁ , R ₂ , R ₃ , R ₄ and R ₇ for TTL

If the input signal is at a high level, i.e., higher than 70% of the supply voltage in CMOS logic, or higher than 2V in TTL, the output of IC1 will be at low level, turning on the LED D ₃ and simultaneously turning on the transistor via line ＂B＂. TR ₃ is turned ON. At this time, if switch SW5 is ON, it oscillates with high sound (about 2KHz) and outputs sound to speaker. Here, when test item switch SW1 is ON, SW2 is ON and SW3 is OFF, it is CMOS logic state, and when SW2 is OFF and SW3 is ON, it becomes TTL state.

FIG. 2B is a detailed circuit diagram of the resistance detection circuit 2. The operation of the circuit is as follows. Level comparator IC3 is used for the presence of short circuits such as transistors, diodes, light emitting diodes, etc. and _{15 14 16 14 18 11 11} ＂＂ ₂

출력은 통상 고레벨에서 저항 R₂₀및 캐패시터 C₂에 의한 시정수(약 300ms)에 의한 저레벨 펄스가 출력된다. 이 펄스는 다시 IC5의 클럭 단자로 들어가서 IC5를 트리거시키고 IC5의

는 저항 R₂₁및 캐패시터 C₃의 시정수(약 200ms)에 의한 저레벨 펄스가 출력된다. 이 펄스는 다시 IC4의 리세트단자로 연결되어 ＂＂₅ 2C is a detailed circuit of the pulse input detection circuit and its operation is as follows. In the circuit of Fig. 2a, a circuit configured to discriminate when a logic circuit input is not a fixed high level or low level and is a pulse of a fast cycle. When the clock terminal and the pulse signal of the timer IC4 come in through the line

The output is usually at a high level and outputs a low level pulse by a time constant (about 300 ms) by the resistor R ₂₀ and the capacitor C ₂ . This pulse goes back into the clock terminal of IC5 to trigger IC5 and

Outputs a low-level pulse due to the time constant (about 200 ms) of the resistor R ₂₁ and the capacitor C ₃ . This pulse is coupled back to the reset terminal of IC4 "" ₅

2d is a power connection circuit and an internal battery voltage checking circuit. When an external power plug is inserted into the external voltage connecting jack J1, the supply of the battery voltage is cut off and the external applied voltage is connected to the circuit. + E is an external direct supply voltage, and is a terminal to supply the resistance network for logic level detection, and voltage + E-1 through diode D ₁₃ is a power supply to protect the circuit when the polarity of the external power supply is changed. And + E-1 is a circuit power supply that operates only when an external power supply is supplied, and + B is a circuit power supply that uses both an internal battery and an external power supply. And IC6 is an element for the internal battery voltage detection (-), the reference voltage is applied to the voltage distribution by the zener diode ZD-1 after a resistance R ₂₄ and R ₂₃ stable in the, battery voltage if ON the battery voltage detection switch SW6 It is distributed by R ₂₇ and R ₂₆ and applied to the positive input terminal of the level comparison IC. At this time, if the voltage applied to this (+) terminal is lower than the reference voltage applied to the (-) terminal, the output of IC6 becomes low level and the sound is transmitted to the speaker through the oscillating circuit and the output circuit of FIG. 1KHz) output.

As described above, the semiconductor device short-circuit state and the TTL and CNOS logic level detection state can be seen visually, but it is configured to listen with a dial tone, and the fault state of a simple electronic circuit and an IC circuit even with a simple device according to the present invention. There is an advantage to inspect.

In addition, according to the present invention, the multifunctional device is realized as a small portable single device, and because the device is compact, it is easy to carry, and the circuit configuration is simple, thereby providing a mass tester device and a very low cost accordingly.

Claims (1)

In a semiconductor test apparatus, a resistance detection classification circuit connected to a test selection switch circuit (SWA) for determining whether an object to be measured is an element of a resistive component or a logic level circuit element operated at a high or low level. (2), and from the TTL and CMOS logic level detection classification circuit (4) connected from the test selection switch circuit (SWA) to detect TTL and CMOS logic levels, and from the TTL and CMOS logic level detection classification circuit (1). A pulse input detection circuit 4 for controlling the pulse signal input and connected at a predetermined interval, and connected to the internal supply power Eb so as to receive external power, and interrupting the internal power supply Eb when the external power is applied, A power connection circuit (3) for supplying operating power to the resistance detection classification circuit (2), the TTL and CMOS logic level detection classification circuit (1), and the pulse input detection circuit (4); An internal battery voltage checking circuit 8 connected from the circuit 3 to check the voltage of the internal power supply Eb, the resistance detection sorting circuit 2, the TTL and CMOS logic level detection sorting circuit 1, and a pulse input; A lamp display circuit (5) which is connected from the detection circuit (4) and the internal battery voltage checking circuit (8) and determines the lighting and oscillation frequency in accordance with a signal input from the power supply connection circuit (3) via a switch SWB. And an oscillation control circuit 6 and an oscillation and output circuit 7 which oscillates in accordance with a signal input from the oscillation control circuit 6 and outputs via a speaker. Device.

Images