KR890015497A - Gain Control Circuit for Automatic Gain Control Amplifier According to Illuminance - Google Patents

Gain Control Circuit for Automatic Gain Control Amplifier According to Illuminance Download PDF

Info

Publication number
KR890015497A
KR890015497A KR1019880003539A KR880003539A KR890015497A KR 890015497 A KR890015497 A KR 890015497A KR 1019880003539 A KR1019880003539 A KR 1019880003539A KR 880003539 A KR880003539 A KR 880003539A KR 890015497 A KR890015497 A KR 890015497A
Authority
KR
South Korea
Prior art keywords
gain control
gain
comparator
illuminance
inverting terminal
Prior art date
Application number
KR1019880003539A
Other languages
Korean (ko)
Other versions
KR940003351B1 (en
Inventor
전준호
Original Assignee
최근선
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 최근선, 주식회사 금성사 filed Critical 최근선
Priority to KR1019880003539A priority Critical patent/KR940003351B1/en
Publication of KR890015497A publication Critical patent/KR890015497A/en
Application granted granted Critical
Publication of KR940003351B1 publication Critical patent/KR940003351B1/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices

Landscapes

  • Picture Signal Circuits (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

내용 없음No content

Description

조도에 따른 자동이득 제어증폭기 이득 제어회로Gain Control Circuit for Automatic Gain Control Amplifier According to Illuminance

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 3 도는 본 발명에 따른 블록도, 제 4 도는 제 3 도에 있어서의 선택부 회로도, 제 5 도는 제 3 도에 있어서의 파형도.3 is a block diagram according to the present invention, FIG. 4 is a circuit diagram of a selector in FIG. 3, and FIG. 5 is a waveform diagram in FIG.

Claims (1)

자동이득제어 증폭기(1), 저역필터(2), 동기선단클램프(3), 차동증폭기(4)(5), 게이트회로(6)와 가산기(7), 검파회로(8)등을 포함하는 자동제어 증폭기 이득제어회로에 있어서, 저역필터(2)로부터 출력되는 휘도신호는 피크검파회로(9)에 의해 영상레벨이 검출되어 비교기(10)(11)의 비반전단자와 스위치(SW1)로 인가되며, 비교기(10)의 반전단자는 낮은 조도에 대한 영상레벨을 검출하기 위한 기준전압(V1)이 인가되고, 비교기(11)의 반전단자에는 검파회로(8)의 출력은 상기 비교기(11)의 반전단자와 스위치(SW2)(SW3)로 인가되며, 비교기(10)(11)의 출력은 인버터(I1)(I2), 엔드케이트(G1-G3)로 이루어진 선택부(12)로 인가되고, 두 비교기(10)(11)의 출력에 따른 각 앤드게이트(G1-G3)의 출력이 스위치(SW1-SW3)를 각각 온, 오프 시키도록 하며, 또한 앤드게이트(G3)의 출력은 이득조정부(13)로 인가되어 차동증폭기(5)의 이득을 제어하도록 하고, 스위치(SW1-SW3)는 자동 이득제어 증폭기(1)에 접속되어 주위의 명암에 따른 영상신호 레벨을 검출하여 자동이득 제어증폭기(1)의 이득을 제어하도록 구성된 것을 특징으로 하는 조도에 따른 자동이득 제어 증폭기 이득 제어회로.It includes an automatic gain control amplifier (1), a low pass filter (2), a synchronous front clamp (3), a differential amplifier (4) (5), a gate circuit (6), an adder (7), a detection circuit (8), and the like. In the automatic control amplifier gain control circuit, the luminance signal output from the low pass filter 2 is detected by the peak detection circuit 9 so that the image level is detected so that the non-inverting terminal and the switch SW 1 of the comparators 10 and 11 are switched. Is applied to the inverting terminal of the comparator 10 is applied with a reference voltage (V 1 ) for detecting the image level for the low illuminance, and the output of the detection circuit 8 to the inverting terminal of the comparator 11 is the comparator (11) is applied to the inverting terminal and the switch (SW 2 ) (SW 3 ), the output of the comparator 10 (11) is the selection consisting of inverter (I1) (I2), end-gate (G 1 -G 3 ) The output of each of the AND gates G 1 -G 3 according to the outputs of the two comparators 10 and 11 to turn on and off the switches SW 1 -SW 3 , respectively. in addition, the AND gate (G 3) Force is the image signal level corresponding to the brightness around the gain is applied, and the adjustment element 13 so as to control the gain of the differential amplifier 5, a switch (SW 1 -SW 3) is connected to the automatic gain control amplifier (1) A gain control circuit according to illuminance, characterized in that it is configured to detect and control the gain of the auto gain control amplifier (1). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019880003539A 1988-03-31 1988-03-31 Circuit for auto gain control KR940003351B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019880003539A KR940003351B1 (en) 1988-03-31 1988-03-31 Circuit for auto gain control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880003539A KR940003351B1 (en) 1988-03-31 1988-03-31 Circuit for auto gain control

Publications (2)

Publication Number Publication Date
KR890015497A true KR890015497A (en) 1989-10-30
KR940003351B1 KR940003351B1 (en) 1994-04-20

Family

ID=19273274

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880003539A KR940003351B1 (en) 1988-03-31 1988-03-31 Circuit for auto gain control

Country Status (1)

Country Link
KR (1) KR940003351B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2648237C (en) 2006-04-27 2013-02-05 Dolby Laboratories Licensing Corporation Audio gain control using specific-loudness-based auditory event detection

Also Published As

Publication number Publication date
KR940003351B1 (en) 1994-04-20

Similar Documents

Publication Publication Date Title
KR920003690A (en) Optical receiver circuit
KR920009186A (en) Sample hold circuit for CCD image sensor signal
KR920005609A (en) NTSC / PAL signal discrimination circuit and upper limit active filter
KR890015497A (en) Gain Control Circuit for Automatic Gain Control Amplifier According to Illuminance
KR920003742A (en) Video signal average luminance level detection device
KR910001368A (en) Driving state detection device of vehicle
KR910010831A (en) Circuitry for detecting output distortion of the last stage of an audio device
KR850000867A (en) Color tv receiver
KR890015595A (en) Automatic Gain Control
KR920013016A (en) Automatic Gain Control Circuit of Camera
KR920003787A (en) Black level correction circuit
KR900016794A (en) Saturation Adjustment Method and Device
KR900019475A (en) Auto focus circuit
KR900004347Y1 (en) Line relative detecting circuit of monitor
KR940018694A (en) Infinite Distance Determination Circuit of Camera
KR840008728A (en) Emitter Follower SEPP Circuit
KR940023182A (en) Camcorder's Auto White Balance Circuit
KR900004177A (en) Automatic Contrast Control Circuit of Video Camera
KR950009562Y1 (en) Shutter mode control circuit of a video camera
KR940017935A (en) Finger remote control device
KR900003599Y1 (en) The disc tracking-gror defecting circuit for the optical disc driver
JPS63271170A (en) Peak detecting circuit
KR910013944A (en) Color killing circuit and method with hysteresis
KR940017757A (en) Low-noise noise reduction system of camcorder
KR960006255A (en) Automatic Gain Control Circuit

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 19981221

Year of fee payment: 6

LAPS Lapse due to unpaid annual fee