KR890008948A - Manufacturing method of nonvolatile semiconductor device - Google Patents

Manufacturing method of nonvolatile semiconductor device Download PDF

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Publication number
KR890008948A
KR890008948A KR870012325A KR870012325A KR890008948A KR 890008948 A KR890008948 A KR 890008948A KR 870012325 A KR870012325 A KR 870012325A KR 870012325 A KR870012325 A KR 870012325A KR 890008948 A KR890008948 A KR 890008948A
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KR
South Korea
Prior art keywords
silicon nitride
film
semiconductor device
manufacturing
nonvolatile semiconductor
Prior art date
Application number
KR870012325A
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Korean (ko)
Other versions
KR910001192B1 (en
Inventor
최종완
박성식
최진석
Original Assignee
강진구
삼성반도체통신 주식회사
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Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019870012325A priority Critical patent/KR910001192B1/en
Publication of KR890008948A publication Critical patent/KR890008948A/en
Application granted granted Critical
Publication of KR910001192B1 publication Critical patent/KR910001192B1/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324Gate electrodes for transistors with a floating gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Formation Of Insulating Films (AREA)
  • Non-Volatile Memory (AREA)

Abstract

내용 없음No content

Description

비휘발성 반도체 소자의 제조방법Manufacturing method of nonvolatile semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 2 도는 본 발명의 비휘발성 반도체 소자의 단면도,2 is a cross-sectional view of a nonvolatile semiconductor device of the present invention,

제 3 도는 본 발명의 제조공정 단면도이다.3 is a cross-sectional view of the manufacturing process of the present invention.

Claims (5)

1,2차 폴리실리콘(50),(9)사이에 화학증착법에 의한 이산화 실리콘막(6)과 질화 실릴콘막(7)을 형성시키는 공정과, 일산화법에 의한 질화 실리콘 산화막(8)을 형성시키는 공정을 차례로 실행하여 게이트 절연층을 형성시킴을 특징으로 하는 비휘발성 반도체 소자의 제조방법.Forming a silicon dioxide film 6 and a silicon nitride film 7 by chemical vapor deposition between the first and second polysilicon 50, 9; and forming a silicon nitride oxide film 8 by a monoxide method. And sequentially forming the gate insulating layer. 제1항에 있어서, 이산화 실리콘막(6)을 426℃에서 200Å-300Å두께로 화학증착시킴을 특징으로 하는 비휘발성 반도체 소자의 제조방법.The method of manufacturing a nonvolatile semiconductor device according to claim 1, wherein the silicon dioxide film (6) is chemically deposited at a thickness of 200 kPa to 300 kPa at 426 ° C. 제1항에 있어서, 질화실리콘막(7)을 암모니아 개스와 디클로로 사이렌개스로 300밀리토르의 800℃에서 100Å-200Å의 두께로 화학증착 시킴을 특징으로 하는 비휘발성 반도체 소자의 제조방법.The method of manufacturing a nonvolatile semiconductor device according to claim 1, wherein the silicon nitride film (7) is chemically deposited with ammonia gas and dichloro siren gas at a thickness of 100 kPa to 200 kPa at 800 占 폚 of 300 millitorr. 제1항에 있어서, 질화실리콘 산화막(8) 형성시 질화실리콘막(7)을 1000℃의 스팀분위기로 10분간 열산화 시킴을 특징으로 하는 비휘발성 반도체 소자의 제조방법.The method of manufacturing a nonvolatile semiconductor device according to claim 1, wherein the silicon nitride film (7) is thermally oxidized for 10 minutes in a steam atmosphere at 1000 ° C when the silicon nitride oxide film (8) is formed. 화학증착법에 의한 이산화 실리콘막(6)과 질화 실리콘막(7), 열산화법에 의한 질화실리콘산화막(8)을 차례로 형성시켜 집적회로의 키패시터 절연층으로 사용하는 키패시터의 제조방법.A method for producing a key capacitor, wherein a silicon dioxide film (6) by a chemical vapor deposition method, a silicon nitride film (7), and a silicon nitride oxide film (8) by a thermal oxidation method are formed in this order and used as a key capacitor insulating layer of an integrated circuit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870012325A 1987-11-03 1987-11-03 Semiconductor device KR910001192B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870012325A KR910001192B1 (en) 1987-11-03 1987-11-03 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870012325A KR910001192B1 (en) 1987-11-03 1987-11-03 Semiconductor device

Publications (2)

Publication Number Publication Date
KR890008948A true KR890008948A (en) 1989-07-13
KR910001192B1 KR910001192B1 (en) 1991-02-25

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ID=19265740

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870012325A KR910001192B1 (en) 1987-11-03 1987-11-03 Semiconductor device

Country Status (1)

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KR (1) KR910001192B1 (en)

Also Published As

Publication number Publication date
KR910001192B1 (en) 1991-02-25

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