KR890008718A - How to reduce input port - Google Patents

How to reduce input port Download PDF

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Publication number
KR890008718A
KR890008718A KR870013545A KR870013545A KR890008718A KR 890008718 A KR890008718 A KR 890008718A KR 870013545 A KR870013545 A KR 870013545A KR 870013545 A KR870013545 A KR 870013545A KR 890008718 A KR890008718 A KR 890008718A
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KR
South Korea
Prior art keywords
mode
input port
processing unit
central processing
switch
Prior art date
Application number
KR870013545A
Other languages
Korean (ko)
Other versions
KR920010486B1 (en
Inventor
강창수
Original Assignee
최근선
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 최근선, 주식회사 금성사 filed Critical 최근선
Priority to KR1019870013545A priority Critical patent/KR920010486B1/en
Publication of KR890008718A publication Critical patent/KR890008718A/en
Application granted granted Critical
Publication of KR920010486B1 publication Critical patent/KR920010486B1/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K5/00Methods or arrangements for verifying the correctness of markings on a record carrier; Column detection devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K15/00Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Facsimiles In General (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

내용 없음No content

Description

입력포트 감소방법How to reduce input port

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명의 방법에 의한 회로도.3 is a circuit diagram according to the method of the present invention.

제4도는 본 발명의 방법에 의한 중앙처리장치 신호 흐름도.4 is a signal flow diagram of a central processing unit according to the method of the present invention.

Claims (1)

고정단자(a2-a5)에 각기 그 값이 상이한 저항(R12-R15)이 접속되고, 고정단자(a6)는 접지된 선택 스위치(SW12-R15)이 접속되고, 고정단자(a6)는 접지된 선택스위치(SW11)의 가동단자를 저항(R11) 및 중앙처리장치(11)의 아날로그신호 입력포트(AN11)에 접속하여, 중앙처리장치(11)가 인자 프로그램을 수행하면서 입력포트(AN11)에 인가된 신호를 입력하고, 그 입력한 신호의 크기에 따라 상기 스위치(SW11)의 절환상태를 판별하여 카세트 모드 및 테스트 모드, 온라인 모드, 현상 모드, 매뉴얼 모드를 선택적으로 수행하게 함을 특징으로 하는 입력포트 감소방법.The fixed terminals a 2-a 5 are connected to resistors R 12- R 15 having different values, and the fixed terminals a 6 are connected to a grounded selector switch SW 12- R 15 . The terminal a 6 connects the movable terminal of the grounded selection switch SW 11 to the resistor R 11 and the analog signal input port AN 11 of the central processing unit 11 so that the central processing unit 11 is connected. Inputting the signal applied to the input port (AN 11 ) while performing the printing program, and determines the switching state of the switch (SW 11 ) according to the magnitude of the input signal to cassette mode, test mode, online mode, development mode And selectively performing a manual mode. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870013545A 1987-11-30 1987-11-30 Input port reduction method KR920010486B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870013545A KR920010486B1 (en) 1987-11-30 1987-11-30 Input port reduction method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870013545A KR920010486B1 (en) 1987-11-30 1987-11-30 Input port reduction method

Publications (2)

Publication Number Publication Date
KR890008718A true KR890008718A (en) 1989-07-12
KR920010486B1 KR920010486B1 (en) 1992-11-28

Family

ID=19266447

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870013545A KR920010486B1 (en) 1987-11-30 1987-11-30 Input port reduction method

Country Status (1)

Country Link
KR (1) KR920010486B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100471547B1 (en) * 2002-09-17 2005-03-10 현대모비스 주식회사 Circuit for expanding ports number of micom

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100471547B1 (en) * 2002-09-17 2005-03-10 현대모비스 주식회사 Circuit for expanding ports number of micom

Also Published As

Publication number Publication date
KR920010486B1 (en) 1992-11-28

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