KR890003685B1 - Real-time hierarchal pyramid signal processing apparatus - Google Patents

Abstract

The process for the analysing frequency spectrum of the information component (G0) of the video signal having certain dimensions in (N+1) frequency bands where n is a constant over 2 includes a pipe line having a set of sequentially arranged sampled-signal converters (100- 1,...100-N) for analysing the frequency spectrum during delayed real time. The converters have the first input terminals (G0,..., Gn), the second input terminals (CL1,..., CLn), the first output terminals (G1,...,Gn), and the second output terminals (L0,...,Ln-1). The second input terminal of each converter receives divided sampling frequency clock (CL1, ...,CLn).

Description

Real time layer pyramid signal processor

1 is a functional block diagram illustrating the most common and inclusive form of the present invention.

FIG. 1A is a block diagram showing a first digital embodiment for any one of the sample signal converting means of the sample signal converting means set in FIG.

FIG. 1B is a block diagram showing a second digital embodiment for any one of the sample signal converting means of the sample signal converting means set in FIG.

FIG. 1C is a block diagram showing a digital embodiment of the last sample signal changing means associated with the set of sample signal converting means of the first or second embodiment of FIG.

2 is a diagram of a kernel weighting function that can be used to practice the present invention.

3 is a block diagram of a spectral analysis and one-dimensional system for spectral change circuits and signal synthesizers embodying aspects of the present invention.

4 is a block diagram of one analysis stage used in the iterative operation of the spectrum analysis process of FIG. 3 in which an aspect of the present invention has been analyzed.

5 is a modified block diagram showing another embodiment processing for the analysis stage of FIG.

6 is a block diagram of one synthesis stage for spectral components used in the signal synthesis iteration of FIG.

7, 8, 9 and 10 are block diagrams of the representative spectrum changing circuit of FIG. 3 used in the present invention.

FIG. 11 is a modified block diagram of the FIG. 3 system used when attempting to align spectral samples at signal processing time in accordance with the present invention.

12 is a block diagram of a two-dimensional spatial frequency spectrum analyzer using a pipelined architecture (configuration) to perform spectral analysis in delayed real time (real time).

FIG. 13 is a signal synthesizer block diagram for synthesizing signals representing an output spectrum analyzed by the spectrum analyzer of FIG.

* Explanation of symbols for main parts of the drawings

100-1, 100-2... 100-N: sample signal converting means

100a-K, 100b-K: Sample signal converting means

102: m-tap: digital convolution filter 104: decimator

106: sample extender 108: n-tap digital interpolation filter

109: delay circuit 110: sample subtractor

200: weighting factor 202: turret

305: ADC (Analog / Digital Converter)

310, 315, 320, 325, 330, 335: analysis team.

311, 316, 321, 326, 331, 336: initial tow pass filter stage

312, 317, 322, 327, 332, 337: decimation circuit

313, 318, 323, 328, 333, 338: stretch circuit

314, 419, 324, 334, 339: delay and subtraction circuit

340-344: Delay Line 345-351: Change Circuit

353, 355, 357, 359, 361, 363: adder

352, 354, 356, 358, 360, 362: stretch circuit

470, 473, 570-0, 693: Shift register

471, 474, 694: weight and summing circuit

472, 692: multiplexer 475: subtractor

476: delay circuit 575-0: subtractor

580-586, weighting circuit 587, 588: summing circuit

695: Adder 700: Baseline Clipper

897: towing switch 898: latch circuit

899: 2 quadrant multiplier 990, 1091: ROM

1110-1116: Intensifier

1100-1104, 1106, 1120-1125: Delay line

1205: Analog-to-Digital Converter

1210, 1220, 1230, 1240, 1250, 1260

1211, 1221, 1231, 1241, 1251, 1261, 1214, 1224, 1234, 1244, 1254, 1264: 2-D low pass spatial frequency filter

1212, 1222, 1232, 1242, 1252, 1262: decimator

1213, 1223, 1233, 1243, 1253, 1263: stretch circuit

1215, 1225, 1245, 1265; Delay circuit

1216, 1226, 1236, 1246, 1256, 1266: Subtractor

1360, 1365, 1370, 1375, 1380, 1385: signal synthesis

1361, 1366, 1371, 1376, 1381, 1386: stretch circuit

1362, 1367, 1372, 1377, 1382, 1387: 2-D low pass spatial frequency filter

1363, 1368, 1373, 1378, 1383, 1388: adder

The present invention relates to a signal processing apparatus for analyzing and / or synthesizing signals, wherein the frequency spectrum of an information component (with one or more dimensions) of a given temporal signal having the highest frequency f ₀ is analyzed in delayed real time, The present invention relates to a signal processing apparatus that uses a pipeline architecture to synthesize a temporal signal from the analyzed frequency spectrum in delayed real time. In addition, the signal processing apparatus of the present invention is used to image the two-dimensional spatial frequency of the television images formed by the temporary image signal in a delayed real time.

Much work has been done to model the impact on the human visual system. It has been found that the human visual system can decompose spatial frequency information into a plurality of adjacent overlapping spatial frequency bands to obtain a decomposition value of primary spatial frequency information included in luminance images. Each band has a width of one octave, and the center frequency of each band differs from that of its neighboring band by two factors. Studies have shown that approximately seven bands or "channels" span the 0.5-60 cycle / degree spatial frequency range of dormant visual systems. This finding is important in that spatial frequency information separated from other spatial frequency information by two factors can be processed independently by the human visual system.

In addition, it has been found that the spatial frequency processing that occurs in dormant visual systems is concentrated in space. Thus, the signals in each spatial frequency channel are computed over a small subregion of the image. These subregions overlap each other and are generally two cycles wide at a particular frequency.

20%)을 요하고, 낮은 공간 주파수들은 비교적 낮은 시각 대비율(3사이클/도에서

0.2%)을 요한다.When the sinusoidal diffraction grating is used as the test pattern, it was found that the limit-to-limit sensitivity for the sinusoidal diffraction grating image rapidly rolls off as the spatial frequency on the sinusoidal diffraction grating increases. That is, high spatial frequencies have high visual contrast (at 30 cycles / degree).

20%), and low spatial frequencies require relatively low visual contrast (at 3 cycles / degree).

0.2%).

It has been found that the human visual system's ability to detect the change in contrast ratio on a sinusoidal diffraction grating above the threshold contrast ratio is better at lower spatial frequencies than at higher spatial frequencies. In particular, to accurately determine the 75% contrast ratio of time, the average human subject needs a 12% contrast ratio change for approximately 3 cycles / degree sine wave diffraction gratings, and 30% for a 30 cycles / degree diffraction grating. This requires a change in contrast ratio.

Dr. Peter J. Burt, who is familiar with the above characteristics for human visual systems, is performed by a computer to analyze two-dimensional spatial frequencies of an image into a plurality of separate spatial frequency bands in real time. The operation (hereinafter referred to as the butte pyramid operation) was developed. Each spatial frequency band (unlike the lowest spatial frequency band) is one octave wide. Therefore, when the maximum spatial frequency of the image of about f _0, the highest frequency band is f _0/2 f ₀ include octanoic Havre to the (center frequency 3f _0/4) at and then the highest frequency band of the f ₀ in / 4 it is f _0/2 including okti Havre to the (center frequency 3f _0/8).

Introduce the following list of articles, authored or co-authored by Dr. Burtt, which details the various aspects of Burt Pyramid. "Segmentation and Estmation of Image Region Properties Through Cooperative Hierarchial," written by Dr. Peter J. Burtett and others, in the December 1981 issue of LEEE Transaction on System, Man and Cybernetics, Vol SMC-11, No. 12, pp 802-809. Computation ", with; Peter J., LEEE Transaction on Communications, April 1983, Vol. COM-31 No. 4 pp 532-540. "The Laplacian Pyramidas a Compact Image Code" written by Burt et al .; Peter J. in Computer Vision, Graphics, and Image Proces Sing (1983), Vol. 21, pp 368-382. "Fast Algorithns for Esitmating Local Image Properties" written by Burt; Peter J. in Computer Graphics and Image Processing (1980) No. 14, pp 271-280. "Tree and Pyramid Structures for Coding Hexagonally Sampled Binary Image" written by Burt; "Pyramide-based Extraction of Local Image Features With Applications to Motion and Texture Analysis" by Peter J. Burt at SPIE Vol 360, 114-124; "Fast Filter Transforms for Image Processing", written by Peter J. Burt, in Computer Graphics and Image Processing (1981) No. 16, pp 2-51; and Image Processing Laboratory, Electrical, Computer and Systems Engineering Deparyment, Rensselaer Polytechnic "A Multiresolution Spline with Applications to Image Mosaics" by Peter J. Burt in the June issue of the Institute, June 1983; and Peter J. in the July 1982 issue of the Image Procesing Laboratory, Electrical and Systems Engineering Department, Rensselaer Polytechnic Institute. "The Dyramid as a Structure for Efficient Computation" by Burt.

The Bert Pyramid operation uses a specific sampling technique to analyze a relatively high resolution initial image into hierarchies of N (integers of two or more) separate component images plus the rest of the Gaussian images, where each of the separated component images is an initial image. The Laplacian image is composed of octave different from the spatial frequency of. The rest of the Gaussian image is composed of all spatial frequencies of the initial image below the Laplacian image of the lowest octave component. The term " pyramid " used in the present invention is derived from the continuous reduction of the hierarchical sample density and spatial frequency bandwidth of each component image from the highest octave component image to the lowest octave component image.

The first advantage of the Burt Pyramid operation is that an initial high resolution image can be synthesized from the component image and the rest of the Gaussian image without introducing spurious spatial frequencies due to aliasing. A second advantage of the Burt Pyramid operation is that the spatial frequency bandwidth of one octave in the layer of each component image coincides with the characteristics of the human visual system described above. This means that any component image that seriously affects any other component image in order to augment or generate any other desired effect on the composite image derived from the processed component images, may be processed in a separate manner without any signal processing. You can optionally process or change the spatial frequencies of the layer. An example of such a desired effect is the Multiresolution spline technique described in detail in the paper "A Multiresolution spline with Applications to Image Mosaics" above.

So far, Burt Pyramid operations have been performed in a non-real time by a general purpose digital computer. The level of each pixel (image element: pixel) of the initial image is expressed by the number of multi-bits (for example, 8 bits) stored at each address position of the computer memory. For example, a relatively high resolution two dimensional initial image composed of 2 ⁹ (512) pixel samples in each two dimensional may be used to store 2 ¹⁸ (multiple numbers respectively representing the levels of each pixel sample constituting the initial image. 262, 144) requires a large memory of the address location.

The initial image stored in the memory can be processed by the digital computer according to the Burt Pyramid algorithm. This process includes repeating a process such as convolution of pixel samples by a predetermined kernel weighting function, sample subtraction, sample extension by interpolation, sample decimation, and the like. The kernel function size in one or more dimensions is relatively small in number of pixels compared to the size of each dimension of the entire image. Subregions or windows of the image pixels that are the same size as the kernel function and are symmetrically arranged are multiplied by the kernel weighting function and summed by the bone evolution operation.

The kernelweighting function is chosen to work with a low pass filter of the multidimensional spatial frequency of the convolved image. The nominal cutoff frequency of the low pass filter characteristic (known in the filter technology as "coner" or "break") provided in each dimension by the kernel function is approximately one-third of the highest frequency in the dimension of the convolved signal. Is selected to be 2. However, this lowpass filter characteristic does not have a "brick wall upward transition at a given cutoff frequency, but a relatively gradual upward transition. The nominal cutoff frequency is a predetermined attenuation value (e.g., 3 dB) is defined as the frequency at which the more relaxed upward transition filters are used because Burr Pyramid compensates for the introduction of spurious frequencies due to aliasing caused by the progressive upward transition low-pass filter characteristics. The convolved image is decimated by effectively removing all other convolved pixels in each dimension of the image under continuous contemplation, thereby reducing the number of pixels of the convolved image in the extra dimension by one half. Since the image is a two-dimensional image, the convolved decimated image is included in the image before decimation. The number of pixels is composed of 1/4. The number of pixel sample reduction of the cone revolved decimated image, called the Gaussian image is stored in the second memory.

The above-described convolution-decimation process is repeated repeatedly N times (N is an integer greater than or equal to 2) starting from the memorized initial image pixel sample, thus layering the initial high-resolution image and the N-decreased-resolution Gaussian additive image. Obtain an image consisting of pyramids (N + 1). The number of pixel samples (sample density) in each dimension of each additional image is 1/2 of the number of pixel samples in each dimension of the previous image. If the initial high resolution memory image is G ₀ , the hierarchies of the additional picture diagrams stored N times may appear from G ₁ to G _N , respectively, and the number of consecutively reduced pixel samples of these N additional pictures is divided into N Are stored in each of the memories. Therefore, when the stored initial image is calculated, there are a total of N + 1 memories.

In a non-real-time execution of the Burt Pyramid operation, the next computational process generates additional samples of interpolated values between each pair of G ₁ pixel samples stored in each dimension of the hierarchy, resulting in sample density of the initially stored G ₀ image. It is a process of stretching the reduced sample density of the G ₁ image stored to be restored. The digital value of each pixel sample of the stretched G ₀ image is thus subtracted from the stored digital value of the corresponding pixel sample of the initial G ₀ image to provide another image known as the Laplacian image. Laplacian image indicated by L ₀ with the initial G ₀ image and the copper sample density is f _0/2 to f ₀ okti or to be composed of the spatial frequencies contained in the initial image principle in Havre, often G in which _one image A small and low response corresponding to the loss of information caused by the introduction of a sample of interpolation values that occurs to increase the sample density retroactively up to the sample density of the initial G ₀ image and to the sample density of the initial G ₀ image. The spatial frequency error compensation component is added. Therefore, the Laplacian image L ₀ is replaced with the initial image G ₀ in the first memory of the N + 1 pyramid memories.

In a similar manner, repeating this process yields a layer consisting of _N-1 additional Laplacian images, ie, L ₁ to L _N-1 . When the Gaussian images G ₁ to G _N-1 are replaced with Laplacian images, they are replaced by L ₁ to L _N-1 and written to each of the N -1 additional corresponding memories. The Gaussian image G _N with the lowest sample density is not replaced by the corresponding memory by the Laplacian image, but is the remaining Gaussian image composed of the lowest spatial frequency included in the initial image, that is, the spatial frequency below L _N-1 octave. It remains in memory.

The Burt Pyramid operation allows the initial image to be recovered by an iterative operation process including a successive step of adding to the Laplacian image L _N-1 stored without aliasing. This composite image is extended in a similar manner and added to the Laplacian image L _{N-2 or the} like until the initial high-resolution image is synthesized by combining all the Laplacian images and the rest of the image. In addition, one or more initial images may be analyzed with N Laprasian images and the rest of the Gaussian images, and then any specific desired image processing or splining may be performed before compositing the full high-resolution image from the analysis. It is possible to introduce a change process.

The non real-time implementation of the Burt Pyramid operation by computer processing is effective for processing fixed image information, but it is not necessary for the analysis of the spectrum of continuously occurring images that may vary continuously in time such as continuous image frames of a television image. Inappropriate. However, the real-time (real-time) execution of the Burt Pyramid operation provided by the present invention is suitable for analyzing nine consecutive time varying images.

Specifically, it is an object of the present invention to provide a signal processing apparatus using a pipeline architecture for analyzing in real time a frequency spectrum of a given temporal signal information component having the highest frequency f ₀ . The information component of the temporary signal given here corresponds to information with a given number of dimensions. The signal processing apparatus of the present invention is composed of a set of N (n is an integer of 2 or more) sample signal converting means sequentially arranged, each converting means comprising first and second input terminals and first and second output terminals. Have. The first input terminal of the first converting means of the set is coupled to receive a given transient pressure signal. Each first input terminal of the second to N-th conversion means of this set is coupled to a first output terminal of the conversion means immediately before this set, so that each second to N-th conversion means is thereafter converted from the next to the set. Signal directly to the means. The second input terminal of each conversion means of this set is coupled to receive a separate sampling clock. In this arrangement, each conversion means of the set induces a signal at its first and second output terminals at the same rate as the sampling frequency of the clock applied thereto.

In addition to this, each conversion means of the set has a low pass transfer function between the first input terminal and the first output terminal with respect to the signal information component applied to the first input terminal thereof. The lowpass transfer function of each conversion means of the set has a nominal cutoff frequency which is a direct function of the sampling frequency of the clock applied to the second input terminal of the conversion means of the set. The clock applied to the second input terminal of the first change means of the set is (a) twice f ₀ and (b) nominal for the low pass transfer function of the first conversion means of the set less than f _0. It has a sampling frequency that provides a cutoff frequency as the information component. In addition, the clock applied to the second input terminal of each second to Nth conversion means of the set is (a) less than the clock frequency applied to the second input terminal of the conversion means immediately before the set, and (b) the first input thereof. (C) has a sampling frequency that is at least equal to or twice the maximum frequency of the information component applied to the terminal, and (c) provides a nominal cutoff frequency for the lowpass transfer function less than that of the conversion means immediately preceding the set.

The signal derived at the second output terminal of each conversion means of the set corresponds to the difference between the information component applied to its first input terminal and the information component of the direct function derived at its first output terminal.

In addition, the given temporal signal information component processed by the signal processing apparatus of the present invention corresponds to the two-dimensional spatial frequency component of each continuous frame of the television image scanned in two-dimensional series.

In general, the present invention is useful for analyzing the frequency spectrum of signals derived from sources of spatial or non-spatial frequencies in more than one dimension, regardless of the nature of the source. Thus, for example, the present invention is useful for analyzing complex signals having one or more dimensions derived from audio sources, radar sources, seismograph sources, robot sources, etc., in addition to two-dimensional visual image sources such as television images.

It is further an object of the present invention to provide a signal processing apparatus using a pipeline architecture, which corresponds to a set of signals analyzed for synthesizing the composite signal in delay real time.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

Referring to FIG. 1, a set of sequentially arranged N sample signal conversion means 100-1-100-N (where N is an integer of 2 or more) has two input terminals and two output terminals. The given temporary signal G ₀ forming the information is applied as an input to the first input terminal of the two input terminals of the first converting means 100-1 of the set. The transient address G ₀ may be a continuous analog signal such as an audio signal or a video signal or vice versa. In the latter case each sample level can be expressed directly as a magnitude level, or each sample amplitude level via an analog-to-digital converter (not shown in Figure 1) before applying the transient signal G ₀ to the first input terminal of the converter. Can be indirectly represented by the digital number obtained by passing. The frequency spectrum of G ₀ comprises a range extending between zero (0) and frequency f ₀ , that is, a range containing all desired frequencies corresponding to information with a given number of dimensions. Specifically, G ₀ may be a pre-filtered signal that includes a frequency not greater than f ₀ . In this case, the clock frequency 2f ₀ of the first converter 100-1 satisfies the Nyquist determination criteria for all frequency components of f ₀ . In contrast, however, G ₀ may include some frequency component that is higher than f ₀ that is not desired. In this latter case, the Nyquist discrimination method is not satisfied, and arbitrary aliasing occurs. In practical terms, although undesirable, such aliasing can often be acceptable (if not too large).

In FIG. 1, the first power terminal of each of the conversion means 100-2-100-N of the set is coupled to the first output terminal of the conversion means immediately before the set. Specifically, the first output terminal of the signal conversion means 100-1 is coupled to the first input terminal of the conversion means 100-2, and the first output terminal of the conversion means 100-2 is converted to the conversion means 100-. 3) is coupled to the first input terminal (not shown); And the first output terminal of the conversion means of 100- (N-1) (not shown) is coupled to the first input terminal of the conversion means 100-N. Thus, the signal processing device shown in FIG. 1 uses a pipeline architecture to couple each of the respective transformation means of the set to each other.

The separated sampling frequency clock is applied to the second input terminal of each set of conversion means 100-1 to 100-N. Specifically, the converting means 100-1 has a sampling frequency clock CL ₁ applied to the second input, and the converting means 100-2 has a sampling frequency clock CL ₂ applied to the second input. The converting means 100- _N then has a sampling frequency clock CL _N applied to the second input. The relative values of the clocks CL ₁ to CL _N with respect to each other are as shown in FIG.

Further in FIG. 1, the converting means 100-1 induces a second output signal L ₀ at its second output terminal. In a similar manner, the converting means 100-2 to 100-N of the set induce respective second output signals CL ₁ to CL _N-1 to their respective second output terminals, respectively.

Each of the converting means 100-1 to 100-N in the set is connected to the first input terminal and the first output terminal for the frequency spectrum of the information component of the input signal applied to the first input terminal, regardless of its specific internal configuration. Represents a lowpass transfer function between (indicated by a black box). In addition, this lowpass transfer function of each of the conversion means 100-1 to 100-N in the set has a roll-off with a nominal cutoff frequency which is a direct function of the sampling frequency of the clock applied to its second input terminal. Has As mentioned above, in the case of Burt Pyramid, the roll-off (upward transition) is progressive rather than "brickwall".

Specifically, the converting means 100-1 has the above-described input signal G ₀ at its first input terminal. In the frequency spectrum of G ₀ , the highest frequency is around f ₀ . In addition, the sampling frequency clock CL ₁ applied to the second input terminal of the converting means 100-1 is equal to 2f ₀ (i.e., the Nyquist discrimination criterion is applied to all desired frequencies within the frequency spectrum of G ₀ . Have a satisfying frequency). Under this condition, the low pass transfer function between the first input terminal and the first output terminal of the converting means 100-1 has frequencies in the G ₀ frequency spectrum smaller than f ₁ (f ₁ <f ₀ ). Passed through to the first output terminal of 1). Therefore, the output signal G ₁ is composed mainly of the low spectrum of the frequency spectrum of G ₀ , and the spectrum by the sum of the spectrum composed of this low spectrum and the spectrum determined by the characteristics of the low pass filter is converted into the spectrum of the conversion means 100-1. It is derived from the first output terminal. This signal G ₁ is then applied as one input to the first input terminal of the conversion means 100-2.

As shown in FIG. 1, the sampling frequency clock CL ₁ applied to the second input terminal of the converting means 100-2 is twice the maximum frequency f ₁ of the Nag G ₁ frequency spectrum than 2f ₀ (the sampling frequency of clock CL ₁ ). At least equal to 2f ₁ . Thus, the sampling frequency of clock CL ₂ is sufficient to satisfy the Nyquist discrimination criterion for the desired highest possible frequency f ₀ in the frequency spectrum of G ₁ applied to the first input terminal of the immediately preceding conversion means 100-1. Although not high, it is sufficient to satisfy the Nyquist discrimination criteria for the frequency spectrum of G ₁ applied to the first input terminal of the change means 100-2. The aspect of the relationship in which the sampling frequency of the clock applied to the second input terminal of the converting means of the set becomes lower as the sequential position of the converting means of the set becomes lower generally applies. Specifically, the clock applied to the second input terminal of each converting means 100-2 to 100-N of the set is smaller than the clock applied to the second input terminal of the converting means immediately before the set, and (C) Sampling frequency that reduces the nominal cutoff frequency for the Glowpass transfer function to a value that is at least equal to twice the maximum frequency of the signal information component applied to the first input terminal of the set and is less than that of the conversion means immediately preceding the set; Have Therefore, the maximum frequency f ₂ of the signal G ₂ appearing at the second output terminal of the converting means 100-2 is smaller than f ₁ . And finally, the maximum frequency f _N of the frequency spectrum of the signal G _N appearing at the first output terminal of the converting means 100 -N is applied to the first input terminal of the converting means 100 -N and immediately after the converting means 100 -N. It is smaller than the frequency f _N-1 of the frequency spectrum of the signal G _N-1 appearing at the first input terminal of the preceding conversion means.

Again, when looking at each conversion means 100-1 to 100-N as a black box, each output signal L ₀ -to be derived from the second output terminal of each conversion means 100-1 to 100-N in the set, respectively. L _N-1 ) correspond to the difference between the direct function of the signal information component derived at the first output of the converting means and the signal information component applied to the first input terminal of the changing means. Thus, as indicated in FIG. 1, L ₀ corresponds at least to or equals the difference G ₀ -g (G ₁ ). Where g (G ₁ ) is G ₁ itself or any direct function of G ₁ . Similarly, L ₁ corresponds at least to or equal to G ₀ -g (G ₁ ); … L _N-1 corresponds at least to or equal to G _N-1 -g (G _N ).

The signal processing apparatus shown in FIG. 1 has a set of Laplacian outputs L ₀ -L _N-1 plus (+) respectively derived from the second output of each pipelined conversion means 100-1-100 -N of the set. The initial signal G ₀ is analyzed by a plurality of parallel outputs consisting of the remaining Gaussian output G _N derived from the first output terminal of the final conversion means 100 -N.

In general, the limit of the relative value of each sampling clock frequency f ₀ -f _N-1 is as shown in FIG. However, for each ratio CL ₂ / CL ₁ , CL ₃ / CL ₂ ,. Second input of each converter 100-1 to 100-N such that CL _N / CL _N-1 is equal to 1/2 or an integer multiple of 1/2 corresponding to the number of dimensions of the information component of the divided signal It is advantageous to use the value of the sampling clock frequencies applied to the terminal. This results in an initial output within a certain octave when the analysis output of the frequency spectrum of the initial signal G ₀ ignores any sampling error due to loss of signal information caused by the addition of spurious aliasing frequency components or a decrease in the sampling density. Separate parallel frequency passbands of the Laplacian component signals (L ₀ -L _N-1 ), each of which includes only those frequencies in the frequency spectrum of the signal G ₀ , each with an octave of bandwidth for each dimension of the information component. Results in splitting into two groups. At this time, the frequency of the frequency spectrum of the initial signal G ₀ below the lowest octaab Laplacian component signal L _N-1 is included in the remaining Gaussian signal G _N of the analyzed output.

In general, N is an integer with any given value of two or more. However, it is possible to analyze the frequency spectrum of the initial signal G ₀ having a sufficiently high resolution even with a relatively small N value. In one example, visual images, n is sufficient as the value of 7, and in this case the frequency in each dimension of the residual signal G _N G ₀ is the frequency spectrum up to a frequency f ₀ of the initial signal 1/128 ⁽²⁷ Becomes smaller than).

Referring to FIG. 1A, a first digital embodiment of each of the sample signal changing means 100-1 to 100-N of the pipe-line set shown in FIG. 1 is shown in outline form. In FIG. 1A, any one of the set conversion means 100-1 to 100- (N-1) is represented by the first embodiment 100 _ak , and the first embodiment immediately following the conversion means. An example is represented by 100a-k (k + 1).

The conversion means 100 _ak includes an m-tap digital convolution filter 102 (where m is an integer of 2 or more), a decimator 104, a sample extender 106, and an n-tap digital interpolation filter 108 (Where n is an integer of 2 or more), and a delay circuit 109 and a sample subtractor 110. The sampling frequency clock CL _k (i.e., the clock applied to the second input terminal of the converting means 100 _ak ) is applied to each of its components 102, 104, 106, 108, and 110 as a control input.

The signal G _k-1 applied to the first input terminal of the converting means 100a-k is applied to the m tap digital convolution filter 102 as an input, and after being delayed by the delay circuit 109, bite into the subtractor 110. Applied by force. The sample densities shown in FIG. 1A are sample densities for the information signal dimension. Specifically, the signal G _k-1 has the sample density of each information signal dimension mapped to the temporary region at the sampling rate of the clocks of the converters 100a-k. Thus, each and every sample comprising G _k-1 is operated by the m tap digital convolutional filter 102. The purpose of the filter 102 is to reduce the maximum frequency of the output signal G _k relative to the maximum frequency of the input signal G _k-1 , as described above in connection with FIG. However, as shown in FIG. 1A, the sample density at the output of the filter 102 is still at the CL _k sample rate.

This output from filter 102 is applied to an input to decimator 104. The decimator 104 directs any of the successive samples of each dimension applied to its input from the filter 102 to its output. Thus, the sample density for each dimension at the output of the decimator 104 is reduced compared to the sample density of that dimension at the input to the decimator 104. Specifically, as shown in FIG. 1A, the sample density CL _{k + 1} of each dimension at the output of the decimator 104 is the second input of the next converter 100a- (k + 1) immediately following the temporary region. It can be mapped to the reduction rate defined by the reduced sampling frequency clock CL _{k + 1} applied to the terminal. In addition, the reduced sample density samples of each dimension of the G _k signal at the output of the decimator 104 mapped into the temporal region are immediately followed by the sampling frequency clock applied to the second input terminal of the converter 100a- (k + 1). Phase occurs with generation. In FIG. 1A, the G _k output signal from the decimator 104 including the signal at the first output terminal of the converting means 100a-k is the first input terminal of the next converting apparatus 100a- (k + 1). Is applied to. Therefore, the periodicity relation between the reduced sampling density of the samples of G _k at the first input terminal and the reduced sampling frequency clock CL _{k + 1} at the second input terminal of the converting means 100a- (k + 1) is equal to the first. It is similar to the periodicity relation between the higher sampling density of G _k-1 samples at the input terminal and the higher sampling frequency clock CL _k at the second input terminal of the conversion means 100a-k described above.

In addition, the preferred embodiment of the decimator 104 is effective to reduce the input sample density of that dimension by one half of each dimension of the signal information. In this case decimator 104 is effective to advance all other samples at its input to its output in each dimension. Therefore, for the one-dimensional signal information, the sample density CL _{k + 1} becomes (1/2) ¹ or 1/2 of the sample density CL _k . With respect to two-dimensional information signal, the sample density in each of the two-dimensional CL _{k + 1} is 1/2 provides a two-dimensional sample density of (1/2) ² or 1/4.

Although the baseband frequency spectrum of G _k is the same at the input of the digitizer 104 and at the output of the digitizer 104, the reduced sample density G _k signal at the output from the decimator 104 is a decimator 104. This results in a certain amount of loss of phase information compared to the higher sample density _Gk signal applied to the input of.

The output from the decimator 104 is applied as an input to the sample extender 106 in addition to being applied to the first input terminal of the next conversion means. Sample extender 106 is provided to insert, as an additional sample, a digital null representing the zero level at each sample position of clock CL _K without a sample from decimator 104. In this way, the sample density at the output of the sample extender 106 is restored to the sample density at the input of the decimator 104. In the preferred case where the sample density in each dimension is reduced by one half, the sample extender 106 inserts zero in each dimension between each pair of adjacent samples in that dimension at the output of the decimator 104.

The sample extender 106 increases the sample density of its output relative to its input, but the G _K signal information at its input and its output never changes. However, the introduction of zeros has the effect of repetition or image addition of baseband G _K signal information which appears as sideband frequency spectrum CL harmonics.

The G _K signal at the output from the sample extender 106 is passed through an n-tap digital interpolation filter 108. The n-tap digital interpolation filter 108 is a lowpass filter that passes the baseband G _K signal but suppresses the sideband frequency spectrum CL harmonics. Thus, the n-tap digital storage filter 108 is effective to replace zero samples of each zero value with a sample of stored values having a value defined as each value of the information bearing samples that contain it. The effect of samples with these interpolated values is to form an envelope of the information bearing samples at high resolution. In this way, the high frequency component of the G _K signal at the output of the sample extender 106 that is equal to or greater than the baseband is removed by the n-tap digital interpolation filter 108. However, the n-tap digital storage filter 108 cannot add any information to the output of the interpolated signal of G _K that is not yet present in the reduced sample density G _K signal at the output of the decimator 104. In other words, the sample extender 106 provides for stretching the reduced sample density in each dimension of the G _K signal to restore the sample density back to each dimension of the G _K signal at the output of the m tap digital convolution filter 102. do.

The G _K-1 signal is applied as input to the m tap digital convolution filter 102 and through the delay circuit 109 to the sample subtractor 110. The sample subtractor 110 is provided to subtract the G _K signal appearing at the output of the n-tap digital interpolation filter 108 from the G _K-1 signal coupled to the first pressure terminal of the converting means 100 _ak . The delay circuit 109 provides the same delay as the overall delay introduced by the m tap digital convolution filter 102, the decimator 104, the sample extender 106 and the n tap digital interpolation filter 108. Thus, since both signals applied as inputs to the sample subtractor 110 have the same sample density CL _k in their respective dimensions and are equally delayed, the sample subtractor 110 is represented by the digital number of the corresponding sample of the G _K-1 input. Subtract the level indicated by the digital number of each sample of the G _K signal input from the level. Therefore, the output from the sample subtractor 110 constitutes the Laplacian signal L _k-1 derived at the second output terminal of the converter 100 _ak .

The only signal components of G _K-1 that are not present in the G _K signal applied to the sample subtractor 110 are present in the Laplacian L' _k-1 signal at the output of the sample subtractor 110. Such a first component consists of the high frequency portion of the frequency spectrum of the G _K-1 signal over the pass band of the m tap convolution filter 102. Thus, as an example, if the converting means 100a-k correspond to the converting apparatus 100-1 of FIG. 1, the first component of L _K-1 (L ₀ ) is G _K in passbands f ₀ to f ₁ . Frequencies in the frequency spectrum of ₋₁ (G ₀ ). However, in addition to this component, the Laplacian output L _K-1 from the sample subtractor 110 has a higher sample density G _K at the output of the m-tap digital convolution filter 102 whose phase information has been lost in the above-described decimation processing. And an error compensation second component consisting of frequencies in the passband of the m-tap digital convolution filter 102 substantially corresponding to the phase information present in the signal. Therefore, the loss phase information in the reduced sample density (decimated) G _K signal which proceeds to the first input terminal of the next converting means 100a- (k + 1) is obtained at the second output terminal of the converter 100a-k. It is generally maintained at the induced Laplacian signal L _k-1 .

Each conversion means 100-1 to 100 -N may have a configuration of the conversion means 100a-k of FIG. 1A. In this case, the remaining signal G _N of the analysis output derived at the first output terminal of the final converting means 100-N of the set is smaller than the sample density of each dimension of the G _N-1 signal applied to the first input. It has a sample density of each dimension (which is preferably 1/2). However, since, by definition, any converting means of the set also does not lead to the conversion means (100-N), the sample density of the remaining signal G _N applied to the first input terminal of the converting means _{(100-N) G N-} 1 Being smaller than the sample density of the signal is not necessary for most devices except compressed data transmission devices. Thus, in this case, all the final conversion means 100-N of the set are arranged in the manner shown in FIG. 1C rather than the conversion means 100a-k rather than configuring the conversion means 100a-k. The configuration can alternatively be configured.

In FIG. 1C, the G _N signal output of the m tap digital filter 102 having the same sample density in each dimension, such as the G _N-1 signal applied to the input of the m tap digital convolution filter 102, is dec. Instead of passing through the data, it proceeds directly as the remaining G _N signal output from the final conversion means 100a-N of the first digital embodiment. In this case, since there is no decimation, no stretching or interpolation is necessary. Accordingly, the G _N signal at the output of the m tap digital convolution filter 102 is applied directly to the sample subtractor 110 as a G _N input. In other words, the configuration of the converting means 100a-N in FIG. 1C is not the decimator 104, the sample extender 106, and the n-tap digital interpolation filter 108, so that the converting means 100a-N in FIG. k) different from the configuration. In this case, the delay circuit 109 provides the same delay as introduced by the m tap digital convolution filter 102. The first embodiment shown in Figure 1a (or alternatively, Figures 1b and 1c) provides for the real-time execution of the Burt Pyramid operation. Of course, in its most useful form, each Laplacian component of the analytical output derived by the Bert Pyramid operation has one octave of bandwidth in its respective dimension. The most useful form of the Burt Pyramid operation is achieved in the real time implementation of FIG. 1a by bringing the sampling frequency clock CL _{k + 1} in each dimension to _one half of the sampling frequency clock in that dimension.

Now we refer to another type of layer pyramid, an alternative to Burt pyramids. This other pyramid refers to the "Filter-Subtract-Decimate" (FSD) pyramid. The FSD pyramid does not have any desired properties of the Burt Pyramid, but the FSD has some other desirable features that the Burt Pyramid does not have. For example, the desirable properties of Burt Pyramids, which are not possessed by the FSD pyramids, are inherent compensations in the reconstruction synthesis of the initial signal for the spurious aliasing frequencies present in each Laplacian and remaining components of the analyzed output. Characteristic.

On the other hand, for any device, FSD pyramids require less hardware than Burt pyramids and are therefore less expensive to implement.

The signal processing apparatus of the present invention using the pipeline architecture is also useful for providing real time execution of FSD pyramids.

FSD is pyramidal member Attribution to the steps rather than as the above-mentioned converting means 100 in the pyramidal _ak-step or the conversion means such as the _ak 100 illustrated in Figure 1b, each sample signal conversion means of the set of (100 _-1 to 100 _-N ) can be configured as the second embodiment.

The converting means 100 _{bk of} FIG. 1B shows the second digital embodiment, wherein each of the converting means _100-1 to 100 _{-N of the set} shown in FIG. 1 is shown in FIG. 1B. ((100 _bk ) and 100 _b ^-- _{k + 1} ° may be used as a conversion means. In addition, the conversion means 100 _b ^- _{k + 1} ° in FIG. 1b is followed by the conversion means (100 _bk ). One of the set of conversion means 100 _-1 to 100 _{-N performed} is shown.

As shown in FIG. 1B, the conversion means 100 _bk is composed of an m-tap digital convolution filter 102, a decimator 104, a delay circuit 109 and a sample subtractor 110. The configuration arrangement of the changing means 100 _bk of the second embodiment shown in FIG. 1B is such that a G _1-k signal having a CL _K sample density is input to the m-tap digital convolution filter 102 and a delay circuit 109. ) the sample subtractor (output signal G with _{k, k} CL sample density is applied as input to 110), and then directly through the converting means 100 _b- ^- the density of the samples decrease to the first input terminal of the _{k + 1} ° G signal _k Since the sample density of the G _K signal is passed through the decimator 104 in order to reduce it to CL _{K + 1} in each dimension before applying, the second embodiment of FIG. 1B shows the first conversion means 100 _ak (first a Similar to the configuration arrangement of FIG.

The converting means 100 _{bk of} the second embodiment subtracts a G _k signal having a CL _k sample density in each dimension, which is applied from the output of the m-tap digital convolution filter 102 to the input of the decimator 104. It is different from the converting means 100 _{ak of} the first embodiment because it is directly applied to the G _k input of 110. Specifically, it is different from the conversion means 100 _{ak of} the first embodiment, which uses a C _k signal with a reduced CL _{k + 1} sample density in each dimension at the output of the decimator 104. Thus, the first embodiment provides a digital interpolation filter of sample stretcher 106 and n taps to recover the G _k signal to its CL _k sample density in each dimension before being applied to the G _k input of sample subtractor 110. Requires 108. Since the G _k input of the converting means (100 _bk ) to the sample subtractor 8110 of the second embodiment is not derived from the decimated sample density source, the structure of the converting apparatus (100 _bk ) includes the sample extender 106 and the n-tap digital. No interpolation filter 108 is necessary. Thus, in FIG. 1B, the delay circuit 109 provides the same delay introduced by the m-tap digital convolution filter 102. Furthermore, the L _k-1 output from the sample subtractor 110 consists of high frequency components of the frequency spectrum of the G _k-1 signal that do not appear in the G _k signal of the output of the m-tap digital convolution filter 102.

According to the second embodiment, the final conversion means 100 -N of the set may have a configuration arrangement of the conversion means 100 _bk or vice versa, or a configuration arrangement of FIG. 1c.

1A and 1B, each embodiment in the first and second embodiments shown is a digital embodiment. In this digital embodiment, an analog / digital converter is initially used to transform the analog signal into digital level samples to represent each sample level in multi-bit binary.

However, the first or second embodiment of the present invention is not necessarily implemented in digital form only. Sample signal conversion means using a charge coupled device (CCD) are well known in the art. For example, CCD transverse filters, such as Split gate filters, can be designed as convolution filters and interpolation filters. CCD signals are written in a series of separate samples. However, each sample has an analog magnitude level. Thus, the present invention can be implemented in digital form or in analog form.

The filtering characteristics of the tap filter depend on factors such as the number of taps, the time delay between taps, and the specific level and polarity of each weighting factor associated with each tap individually. For example, it is assumed that m-tap digital convolution filter 102 is a one-dimensional five-tap filter. 2 shows an example of a specific level of magnitude of weighting factors with all the same polarity associated with each of the five individual taps.

It also represents the time delay between each pair of adjacent taps.

Specifically, as shown in FIG. 2, the effective time delay between each pair of adjacent tabs is determined by each conversion means of the second or first embodiment shown in FIGS. 1A, 1B, and 1C. 100 _-1 to 100 _-N ), which is 1 / CL _{K, which} is a sampling period defined by the sampling frequency clock CL _K applied to the m-tap convolution filter 102 separately.

Therefore, the absolute value of the time delay CL _K of the m-tap convolution filter 102 of each conversion means 100-2 to 100-N is larger than that of the conversion means immediately before the set.

In FIG. 2, the weighting factors associated with the five taps all have levels of polarity and specific size symmetrically distributed with respect to the third tap. Specifically, in the example shown in FIG. 2, the weighting factors associated with the third tap have a specific value of six, and each weighting factor associated with the second and fourth taps has the same specific value of four, and The weighting factors associated with the fifth taps have the same specific value of the lowest one. Define the shape that is, the kernel function of the filter characteristics in the frequency region of m tap digital filter design volumetric cone 102 of the envelope 202, each conversion means (100 _-1 ~ 100 _-N) of the set of weighting factors 200 do. In particular, all the weighting factors 200 have (i) the same polarity, (b) are symmetrically positioned about the center third sample, and (c) the sample level is such that the sample becomes smaller and smaller from the center sample. do. The m-tap convolution filter 102 exhibits a low pass filter characteristic at each conversion means _100-1 to 100 _-N of the set. On the other hand in FIG. 2, all the weighting factors have the same polarity, which is not necessary in the low pass filter. Some weighting factors may have opposite polarity as long as the exponent sum of the weighting factors is not zero. For example, kernel function waveforms such as those of envelope 202 in FIG. 2 are the same for all m-tap digital convolution filters 102 of each conversion means of the set, so that the relative lowpass frequency characteristics, i.e. filter characteristics in the frequency domain, Although this is not required, the same is true for all m-tap convolution filters 102. However, the absolute value of the low pass nominal cutoff frequency of the filter for each conversion means has a magnitude according to the sampling frequency period 1 / CL _K for that filter. By appropriately selecting the levels of the weighting factors 200, the low pass nominal cutoff frequency is approximately the highest possible frequency f ₀ of the G _K-1 signal input of the m-tap convolution filter 102 or approximately 1 / of the maximum frequency. A frequency of two can be obtained. In this case, decimator 104 reduces the one-dimensional sample density of the CL _K signal to CL _{k / 2} in each dimension by removing all other samples in that dimension.

However, the G _K signal defined by the sample envelope 202 is essentially the same at the pressure and output of the decimator 104 even though there is some loss of phase information due to the lower sample density at the output from the decimator 104. Done.

Referring to FIG. 3, there is shown a system block diagram for a signal synthesizer, a spectrum change circuit, and a spectrum analyzer that act on an electrical signal representing one-dimensional information, such as any type of time change information signal.

3 shows an initial electrical signal to be spectrum analyzed which is applied in analog form to the analog / digital converter 305 for digitalization. Sampled digital response from ADC 305 is denoted by G ₀ . High-frequency response is high for the G ₀ - pass spectrum L ₀ is, to form a Lou-pass filter response of G ₁ to G ₀ is extracted from the 0th-order analysis stage (310). The high-frequency portion of G _1, a band-pass spectral L ₁ are extracted from the first analysis stage (315), forms a low-pass response of G ₂ to G _1. A high frequency part of the band-pass spectral band pass spectrum of the following L ₁ L ₂ G ₂ is extracted from the secondary analysis stage 320, and forms a low pass filter response of G ₃ to G _2. The high-frequency portion of G _3, L ₁ and L ₂ band-pass spectral band pass spectrum of the following L ₃ is extracted from the third analysis stage (325), forms a low pass filter response of G ₄ to G _3. A high frequency part of the band-pass band-pass spectrum of the spectrum below ₄ L ₄ L ₃ of G is extracted from the fourth round of analysis stage 330, and forms a low pass filter response of G ₅ to G _4.

A high frequency part of the band pass spectrum of the following other band pass spectrum of the G ₅ are extracted from the fifth round of analysis stage 335 to form a G ₆ and the remaining low-pass filter response to G _5. In fact, response G ₆ is six low-pass filtered responses to initial signal G ₀ .

Analysis stages 310, 315, 320, 325, 330 and 335 successively include initial low pass filter stages 311, 316, 321, 326, 331 and 336, each having a narrower narrow band passband. The lowpass responses of these filters 311, 316, 321, 326, 331, 336 are narrower than their input signals enough to be resampled at a reduced rate before proceeding to another analysis stage. Reduction of samples is made by selection based on specific background by decimation circuits 312,317,322,327,332,337 following filters 311,316,321,326,336. In spectral analysis with particularly useful octaabs, other samples are removed by decimation processing.

The high frequency portion of the input signal applied to each analysis stage is extracted by removing the low frequency portions of the input signal from the input signal.

The decimated low frequency portion of the input signal is in the sampling matrix with a lower resolution than the input signal and has the problems of undesirable delay in the input signal. The first of these problems is solved in the extension circuits 313, 318, 323, 328, 333, and 338 by inserting zeros into the missing sample points of the low pass filter response sample matrix to remove by way of low pass filtering the spurious harmonic spectra introduced. The second problem is solved by delaying the input signals of the analysis stages before subtracting the extended low-pass filter responses provided by the expansion circuits 313, 318, 323, 328, 333, 338 from them.

Delay and subtraction processes are performed in the delay and subtraction circuits 314, 319, 324, 329, 334, and 339 in the analysis stages 310, 315, 320, 325, 330, 335.

As described, the components can be advantageously divided into delay and subtraction circuits and initial low pass filters in each analyzer.

Since the spectral analysis just described is inherently pipelined, it becomes longer and longer time skew for L ₀ samples, L ₁ samples, L ₂ samples, L ₃ samples, L ₄ samples, and L ₅ samples.

The term "time skew" used is related to information, such as the corresponding samples of the analyzed output signals L ₀ , L ₁ , L ₃ , L ₄ , L ₅ and G ₆ of the spectrum analyzer shown in FIG. 3. To a known amount of parallax delays occurring between corresponding samples of parallel signals.

Signal synthesis from the described spectral processing requires an inverse time skew of each set of samples. This may be provided by delay lines 340, 341, 342, 343 and 344 for L ₀ , L ₁ , L ₂ , L ₃ and L ₄ samples, respectively, before being changed in change circuits 345, 346, 347, 348 and 349 as shown in FIG. 3. Can be. This delay line typically includes a shift register or other form of memory that performs the equivalent function, namely read and write memory.

In contrast, the spectrum is delayed after being changed. Or it can be separated before and after the change in several ways such that the spectral changes are made in parallel in time. It is contemplated that the delay differences within the alternating circuits 345,346,347,348 and 349 may be used as parts of other delay requirements overall in some situations.

The L ₅ and G ₆ spectra are altered in change circuits 350 and 351.

In some signal processing apparatuses, some of the change circuits 345 to 351 may be directly connected and may not be required. Therefore, the spectral analysis process described so far can be extended by using additional analysis stages and reduced by using fewer analysis stages.

The remaining low pass spectrum G ↖ at the end of the spectral analysis stage does not become G ₆ if the above case is applied.

In synthesizing the signal by recombining the modifiable spectral analysis components, the spectral samples of the sampling matrix are summed through adders 353, 355, 357, 359, 361, 363 at each analysis stage. In addition this corrects the time skew in delay lines 340-344. It is not generated because it uses the same stretching circuits 352, 354, 356, 358, 360 and 362 which are essentially the same as the decimation stretching circuits 338, 333, 328, 323, 318 and 313. In fact, multiplexing allows a single circuit to perform dual tasks.

The remaining lowpass spectrum G 'is skewed prior to the time of the adjacent bandpass spectrum L'-1 such that its extension is equal to the sample time of L (#-1). In Figure 3, is the changed G↖ i.e. G ₆ is, be added to the expansion circuit 352, an adder 353, a L↖-1 (G ₅ 'in FIG. 3) is changed in the height of new synthetic G↖- Get 1 '(new G ₅ ').

The adder 353 output is added to the delayed and modified L ₄ in the decompression circuit 354 to synthesize a new G ₄ ′.

The adder 355 output is extended in the decompression circuit 354 to synthesize a new G ₃ ′ and added to the delayed and changed L ₃ in the adder 357.

The adder 357 output is stretched in the decompression circuit 358 to synthesize a new G ₂ ′, and the adder 359 output is extended in the decompression circuit 60 to synthesize a new G ₁ ′, delayed and modified in the adder 361. It is added to L ₂ .

The adder 359 output is stretched in the decompression circuit 60 to synthesize a new G ₁ ′ and added to the delayed and changed L ₁ in the adder 361.

Finally, adder 361 output is stretched in extension circuit 362 and added in adder 363 to synthesize a new G ₀ ′. The new G ₀ ', G ₁ ', G ₂ ', G ₃ ', G ₄ ', G ₅ ' and G ₆ 'are marked with prime signs in the single synthesizer of FIG. The new G ₀ 'can be converted into analog form by a digital to analog converter (not shown), depending on the usage.

Stretching in the stretching circuits 352, 354, 356, 358, 360, 362 serves to remove the band at each synthesis processing stage. If the bandpass spectra are less than one octave wide, the spurious and "alias" frequencies provide suppression of any harmonics generated by alternating circuits 345-351 that may otherwise inhibit signal synthesis when introduced. do.

4 more clearly shows the configuration of the spectral analysis stage for the one-dimensional information used in the spectral analysis stage 310,315,320,325,330 or 335 by octave. This stage is the K-order spectral analysis, where K is zero or a positive integer. In the case of a zero-order spectral analysis stage, the clock frequency of this stage has a ratio R for sampling the initial input signal G ₀ , which is the spectrum to be analyzed.

If K is a positive integer, the clock frequency is reduced by R _{/ 2} K. The input signal G _K of the spectrum analysis stage of FIG. 4 is clocked at the R _{/ 2} k clock frequency and applied as an input to the shift register 470 having the M stage. The progressively longer (M + 1) samples are provided by the shift register 470 inputs and outputs from each output function as multiple tap delay lines of the low pass delay line filter.

The samples are weighted and summed in weight and summing circuit 471 to provide samples of linear phase low pass filter response G (K + 1). For all analysis stages except for stage 1, where K is greater than zero, the anticlockwise ratio compared to the clock ratio of the previous stage is used for the initial shift register, and the subtractor 475 in the weight and summation circuit 471. subtracts the G _{(K + 1)} in accordance with G _K.

The response G (K + 1) is _{one of} the multiplexers 472 that provide an alternative selection between the 0 input signal and the G _{K + 1} input signal at an R _{/ 2} K change rate to generate the signal G (K + 1) ^* . It is applied as an input signal.

Signal G (K + 1) ^* has a baseband (baseband) frequency spectrum of twice the G (K + 1) spectrum mixed with the first bilateral band suppressed carrier harmonic spectrum of peak amplitude G (K + 1). . It can be seen that the continuous spectral analyzer requires G (K + 1) ^* with an appropriate time delay rather than G (K + 1) '.

The G (K + 1) ^* signal is clocked at an R _/ 2K ratio and applied as an input signal to another shift register 473 having multiple stages that may be different or equal to M. The (M + 1) samples provided by the shift register 473 input signal and the output signals from the respective stages are supplied to another weight and summing circuit 474, such as circuit 471.

Circuit 474 provides an elongated variation of G (K + 1) ^* of the first harmonic to suppress the spectrum G (K + 1) to the sample matrix and the matrix of the same number of samples G _K.

Height variations of the G _(K1) from the subtracter 475 is subtracted after the G _K delayed in the shift register 470 and the delay circuit 476 from G _K. The M cycle delay of G _K in the shift register 470 compensates for the M / 2 cycle delay of the center sample with the weight and summation circuit 471 for the G _K input to the FIG. 4 spectrum analysis stage. Circuit 474 compensates for a similar M / 2 cycle delay between the center sample and G (K + 1) ^* . Delay circuit 476 introduces an additional execution delay to compensate for delay in weight and summation circuits 471 and 474, and delay circuit 476 simply provides the next stage needed to expand shift register 470. do. The output signal L _K from the subtraction circuit 475 has a lower frequency limit set by the low pass filtering performed in the K-th spectrum analyzer shown in FIG. 4, and if so, the low pass filtering of the preceding spectrum analyzer. One spectral analysis component with an upper frequency limit set by.

5 illustrates a method for reducing the number of shift register stages used in a spectrum analyzer constructed in accordance with the present invention.

Samples that define G (K + 1) ^* that are weighted and summed to perform lowpass filtering related to interpolation from G (K + 1) 'are used without using shift register 473 in the continuous spectrum analysis stage. From the tapped delay line configuration used to provide initial low pass filtering of +1).

5 shows how this is done, for example, between the 0th order analysis stage used to generate L ₀ and the next analysis stage.

Components 50-0,571-0,575-0, and 576-0 are components in the 0th spectral analysis stage that correspond to the K-order spectrum analysis components 470,471,475, and 476 of FIG. Components 570-1 and 570-1 of the primary spectrum analyzer are similar to components 50-0 and 571-0 of the 0th spectrum analyzer except that they are clocked at a half rate. Four samples extracted from the input of the shift register 570-1 and the first three outputs are supplied in parallel at an R / 2 clock ratio.

They are weighted in two phase matches by seven filter weight patterns ABCDCBA to generate in subtractor 575-0 a pair of consecutive samples that are filled with _zeros to be subtracted from the delayed G ₀ to the R clock ratio.

The initial sample of each pair of consecutive samples subtracted from the delayed G ₀ is the pressure of the shift register 570-1 and its first three outputs from the weighting circuits 580, 581, 582, 583 to the filter weightings A, C, C and A. Multiplexed to sum the weighted samples in the summation circuit 587.

The intervening zeros are weighted B, D, and B for this positioning of G ₁ . The final sample of each pair of consecutive samples to be subtracted from the delayed G ₀ multi-flags the input of the shift register 570-1 and its first two inputs from the weighting circuits 584, 585, 586 to the filter weights B, D and B. Is obtained by summing these weighted samples in a summation circuit 588. The intervening zeros are weighted to A, C, C, A for this position of G in the filter weight pattern. Multiplexer 589, operated at an R clock ratio, selects a sample at the output of summation circuits 587, 588 to provide subtractor 575-0 with a flow of the sample subtracted from G ₀ .

FIG. 6 shows one stage of the FIG. 3 signal synthesizer in more detail. Samples of G (delayed and modified G↖) are filled with zeros in the multiplexer 692, and this synthesized extension signal is input to the shift register 693 clocked at the M (or integer greater than 2) stage and extended sample rate. Is added as. The inputs of the shift register 693 and the outputs from the short are supplied to the weight and summing circuit 694. Thus, the re-sampled, harmonic-rejected G _K '(or G') spectra at a doubling rate are thus modified with delayed L ₍ time delayed to match the resampled and filtered G _K '(or G') samples added together. _K-1) 'is supplied from the weight and summing circuit 694 to the adder 695 in combination.

Multiplexer 692, shift register 693, and weight and summation circuit 694 can be used in combination to act as components 472, 473 and 474 in the spectrum analysis process.

In this situation, it is desirable to consider the characteristics of the lowpass filtering used in the decompression method of spectral analysis and signal synthesis and the lowpass filtering of spectral analysis. Lowpass filtering is linear phase so that the pattern of filter weights is symmetrical about the center sample. The filter weights are divided into the high pass spectrum L ₀ and the band pass spectrum L ₁ , L ₂ , L ₃ . In order to suppress as many low frequencies as possible in a single sum. If spectral analysis is performed with an octave that is reduced to 2 in recordings removed by lowpass filtering in each spectral analyzer, removing frequencies below 2/3 of the octave center frequency during lowpass filtering good. Phase frequency response in the filter (so-called "brick-wall" responses) should cause OY member shot in the filtered signal, the L generated By subtracting the G _{(k + 1)} extending from the G _{k (k + 1)} Function And increase the dynamic range of both G _{(K + 1)} functions extracted by the spectral analyzer.

This is an example of Gibbs that can be alleviated through the use of gentle cleavage of the Fourier series. Many cutting windows with reduced Gibbs filter response are known by Bartlett, Hanning, Hamming, Blackman and Kaiser.

Details of this are published in 1975 by Avery Oppenheim and R. Double U. Sapper, "Digital Signals," published by Prentice Hall Inc., Inglewood Clips, New Jersey, United States. Reference is made to color line 5.5 of the book "Processing", which is described on pages 239-251 under the heading "Design of FIR Filters Using Windows."

In real low pass filtering, the number of samples is usually limited to a small number. The filter response to a filter using odd samples consists of a direct current component and a series of cosine harmonics, and the filter response to a filter using superior samples consists of a direct current component and a series of sine harmonics. The preferred response curve is adapted using a computer that performs trial and error selection of the weighting coefficients.

According to the invention it is possible to develop the same spectrum Q of non-octave width. This approach is limited to use, but filtering the frequencies below half of the center frequency of the bandpass spectral in developing the lowpass response and reducing the lowpass response in selecting the third sample, for example 1 Develop a set of bandpass spectra that are sequentially narrower in bandwidth than 1/3 rather than 1/2.

The sample change circuits 345-351 of FIG. 3 may take various forms, some of which may be replaced by direct supply systems.

For example, in order to eliminate low-level background noise in various spectra, each change circuit 345-351 must include a baseline clipper 700 shown in FIG. This baseline clipper 700 simply cuts off less important signal wobbles.

8 shows a circuit that can be used for each of the alternating circuits 345-351 to be provided to the spectrum analyzer. The rotary switch 897 is wired to provide a binary code for multiple angular shaft displacements.

This code comes as an output spectral sample to be fed through a latch circuit 898 to a quadrant multiplier that multiplies the input spectral sample and synthesized to generate G ₀ '.

Latch circuit 898 maintains the code input to multiplier 899 while setting of rotary switch 897 changes. Using digital filters using the same sample rate or half sample rate used to develop the octave spectrum, each octave spectrum is finely arranged and then the subdivided spectral gain is adjusted individually.

For example, subdividing the octave into 12 degrees adjusts the half-tone and individual tone adjustments of the signal encoding music.

The alternating circuits may be lead only memories (ROMs) for storing nonlinear transfer functions. For example, the ROM 990, which stores the log response with the input signal in Fig. 9, can be used for each of the sample changing circuits 345-351 of the transmitting device, and in Fig. 10 the exponential response of the input signal is stored. ROM 1091 can be used for each corresponding sample change circuit of the receiving device, providing pre-emphasis of the pre-transmission signal and de-emphasis de-emphasis.

In other words, the pre-emphasis and de-emphasis characteristics can be alternately stored in the ROM change circuits of the transmitter and receiver spectrum-analyzer-signal synthesizers.

FIG. 11 shows a variant of the FIG. 3 spectrum analysis and signal synthesis system divided to supply spectral samples without time skew during delay processing in the analysis and synthesis process. For example, such an arrangement is desirable in a companding system used to separate signals into spectra prior to companding during spectral analysis, so the companded spectra can be filtered to suppress distortion generated during rapid signal compression or stretching. The magnitude of the initial signal supplied to the ADC 305 of FIG. 3 is supplied to each of the comparators 1110 to 1116 so as to provide a fast attack slow attenuation of the signals they have been compressed. Detects inductively in circuit 1130.

The compensators 1111 to 1116 consist essentially of two quadrature digital multipliers, and the control signal CC detects the signal to be compressed and follows the conventional analog circuit to develop an analog companding control signal according to the detection. Developed from the analog-to-digital converter to be connected.

The compensators 1110-1116 are L ₀ , L ₁ , L ₂ , L ₃ , L ₄ , L ₅ and G ₆ after the time difference is delayed by the delay lines 1110-1106 allowing them to connect their respective samples in time. It works according to the spectrum.

Therefore, the delay lines 1120 to 1125 are L ₀ ', L ₁ ' L ₂ ', L ₃ ', L ₄ ', L ₅ ', which are compressed during the signal synthesis process using the extension circuits 352-363 of FIG. Skew G ₆ 'signals.

The delay cycles in delay lines 1160 and 1125 are M _{/ 2} cycles of R _{/ 2} K clock ratios with K equal to 5 or 16M cycles with a basic clock ratio R, with the delay being the weight of the final spectrum analyzer 355. And a sample for the summation circuit is generated upon translation.

The delay cycle 16M is delayed the time it takes to accommodate the additional time in increased delay time by a D ₁ takes to accommodate the additional time in the expansion circuit (338 and 352), a delay and the subtraction circuit 334 and the adder (353) D ₂ Is increased by. It is assumed that all further processing will be performed at the base clock ratio R, and D ₁ and D ₂ are represented by the number of their clock cycles.

The delay in delay line 1104 is more than 16 M + D ₁ + D ₂ cycles of clock ratio R by the difference between the time taken to develop L ₅ at G ₃ and the time taken to deploy L ₄ at G ₅ . long.

The time it takes to develop from G ₅ to L ₅ is 2D ₁ plus samples for the sum of two sets of samples plus M cycles of R _{/ 2} 5 clock ratios or 32 M cycles of the base clock ratio for collecting two samples for weighting and summation. D ₂ for subtraction. The time it takes to develop from G ₅ to L ₄ depends on the M _1/2 cycles of the R _{/ 2} 4 clock rate or the 8 M cycles plus sample sum of the base clock rate plus the D ₁ plus sample subtraction for collecting the samples for weighting and summation. D ₂ .

Aligning L ₄ samples with L ₅ samples in time takes 24M + D ₁ cycle of delay in addition to the base clock ratio. Therefore, the total delay over delay line 1104 is 40 M + 2 D ₁ + D ₂ of the basic clock ratio R. In a similar calculation, the cycles of the fundamental clock ratio R at which samples are delayed in delay lines 1103, 1102, 1101 and 1100 are 52M + 3D ₁ + D ₂ , 58M + 4D ₁ + D ₂ , 61M + 5D ₁ + D, respectively. ₂ , and (621/12) M + 6D ₁ + D ₂ .

The delay required in delay line 1124 beyond that provided by delay line 1125 is the time taken to stretch the decompression circuit 354 and the D ₂ delay further delayed in the adder 355. The former delay is D ₁ associated with the sum of the R / 24 clock ratio cycle taken to collect the samples for the weighting and summation, the 8M cycle of the basic clock ratio R plus the weighting and shorting process. Thus, the total delay in delay line 1124 is 24M + D ₁ + D ₂ . Similar calculations show that the total delay in delay lines (1123,1122,1121,1120) by the base clock ratio R are 28M + 3D ₁ + 3D ₂ , 30M + 4D ₁ + 4D ₂ , 31M + 5D _{1 + 5} and (31 1/2) M + 6D ₁ + 6D ₂ .

Similarly, the total delay of delay lines 340-344 of FIG. 3 can be measured assuming that the change circuits 345-351 all have the same delay. Delay circuits 340-345 are based on 77M + 12D ₁ + 7D ₂ , 76M + 10D ₁ + 6D ₂ , 72M + 8D ₁ + 5D ₂ , 64M + 6D ₁ + 4D ₂ and 48MM + 4D ₁ + 3D ₂ , respectively. The cycle delay of clock ratio R is performed. Digital filtering used in spectrum analyzers is a type of hierarchical filtering generally associated with low pass or band pass filtering, and many samples consist of a relatively small number of samples weighted and summed at any time.

Although applied using the signal spectrum representing the one-dimensional information of the present invention, Burt Pyramid was developed to primarily analyze the spatial frequencies of the two-dimensional image information. The present invention enables real-time spectrum analysis of spatial frequencies that can change video information generated in continuous video frames of television displays.

As is well known in the television art, continuous video frames (in NTSC format) occur continuously at a frame rate of 30 frames per second. Each frame consists of rasters of 252 interlaced horizontal scan lines. The continuous horizontal scan lines of the frame are transmitted continuously during the first feed period. The continuous even scan lines of the frame are transmitted continuously during the first feed period and the second feed period. This comes after the first feed period of the next consecutive frame. The duration of each period is 1/60 second. However, the memory device must provide at least the number of pixels in the feed time so that it can define the entire spatial frequency spectrum of the image at the delayed execution time.

The technique known as progressive scanning is well known in the television art, in which a series of full 252 line frames at a rate of 60 frames per second is derived from an NTSC video signal. This technique involves delaying each successive NTSC feed for a 1/60 second feed period. Thus, successive scan lines of odd-occuring odd-occurring interleaves are inserted between successive scan-lines of the right-most superior delayed by one cycle period to provide image pixels of the previous frame during the odd-numbered of each successive frame. In a similar manner, successive scan lines of successive even-numbered feeds are consecutively occurring scan lines of the immediately preceding odd-numbered delay delayed by one shield period to provide pixels of the previous frame during the even-numbered feed-period of each successive frame. Is inserted in between.

The progressive scanning technique described above is particularly useful for inducing high resolution video displays, which are well known as high definition television (HDTV), which are currently prevalent in the television art. The present invention is also useful for HDTVs that provide improved visual display.

Figure 12 shows a spectrum analyzer employing the theory of the present invention that operates on signals representing two-dimensional information, such as spatial frequency image information contained in progressively scanned television video frames. However, this two-dimensional information can be obtained from a pre-interlaced television camera or a non-interlaced television camera performed by a suitable buffer memory. The monochrome processing of the luminance signal is described in FIG. 12 for the sake of simplicity and the technique to be described is individually applied to the primary color of the signal or color television signals developed from the luminance signal by an algebraic matrix. The initial video signal is supplied in raster-scanned format to the analog-to-digital converter for sampling if not already sampled, for resampling if already sampled, and for final digitalization.

As a signal, the digitized video samples are nominal G ₀ and include the harmonic spectrum involved in the sampling process and the complete two-dimensional spatial frequency spectrum of the initial signal. These harmonic spectra are symmetric about each one of its harmonics and sampling rate. These harmonic spectra will be described in detail in the following description. Harmonic spectra are considered in the design of two-dimensional low pass spatial frequency filters used in the FIG. 12 spectrum analyzer. These harmonic spectra are responsible for raising the aliasing frequency during signal synthesis and spectral analysis from spectral analysis.

In the zero order spectral analysis stage 1210, the high pass spectrum L ₀ is separated at G ₀ . High-pad operation is performed for G ₀ By low-pass filtering is about the same as the degree to which the low-frequency portion of the G ₀ is delayed from the low pass filtering response delay the timing G ₀ from coming out of the ADC (1205) and a delayed row from G ₀ Subtract the pass filtering response.

Assuming that spectral analysis is performed by octave, the cutoff frequency in two-dimensional low pass spatial frequency filter 1211 is the highest frequency of the next octave-bandwidth bandpass spectrum L ₁ , ie its center frequency, 3/4. Should be chosen to be In data meter 1212, the other rows and columns of samples are removed to sample the low pass filtered G ₀ at the R / 2 spatial frequency ratio, where the reduced sample rate signal is removed from the spectral analysis stage 1210. It is supplied as a low pass output response. Low pass filtered G ₀ with reduced sample rate is described in PP 692-702 of Vo 1 61, No6, PROCEEDINGS DF THE IEEE, June 1973 under the subject "A Digital Siganl Prpocessing Approach to Interpolation." egg. Follow the interpolation method following the method outlined by the laviner. In the decompression circuit 1213, the samples removed at the dataator 1212 are replaced with zeros to provide an input signal to another two-dimensional low pass spatial frequency filter 1214.

This filter may use the same sample weighting coefficients as the initial low pass filter, but in any case have the same cutoff frequency as the initial low pass filter. The synthesized signal has the same sampling matrix as that of G ₀ as delayed in delay circuit 1215 and is subtracted from the delayed G ₀ in subtractor 1216 to yield a high pass output response L ₀ . L ₀ is not only the high pass portion of G ₀ , but also includes a low frequency phase error correction period, which compensates for the error introduced by resampling G ₀ at low sampling rate in decimator 1212. It is used during the synthesis of video signals from spectral analysis.

The signal separation of the low pass portion to the high pass portion resampled at a half rate is repeated at each spectrum analysis stage. Each continuous spectrum analyzer receives the resampled low pass output response of the previous spectrum analyzer as its input signal, and the sampling rate is halved at each continuous spectrum analyzer from the ratio of the previous spectrum analyzer. Since there is an upper limit imposed by the initial throw pass response characteristic, these " high pass " output responses are effectively the same Q-ban pass spectrum of the attenuation idle frequency. The decimation of the response of the initial low pass filters at each stage, determined by two factors, and the cutoff frequencies of the low pass filters at each stage, which is 2/3 of the center frequency of the spectral analysis, are the same Q of the two-dimensional spatial frequency. This is the factor that attenuates the spectrum.

The reduced low pass output response G ₁ of the spectrum analyzer stage 1210 is supplied from the decimator 1212 as an input signal of the excitation spectrum analyzer stage 1220. The spectral analysis stage 1220 has components 1221, 1222, 1223, 1224, 1225, and 1226 similar to the components 1211, 1212, 1213, 1214, 1215, and 1216 of the spectrum analysis stage 1210. The difference in operation is due to the sampling frequencies at stage 1220 being halved in both dimensions with respect to stage 1210. The low pass filters 1221 and 1224 have similar weighting coefficients as the low pass filters 1211 and 1214, respectively, but the filter 1211 and 1214 of half the sampling rate at the stage 1220 when compared to the stage 1210. Compared to these, the cutoff frequencies of the filters 1221 and 1224 are halved by half. The delay before subtraction in the delay circuit 1225 is twice the delay circuit 1215. This delay is regarded as clock delayed in a shift register or the like. The delay configuration ratio is equal to the 2: 1 ratio where the delay ratio is provided as a 1: 2 ratio of each delay clock ratio in the delay circuits 1225 and 1215. The high pass output response L ₁ of the spectrum analysis stage 1220 is a band pass spectrum of a spatial frequency immediately below the spectrum L ₀ .

The low pass output response G ₂ reduced in the spectrum analyzer stage 1220 is supplied from the decimator 1222 as an input signal of the next zero spectrum analyzer stage 1230. The band pass spectrum L ₂ below one octave of L ₁ is the high pass output response of the spectrum analysis stage 1230 to its input signal G ₂ . The spectral analysis stage 1230 corresponds to the components 1221, 1222, 1223, 1224, 1225, and 1226 of the spectral analysis stage 1220, respectively, except for the half-sampled sampling rate. , 1234,1235, and 1236).

The low pass output response G ₃ decimated by the spectrum analyzer 1230 is supplied from the decimator 1232 as an input signal of the next spectrum analyzer 1240. The band pass spectrum L _{3, which} is one octave below L ₂ , is the high pass output response of spectrum analyzer 1240 to its input signal G ₃ . The spectrum analyzer stage 1240 corresponds to the components 1241, 1242, 1243, and 1245 corresponding to the components 1231, 1232, 1233, 1234, 1235, and 1236 of the spectrum analyzer stage 1230 except for the half-sampled sampling rate. And 1246).

The decimated low pass output response G ₄ of the spectrum analyzer stage 1240 is supplied from the decimator 1242 as an input signal of the next spectrum analyzer stage 1250. The band pass spectrum L _{4, which} is one octave below L ₃ , is the high pass output response of the spectrum analyzer 1250 for its input signal G ₄ . The spectral analyzer 1250 corresponds to the elements 1241, 1242, 1243, 1244, 1245, and 1246 of the spectral analyzer 1240, except for the half-sampled sampling rate. 1254, 1255, and 1256).

The low pass output response G ₅ decimated by the spectral analyzer 1250 is supplied from the decimator 1252 as an input signal of the next spectral analyzer 1260. The band pass spectrum run L _{5, which} is one octave below L ₄ , is the high pass output response of the spectrum analyzer 1260 with respect to its input signal G ₅ .

The spectral analysis stage 1260 excludes the half-sampled sampling rate, and the spectral analysis stage 1126 corresponds to the components 1251, 1252, 1253, 1254, 1255, and 1256 of the 1250, respectively. 1263, 1264, 1265, and 1266).

G↖, where G ₆ , supplied from the decimator 1262 of the final spectrum analyzer 1260 is the remaining low pass spectral response.

It then serves as the fundamental signal for the resynthesis of the signals by summing the interpolated band pass spectral response of the spectrum analyzers and the capston high pass spectral response of the initial spectrum analyzer. L ₀ , L ₂ , L ₃ , L ₄ and L ₅ generate time skews with increasing delay. The remaining low pass spectrum G ↖ (where G ₆ ) is ahead of the final band pass spectrum L ↖ ₋₁ (where L ₅ ) for the time skew in the opposite direction.

As described below, the iterative method of signal synthesis from spectral components requires L ₀ , L ₂ , L ₃ , L ₄ and L ₅ spectral components to be in time skew in opposite directions.

Before describing the spectral analysis process and the signal synthesis from the processed spectral analyzes, the configuration of the spectral analyzer is described in more detail as follows. The primary consideration is the construction of the initial two-dimensional low pass filter.

As is known in the filter design art, the two-dimensional filter configuration may or may not be separable. The separable filtering in the first and second dimensions is performed by first filtering in the first direction applying the first one-dimensional filter and then filtering in a second direction perpendicular to the first direction applying the second one-dimensional filter. Can be performed. Accordingly, the low pass filter characteristics of the two separated and cascaded one-dimensional filters constituting the separable two-dimensional low pass filter are completely independent of each other, and the kernel function and configuration of each low pass filter is shown in FIGS. Similar to that described above in connection with 11 degrees.

In the case of a television image written as a raster of horizontal scanning lines, two orthogonal directions of the detachable filter are preferably horizontal and vertical directions. When separable two-dimensional low pass filtering is applied to the practice of the present invention, there are some advantages gained by performing horizontal low pass filtering before vertical low pass filtering, while others obtained by performing vertical low pass filtering before horizontal low pass filtering. There may be advantages. For example, if horizontal filtering and decimation are performed first, the number of pixel samples for the horizontal scan line acted by the vertical Kennel function during the next vertical filtering is reduced by half. However, when performing vertical filtering first, each stage 1210, 1220, 1230, 1240, 1250 of the spectrum analyzer using the same delay configuration required to provide a relatively long delay required for vertical filtering and shown in FIG. And each compensation delay circuit 1215, 1225, 1245, 1255, 1265 to advance the signals G ₀ to G ₅ to the positive terminals of the subtractors 1216, 1226, 1236, 1246, 1256 of 1260. It is possible.

The overall filter response of the separable two-dimensional idle frequency filters may be square or square in cross section parallel to the spatial frequency plane. However, the filter response of non-detachable filters may have different cross sections. Circular and elliptical cross sections are of particular interest in filtering raster scanned television signals. This is because such cross-sectional response filters can be used to reduce excessive diagonal resolution in television signals. Uniformity of image resolution in all directions is important in television systems where the image is rotated between the camera and the display device.

Upper symmetry and linear phase response, and in particular the 2-D low pass filters 1214, 1224, 1234, 1244, 1254 and 1264 and the 2-D low pass filters 1211, 1221, 1231, 1241, 1251 and A matrix of filter weights with a pattern exhibiting filter characteristics suitable for use in 1261 is shown below.

A B C B A

D E F E D

G H J H G

D E F E D

A B C B A

A Kennel function matrix having weighting factors of the same pattern as the top acts on each successive image sample in turn, and each pixel sample corresponds to the position of the weighting factor J located at the center of the matrix when acted upon. In the low pass filter, the weighting factor J has a relatively largest magnitude level, and each of the other weighting factors has a smaller magnitude level farther from the center position. Therefore, the corner weighting factors A are each of the smallest magnitude level.

In the inseparable two-dimensional filter, certain selection values of the magnitude levels of A, B, C, D, E, F, G, H and J are independent of each other. However, in the separable two-dimensional filter, the level magnitudes of the weighting factors are generated by multiplying the respective horizontal and vertical one-dimensional Kennel weighting factors, so that each of A, B, C, D, E, F, G, H and J Are not completely independent of each other.

An apparatus for summating electrical signals from component spectra taking the general form shown in FIG. 13 is important to the present invention. The spectral components G ₆ ′, L ₅ ′, L ₄ ′, L ₃ ′, L ₂ ′, L ₁ ′, and L ₀ ′ correspond to the primeless code supplied from the spectrum analyzer of FIG. 12. The spectral components L ₀ , L ₁ L ₂ , L ₃ , L ₄ , G ₆ and L ₅ are gradually provided after a time delay by the spectrum analyzer of FIG. 12, and then gradually added to G ₀ ', for the signal synthesizer of FIG. There must be a differential delay to provide L ₅ ′, L ₄ ′, L ₃ ′, L ₂ ′, L ₁ ′ and L ₀ ′.

FIG. 13 shows a signal synthesizer having a plurality of consecutive signal synthesis stages 1360, 1365, 1370, 1375, 1380, and 1385. Each stage extends and adds to the spectral component a sample matrix of the spectral component such that the interpolation extends the sample matrix of the spectral component higher than the next spatial frequency. Extension of the sample matrix is achieved by inserting sample points into a matrix with zeros and low pass filtering the result to remove harmonic components. Low pass filtering has the same filter characteristics as the low pass filtering associated with the corresponding interpolation process in the spectrum analyzer of FIG.

In the signal synthesizer low pass filter associated with the interpolation is inserted between to inhibit the harmonics associated with G↖. _K or L signal byeonggyeong by non-linear processing, G↖ _K or L signal is the 12 ° spectrum analyzer and the 13-degree combiner In the alternating circuit as described above in connection with FIG. This nonlinear process results in an aliased increase in the synthesized composite image without the low pass filtering associated with the interpolation process used in the signal synthesizer.

In the signal synthesizer of FIG. 13, a sample of the low pass spectrum G ₆ ′ is inserted into the extension circuit 1361 with zeros and passed through a two-dimensional lowpass spatial frequency filter 1362 similar to the spectrum analyzer of FIG. Sample response of the low-pass frequency filter cantilever 1362 is added to the sample of the 'L ₅ in the adder (1363) to generate a' similar or identical to G ₅ and the time-delayed replica of the signal G _5. The G ₅ ′ sample is then inserted into the extension circuit 1366 with zeros. This signal is "L ₄ in the adder (1368) to generate a signal" time similar to or the same G and the delayed replica signal _4, G ₄ through the low-pass filter (1367) is similar to the first 12-degree low-pass filter (1254) Is added. Samples of G ₄ ′ are inserted into the extension circuit 1371 with O's and low pass filtered to a filter 1372 similar to filter 1244 of FIG. 12. Filter 1372 response is added in the adder (1373) to generate a similar or the same ₃ G 'signal and the delayed replica of the signal G _3. Samples of G ₃ ′ are inserted into the extension circuit 1374 with zeros and are low pass filtered with a filter 1377 similar to the two dimensional low pass filter 1234 of FIG. 12. The two-dimensional low pass filter 1377 response is added to L ₂ ′ in the adder 1378 to generate G ₂ ′, which is the same or similar to the delayed duplicate signal of the G ₂ signal. G ₂ ′ samples are inserted into the extension circuit 1381 with zeros and pass through the two-dimensional low pass filter 1382.

Two-dimensional low-pass filter (1382), the response is added to the "L ₁ in the adder (1383) to generate a 'similar or identical delay signals G ₁ and G _1. A sample of G ₁ ′ is supplied to interpolate to a decompression circuit 1386 and a two-dimensional low pass filter 1387 similar to the filter of FIG. The filter 1387 response is added with L ₀ ′ in the adder 1388 to supply a composite signal G ₀ ′ of the same image described by G ₀ with the possibility of change.

Although the two-dimensional embodiment of the present invention is particularly suitable for image processing for processing the spatial frequency spectrum of an image in real time, it should be understood that the two-dimensional information related to the present invention is not limited to the spatial frequency spectrum of the two-dimensional image. For example, one of the two-dimensional information may correspond to spatial frequency information, and the other may correspond to the temporary frequency information.

In addition, the present invention is useful for analyzing the real-time frequency spectrum of two-dimensional or more information. For example, in the case of three-dimensional information, all of the three-dimensional information corresponds to spatial information, or vice versa, two of the dimensional information relates to spatial information, and the other dimensions correspond to temporary information. In this regard, an image processing apparatus that responds to the occurrence of motion on a displayed television screen is useful. In this case, a portion of the spatial frequency spectrum of the displayed image, i.e., the stationary object and the corresponding image, remains the same from the frame-to-frame of the video information, while the spatial frequency spectrum portion of the displayed image corresponding to the moving object is Change from frame to frame.

The spectrum analyzer using the principles of the present invention can be utilized in an image processing apparatus using a three-dimensional low pass filter. The two-dimensional information of the three-dimensional information of the low-pass filters is spatial, and corresponds to the two-spatial dimension of the two-dimensional low-pass filters used in each stage of the two-dimensional spectrum analyzer of FIG. The remaining dimensions are temporary and correspond to the fine compositional characteristics of the three-dimensional spectrum as a result of moving the object to the corresponding pixel and size level values of the displayed image from frame to frame.

In this embodiment of the present invention, it is assumed that the temporal signal G ₀ is a base band with a frequency spectrum defining information with one or more dimensions. As is known, such baseband information is communicated in a frequency multiplexed fashion including sidebands of carrier frequencies modulated by the baseband information component. By using suitable modulators and demodulators for the respective converting means 100-1... 100 -N in FIG. ₁ , G ₀ and G ₁ . Any of or L ₀ ... Any of the L _N-1s may be a frequency multiplexed signal.

The term shift register is to be interpreted in the claims as including a means for performing a function equivalent to that of a read-write sequential memory.

Claims (28)

A signal processing apparatus for analyzing a frequency spectrum of a given temporal information component (G ₀ ) corresponding to information having a given dimension number into (N + 1) separate frequency bands, where n is an integer of 2 or more, and the frequency The highest frequency of the spectrum is f ₀ ), N sample signal converting means 100-1 arranged in order to analyze the frequency spectrum at a delayed real time. I having a pipeline having a set of 100-N), each of the conversion means has a first input terminal _{(G 0, G 1 ... ‥} G n) a second input terminal _{(CL 1, CL 2 ... CL} n) and a first output terminal (G _1, G ₂ ... G怪) and second output terminals _{(L 0, L 1, L} 2 ... L n-1) provided with a first conversion means of the set (100-1 Is coupled to receive the given transient signal G ₀ , and each first input terminal of the second to Nth conversion means of the set is connected to the change means immediately preceding the set. Coupled to a first output terminal, the second input terminal of each conversion means of the set coupled to receive a separate sampling frequency clock (CL ₁ , CL _2, etc.) Nominal blocking note, which is a direct function of the sampling frequency of the clock applied to its second input terminal between its first input terminal and the first output terminal for an information component Has a low-pass transfer function with a number, the nominal cut-off frequency for the first converting means second input (a) clock applied to the terminal 2f ₀ and, (b), f ₀ the smaller the low-pass transfer function of the set And having a sampling frequency provided, the clock applied to the second input terminal of each of the second to Nth conversion means of the set being (a) less than the clock frequency applied to the second input terminal of the immediately preceding conversion means of the set. (B) sampling at least equal to or twice the maximum frequency of the signal information component applied to the first input terminal, and (c) providing a nominal cutoff frequency for the low frequency transfer function less than that of the conversion means immediately preceding the set. The information component of the signal having a frequency and derived at the second output terminal of each conversion means of the set is a signal information component applied to its first input terminal and And a difference with the direct function of the signal information component derived at the first output terminal of the apparatus. The method of claim 1, wherein each dimension of the signal information component applied to the first input terminal of each of the conversion means of the set is 1/1 of the analogy in which the signal information component applied to the first input terminal of the preceding conversion means is sampled. Signal processing apparatus characterized in that the sampled to 2. 3. The method of claim 2, wherein the nominal cutoff frequency for the row modulus transfer function of the second to Nth transform means of the set is transformed immediately before each dimension of the signal information applied to the first input terminal of each transform means. Signal processing device, characterized in that 1/2 of the nominal cutoff frequency with respect to the low pass transfer function of the means. 2. The converting means of claim 1, wherein each of said set of converting means (100 _ak , 100 _bk ) is _{adapted to} provide said first and second input terminals and said low pass transfer function of said one converting means. First means (102,104) coupled to a first output terminal of said first means having a predetermined canal function at a sampling frequency corresponding to a clock sampling frequency applied to a second input terminal of said one conversion means. And an m-tap digital convolution filter (m: an integer greater than or equal to 2, 102) for convolving mutual information components applied to the first input terminal of said one conversion means: said first means and said one conversion means. Second means (109, 110) coupled to said second input and second output terminals of said one conversion means for deriving a difference signal at a second output terminal of said second means, said second means comprising a sample subtractor (110). Wow, the first number Third means comprising delay means (106,108,109) for coupling said sample subtractor (110) to said sample subtractor (110), said predetermined amount of m-tap digital convolution filter in said one conversion means. Said one from each successive sample level for the signal information component applied to the first input terminal of said one conversion means at the sampling frequency of the sample convolved to said one conversion means before being convolved to the canal function of And subtracting each consecutively generated sample level for the convolved sample of the converting means. 5. A signal processing apparatus according to claim 4, wherein the predetermined canal function is defined in the form of a lowpass transfer function for the converting means having a gradual upward transfer extending below the nominal cutoff frequency. 5. A signal processing apparatus according to claim 4, wherein at least two respective canal functions of said changing means of said set are substantially similar to each other. 5. A signal processing apparatus according to claim 4, wherein said information component is constructed in at least two dimensions and said m-tap digital convolution filter of at least one of said converting means is non-separable in at least said two dimensions. 5. The signal processing apparatus according to claim 4, wherein the information component is configured in at least two dimensions, and the m-tap digital convolution filter of at least one of the converting means is a filter that is separable in the two dimensions. 5. The apparatus of claim 4, wherein at least one of said first means (102, 104) of said converting means in said set comprises said m-tap digital convolution filter (102), and said output of said m-tap digital convolution filter; And a decimator 104 coupled in series between the first output terminal of the changing means of the m-tap digital convolution filter 102 of the first means. A specific sample density corresponding to the sampling frequency of the clock applied to the second input terminal of the converting means is derived at its output, and the data 104 of the first means is arranged in the first dimension in each dimension of the information component. And to a first output terminal of a particular one of the converted means of the convolved samples appearing at the output of the m-tap digital convolution filter of the means. 10. The method of claim 9, wherein the decimator of the first means changes every one of the other samples appearing at the output of the m-tap digital convolution filter of the first means in each dimension of the government component. And a signal processor for transmitting to said one output terminal of the means. 10. The apparatus of claim 9, wherein in one converting means (100 _ak ) of said converting means, said third means (106, 108, 109) subtracts said convolved information component from said m-tap digital convolution filter to said sample subtractor. And fourth means (106,108) coupled between the m-tap digital convolution filter and the sample subtractor for direct application to (110). 10. The apparatus of claim 9, wherein the third means (106, 108, 109) is configured to measure the reduced sample density of the convolved sample in each dimension of the information component at the first output terminal of the one converting means in the dimension subtractor. And further comprising fourth means (106,108) coupled between the decimator and the sample subtractor to extend the convolved sample back to the specific sample density, the fourth means (106, 108) A sample extender 106 for inserting additional samples having a level value of zero corresponding to each convolved sample at the output of the m-tap digital convolution filter without a sample density, wherein the insertion A n-tap digital interpolation filter 108 for effectively replacing the sample level value of the interpolated value instead of the zero level value of each additional sample that has been added. Value. 12. The apparatus of claim 11, wherein the decimator 104 of the first means recalls every other sample appearing at the output of the m-tap digital convolution filter of the first means in each dimension of the information component. Sent to the first output terminal of the conversion means of the sample extender, inserting an additional sample between each pair of consecutive convolved samples of the reduced sample density for each dimension of the information component, The tap digital interpolation filter comprises a n-tap digital interpolation filter (n is an integer of 2 or more) having a low pass transfer function. 13. The delay circuit 109 of claim 11 or 12, wherein the signal information component at the first input terminal of the one converting means is applied to the sample subtractor through a delay circuit 109. And inserting a time delay substantially equal to the total delay time inserted by said m-tap digital convolution filter, said decimator and said fourth means of said one converting means. 10. A signal processing apparatus according to claim 9, wherein each of the first to (N-1) th conversion means of the set includes the first means of the conversion means (100 _ak , or 100 _bk ). . 16. A signal processing apparatus according to claim 15, wherein said Nth conversion means of said set also comprises first means of said conversion means (100 _ak , or 100 _bk ). 16. The apparatus of claim 15, wherein the Nth transform means of the set includes another form of first means in which an output of the m-tap digital convolution filter is applied directly to a first output terminal of the Nth transform means. Signal processing apparatus, characterized in that. 18. The Nth conversion means of the set according to claim 17, wherein the information component of the signal (G _N-1 ) at said first input is applied to said sample subtractor through a delay circuit (109), And the delay circuit of the second conversion means inserts a time delay substantially equal to that inserted by the m-tap digital convolution filter. In the apparatus for performing spectrum analysis in real time, a continuously low sampling rate (CL ₁ , CL) having an input signal (G ₀ ) on which spectrum analysis is performed and an output signal (G _N ), which is the remaining low pass spectrum. _{And a} subjunction of the low pass sampling filter 102,104, which is operated as: &lt; RTI ID = 0.0 &gt;&lt; / RTI &gt; to insert a zero into the decimated sample that is the response of each low pass sampling filter 102,104 to obtain respective simplified results. Means (106,108) for low pass filtering the result and: each row at the slave connection by an amount equal to the sum of the delay in the filter response and the delay caused by low pass filtering of the zero inserted response. A delay circuit 109 for delaying input samples for a pass filter: delayed input samples for each low pass filter in the cascaded connections derived from the filter response. Between the result and the subtraction in combination, real-time spectrum analysis comprising: a sample subtractor 110 for enhancing spectral analysis sinhojung an analysis signal (L _K-1) of the input signal to the slave connection execution unit. An apparatus for spectral analysis of an electrical signal (G ₀ ) regularly sampled at a rate R, comprising: a plurality of n analysis stages (100-1, 100-2, 100-n) consecutively numbered from 0 to n in radix for each analysis stage to provided is detached in response to the high-frequency component of the input signal (G _k) the first output signal (G _{k + 1)} in response to a low frequency component of the, the input signal (G _k) One of the analysis stages 100-1 providing a second output L _K , numbered _zero , receives the electrical signal G ₀ as its input signal for spectral analysis, Each of the other analysis stages receives, as its input signal, the first output signal of the analysis stage having the preceding radix, and the second output signal of all the stages and the first output signal of the numbered analysis stage are the spectral analysis signals. And providing: Each of the plurality of analysis stages, applied to its input Has an input signal (G _k) of the end group analysis, R / 2K m- end of the first clock which is at the same clock rate and (K is the radix of the analysis stage) paper shift requester (m is an integer of 2 or greater, 470) And weight the input signal G _k delayed at each stage of the first m-stage shift resistor by the input signal G _k of the analysis stage and the set coefficient, 1, the linear phase low-pass filter response of the output signal (G _{k + 1)} for adding the weight signals to generate a weight and summing circuit (471) and: first in the analysis stage to the R / 2 ^K ratio To selectively select one output signal and a zero value, the operation sin is clocked at a clock ratio equal to the multiplexer 472 and the R / 2 ^K ratio, and having a signal selected by the multiplexer at its input. And a second m-stage shift resistor 473, with the selected signal of the analysis stage and the set Weights and sums the weights of the selected signals delayed at each stage of the second m-short shift jitter by a weighting coefficient, and sums the weighted signals to obtain a resampled first output signal for that analysis stage. Circuit 474: subtracting and combining the resampled first output signal for the analysis stage from the delayed input signal for the analysis stage to generate a second output signal L _K for the analysis stage. And a subtractor (475). 21. The apparatus of claim 20, wherein m is the same in each analysis stage, and each analysis stage uses similar weighting coefficients. 23. The delayed input signal of claim 22, wherein the delayed input signal for each analysis stage is obtained from the mth stage of the first long m-stage shift resistor and further delayed by a delay circuit 476. Real time spectrum analyzer. In a digital filter providing at least one output response, a tap clock is numbered sequentially sequentially and clocked continuously at a lower rate (R, R / 2, etc.) as the sequentially numbered numbers increase. 470 in each of the plurality of delay lines 100-1, 100-2, ..., and the like: Analog / for applying an input signal G ₀ to be filtered to a first delay line input of the plurality of delay lines 470; Digital converters 305, 1205 and: Weight and summation circuits 100-1, 100-2 for combining the weighted samples to weight each sample from the taps of each delay line to obtain each filter response (G ₁ , G ₂ ). And 471) at each of ... and so on: each delay except for at least a portion (G _N ) of each filter response derived from the sample taken from the delay line, ie the last signal used in the generation of the overall response. With samples taken from the line Directly to each filter response induced by the next input to the digital delay line filter which is characterized in that it comprises means for applying. 24. The digital filter of claim 23, wherein the weighted samples from the taps of each delay line are combined to obtain each filter response (G ₁ , G ₂ ..., Etc.) with low pass characteristics. 25. The digital filter of claim 24, wherein one of each filter response (GN) obtained by weighting and combining samples taken from a delay line with the largest ordinal number is used as the output response of the digital filter. 25. The method of claim 24, further comprising: a second tap clocked delay line 473 clocked at the same rate as the selected delay line 470 of the plurality of tapped delay lines: the selected delay line at the input of the second delay line; A multiplexer 472 for selectively applying an output of zero and zero, and a weight and summation circuit 474 for combining the samples to obtain a low pass filter response by sample weighting from the taps of the second delay line. And: a subtractor 475 for subtracting and combining the roll pass filter response obtained at the output of the selected delay line among the plurality of tapped delay lines to generate the output response L _k of the digital filter. Digital filter to say. 24. The second clocked delay line 473 of claim 23, wherein the second clocked delay line 473 is clocked at the same rate as the selected delay line 470 of the plurality of tapped delay lines. A multiplexer 472 for selectively applying an output and zero (0); A weight and summation circuit 474 for combining the sample to weight the sample from the taps of the second delay line to obtain a low pass filter response: to generate an output response L _k of the digital filter. And a subtractor (475) for subtracting and combining the low pass filter response obtained with the delayed input (G _k ) to the delay line. 28. The digital filter of claim 27, wherein the delayed input to the previous delay line is obtained by coupling a delay circuit (476) to one of the taps of the delay line.

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