Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문세흥filedCritical문세흥
Priority to KR1019870008301ApriorityCriticalpatent/KR890002762A/en
Publication of KR890002762ApublicationCriticalpatent/KR890002762A/en
메모리 소자의 8비트형 프로그래머장치8-bit programmer of memory device
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 1도 전체 계통도 제 2도 전체 회로도-CPU부 제 3도 전체 회로도-I/O 및 ZIF부.Fig. 1 Overall Schematic Fig. 2 Overall Circuit Diagram-CPU Section 3 Fig. Overall Circuit Diagram-I / O and ZIF Section.
Claims (3)
3, 3, 2.절에 기술되어 있는 뱅크 디코더이론으로서 8비트 CPU인 8052AH를 사용하여 27010(1메가비트)EPROM에 적용하는 사항.The bank decoder theory described in Sections 3, 3 and 2. applies to 27010 (1 megabit) EPROM using 8052AH, an 8-bit CPU.1항에 의해 27010 등의 EPROM을 활용하기 위한 아답터 방식.Adapter method for utilizing EPROM such as 27010 according to Clause 1.1항에 있어서 MCS-51 계열을 함께하는 데이터 테이블 방식.The data table method according to claim 1, which includes the MCS-51 series.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870008301A1987-07-301987-07-30
8-bit programmer of memory device
KR890002762A
(en)