KR880001027A - Bonding method of semiconductor wafer and bonding apparatus thereof - Google Patents

Bonding method of semiconductor wafer and bonding apparatus thereof Download PDF

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Publication number
KR880001027A
KR880001027A KR1019860004652A KR860004652A KR880001027A KR 880001027 A KR880001027 A KR 880001027A KR 1019860004652 A KR1019860004652 A KR 1019860004652A KR 860004652 A KR860004652 A KR 860004652A KR 880001027 A KR880001027 A KR 880001027A
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KR
South Korea
Prior art keywords
semiconductor wafer
hollow shafts
caught
bonding
face
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Application number
KR1019860004652A
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Korean (ko)
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KR900003249B1 (en
Inventor
기요시 요시가와
Original Assignee
가부시끼가이샤 도오시바
와타리 스기이찌로
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Priority to KR1019860004652A priority Critical patent/KR900003249B1/en
Publication of KR880001027A publication Critical patent/KR880001027A/en
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Publication of KR900003249B1 publication Critical patent/KR900003249B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Abstract

내용 없음No content

Description

반도체웨이퍼의 접합방법 및 그 접합장치Bonding method of semiconductor wafer and bonding apparatus thereof

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 관한 접합장치중 일부를 제외한 사시도. 제2도는 접합장치내에서 접합공정전의 배치상태를 나타내는 단면도. 제3도는 접합공정적인 접합장치를 나타내는 단면도.1 is a perspective view excluding some of the bonding apparatus according to the present invention. 2 is a cross-sectional view showing an arrangement state before a joining process in a joining apparatus. 3 is a cross-sectional view showing a bonding apparatus in the bonding process.

Claims (2)

경면연마하여 실리콘웨이퍼를 접합시키는 반도체웨이퍼의 접합방법에 있어서, 반도체웨이퍼에 형성된 경면을 청정분위기내에서 서로 마주보도록 배치시켜주는 공정화, 이렇게 서로 마주보는 반도체웨이퍼경면을 강압상태로 유지시켜주는 공정. 상기 반도체웨이퍼경면의 최소한 한쪽을 그중앙부가 돌출되도록 변형시켜주는 공정. 상기 반도체웨이퍼경면의 중앙부접촉을 감지하는 공정 및, 상기 반도체웨이퍼경면의 감압상태를 해제시켜주는 공정을 구비한 것을 특징으로 하는 반도체웨이퍼의 접합방법.A semiconductor wafer bonding method for bonding silicon wafers by mirror polishing, wherein the mirror surfaces formed on the semiconductor wafers are disposed so as to face each other in a clean atmosphere. Deforming at least one side of the mirror surface of the semiconductor wafer such that its central portion protrudes. And a step of sensing a central contact of the mirror surface of the semiconductor wafer and a step of releasing a reduced pressure state of the mirror surface of the semiconductor wafer. 경면연마하여 실리콘웨이퍼를 접합시키는 반도체웨이퍼의 접합장치에 있어서, 청정분위기내에 배치되어 수직방향으로 서로 마주보도록 설치한 제1 및 제2중공축과 이들 양 중공축에 연결되는 감압기구. 상기 제1 및 제2중공축에 접속되는 웨이퍼붙잡음기구. 상기붙잡음기구의 서로 마주보는 압력변화에 따라 변화되는 재료로 형성시켜 놓은 평탄부. 상기 제1 및 2중공축에 유통할 수 있도록 상기평탄부를 관통해서 형성시킨 관통구멍. 적어도 한쪽의 상기붙잡음기구내에 설치해 놓은 도구. 상기 평탄부를 마주보도록 상기도구 부분의 중앙부를 돌출시켜 형성시킨 경사부. 상기 제1 및 제2중공축에 걸려 이동할수 있도록한 구동기구. 상기 구동기구를 고정시켜주는 지지부. 상기 제1, 제2중공축의 어느쪽 하나에 걸리게되는 접촉감지기구 및 상기 제2중공축에 걸리게 되는 이동거리조정기구를 구비하고 있음을 특징으로 하는 반도체웨이퍼의 접합장치.A semiconductor wafer bonding apparatus for joining silicon wafers by mirror polishing, wherein the first and second hollow shafts are disposed in a clean atmosphere and installed to face each other in the vertical direction, and are connected to both hollow shafts. A wafer holding mechanism connected to the first and second hollow shafts. A flat portion formed of a material that changes in accordance with the pressure changes facing each other of the holding mechanism. A through hole formed through the flat portion so as to be distributed to the first and second hollow shafts. A tool installed in at least one of the holding mechanisms. An inclined portion formed by protruding the central portion of the tool portion to face the flat portion. And a drive mechanism capable of being caught by the first and second hollow shafts. A support for fixing the drive mechanism. And a contact sensing mechanism caught by either one of the first and second hollow shafts and a movement distance adjusting mechanism caught by the second hollow shaft. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019860004652A 1986-06-12 1986-06-12 Semiconductor wafer bonding method and structure thereof KR900003249B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019860004652A KR900003249B1 (en) 1986-06-12 1986-06-12 Semiconductor wafer bonding method and structure thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860004652A KR900003249B1 (en) 1986-06-12 1986-06-12 Semiconductor wafer bonding method and structure thereof

Publications (2)

Publication Number Publication Date
KR880001027A true KR880001027A (en) 1988-03-31
KR900003249B1 KR900003249B1 (en) 1990-05-12

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Application Number Title Priority Date Filing Date
KR1019860004652A KR900003249B1 (en) 1986-06-12 1986-06-12 Semiconductor wafer bonding method and structure thereof

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KR (1) KR900003249B1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7192841B2 (en) 2002-04-30 2007-03-20 Agency For Science, Technology And Research Method of wafer/substrate bonding
US7361593B2 (en) 2002-12-17 2008-04-22 Finisar Corporation Methods of forming vias in multilayer substrates
US7259466B2 (en) 2002-12-17 2007-08-21 Finisar Corporation Low temperature bonding of multilayer substrates

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Publication number Publication date
KR900003249B1 (en) 1990-05-12

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