KR870001108U - Multiple memory circuit - Google Patents

Multiple memory circuit

Info

Publication number
KR870001108U
KR870001108U KR2019850007141U KR850007141U KR870001108U KR 870001108 U KR870001108 U KR 870001108U KR 2019850007141 U KR2019850007141 U KR 2019850007141U KR 850007141 U KR850007141 U KR 850007141U KR 870001108 U KR870001108 U KR 870001108U
Authority
KR
South Korea
Prior art keywords
memory circuit
multiple memory
circuit
memory
Prior art date
Application number
KR2019850007141U
Other languages
Korean (ko)
Other versions
KR880002980Y1 (en
Inventor
박종석
Original Assignee
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사 filed Critical 주식회사 금성사
Priority to KR2019850007141U priority Critical patent/KR880002980Y1/en
Publication of KR870001108U publication Critical patent/KR870001108U/en
Application granted granted Critical
Publication of KR880002980Y1 publication Critical patent/KR880002980Y1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
KR2019850007141U 1985-06-14 1985-06-14 A multi-memory circuit KR880002980Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019850007141U KR880002980Y1 (en) 1985-06-14 1985-06-14 A multi-memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019850007141U KR880002980Y1 (en) 1985-06-14 1985-06-14 A multi-memory circuit

Publications (2)

Publication Number Publication Date
KR870001108U true KR870001108U (en) 1987-02-20
KR880002980Y1 KR880002980Y1 (en) 1988-08-23

Family

ID=19242949

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019850007141U KR880002980Y1 (en) 1985-06-14 1985-06-14 A multi-memory circuit

Country Status (1)

Country Link
KR (1) KR880002980Y1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100831208B1 (en) * 2002-07-30 2008-05-21 엘지전자 주식회사 Delay line using memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100831208B1 (en) * 2002-07-30 2008-05-21 엘지전자 주식회사 Delay line using memory

Also Published As

Publication number Publication date
KR880002980Y1 (en) 1988-08-23

Similar Documents

Publication Publication Date Title
KR860006106A (en) Semiconductor memory
KR880700419A (en) Integrated circuit
KR880700354A (en) Dafot Memory System
KR880700420A (en) Integrated circuit
KR870001664A (en) Semiconductor memory
DE3687787D1 (en) MEMORY ACCESS CONTROL CIRCUIT.
DE3681045D1 (en) CHARGE CIRCUIT.
DE3689462T2 (en) Logical circuit.
NO170867C (en) arbitration circuit
DE3581596D1 (en) FIXED MEMORY CIRCUIT.
DE3680829D1 (en) FIXED MEMORY ARRANGEMENT.
DK466586A (en) SUPPLY CIRCUIT
NO850262L (en) CIRCUIT T-SHIFT INTRAUTER DEVICE
DK178686D0 (en) CIRCUIT LOGIC CIRCUIT
FI864944A0 (en) Electronic fuse
DE3686073T2 (en) LOGICAL CIRCUIT.
IT8619722A1 (en) CIRCUIT ARRANGEMENT
KR870006655A (en) Semiconductor memory
DE3673138D1 (en) LOGICAL CIRCUIT.
ATA238385A (en) ELECTRONIC TAXAMETER
KR870000707A (en) Semiconductor memory
KR870001108U (en) Multiple memory circuit
KR870001600A (en) Flip-flop circuit
KR870007558U (en) Video memory circuit
KR870001907U (en) Memory sharing circuit

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19971229

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee