KR860000704A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
KR860000704A
KR860000704A KR1019840003366A KR840003366A KR860000704A KR 860000704 A KR860000704 A KR 860000704A KR 1019840003366 A KR1019840003366 A KR 1019840003366A KR 840003366 A KR840003366 A KR 840003366A KR 860000704 A KR860000704 A KR 860000704A
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KR
South Korea
Prior art keywords
layer
manufacturing
semiconductor device
semiconductor substrate
semiconductor
Prior art date
Application number
KR1019840003366A
Other languages
Korean (ko)
Inventor
히사오 하야시 (외 1)
Original Assignee
오오가 노리오
쏘니 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 오오가 노리오, 쏘니 가부시기가이샤 filed Critical 오오가 노리오
Priority to KR1019840003366A priority Critical patent/KR860000704A/en
Publication of KR860000704A publication Critical patent/KR860000704A/en

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Abstract

내용 없음No content

Description

반도체장치의 제법Manufacturing method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제4도는 본원 발명 제법의 일례의 공정도.4 is a flowchart of an example of the production method of the present invention.

* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings

(11):반도체 기체, (12):다결정층생성을 위한 본 바탕 층, (13s)(13p):단결정층 및 다결정층(11): semiconductor gas, (12): main base layer for polycrystalline layer generation, (13s) (13p): single crystal layer and polycrystalline layer

Claims (1)

반도체 기체상에 선택적으로 다결정반도체층과 단결정 반도체층을 동시에 형성하는 에피택셜공정을 갖는 반도체장치의 제법에 있어서, 상기 에피택셜공정에 앞서서 상기 반도체 기체의 상기 다결정 반도체층을 형성하는 부분에 상기 에피택셜공정에 있어서 상기 반도체 기체표면에 공급되는 가스와 반응하는 일이 없는 물질층을 최소한 표면층으로서 갖는 다결정 생성을 위한 본 바탕층의 형성 공정을 갖는 것을 특징으로 하는 반도체장치의 제법.A method of manufacturing a semiconductor device having an epitaxial step of selectively forming a polycrystalline semiconductor layer and a single crystal semiconductor layer simultaneously on a semiconductor substrate, wherein the epitaxial portion is formed at a portion of the semiconductor substrate to form the polycrystalline semiconductor layer prior to the epitaxial step. And a step of forming the base layer for producing polycrystals having at least as a surface layer a material layer which does not react with the gas supplied to the semiconductor substrate. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019840003366A 1984-06-15 1984-06-15 Manufacturing method of semiconductor device KR860000704A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019840003366A KR860000704A (en) 1984-06-15 1984-06-15 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019840003366A KR860000704A (en) 1984-06-15 1984-06-15 Manufacturing method of semiconductor device

Publications (1)

Publication Number Publication Date
KR860000704A true KR860000704A (en) 1986-01-30

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019840003366A KR860000704A (en) 1984-06-15 1984-06-15 Manufacturing method of semiconductor device

Country Status (1)

Country Link
KR (1) KR860000704A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100612885B1 (en) * 2004-12-30 2006-08-14 삼성전자주식회사 Fabrication method of Substrate having locally integrated single crystalline silicon layer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100612885B1 (en) * 2004-12-30 2006-08-14 삼성전자주식회사 Fabrication method of Substrate having locally integrated single crystalline silicon layer

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A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application