KR850006829A - Image boundary detection processing device - Google Patents
Image boundary detection processing device Download PDFInfo
- Publication number
- KR850006829A KR850006829A KR1019850001849A KR850001849A KR850006829A KR 850006829 A KR850006829 A KR 850006829A KR 1019850001849 A KR1019850001849 A KR 1019850001849A KR 850001849 A KR850001849 A KR 850001849A KR 850006829 A KR850006829 A KR 850006829A
- Authority
- KR
- South Korea
- Prior art keywords
- image
- data
- storage means
- processing device
- direction data
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/10—Adaptations for transmission by electrical cable
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Controls And Circuits For Display Device (AREA)
- Image Processing (AREA)
- Image Analysis (AREA)
Abstract
내용없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제2도 내지 4도는 본 발명에 관한 화상의 경계 검출장치의 일실시예를 도시한 것으로서,2 to 4 show one embodiment of an image boundary detection apparatus according to the present invention.
제2도는 실시예의 구성을 도시하는 블록도,2 is a block diagram showing the configuration of the embodiment;
제3도는 동작을 도시하는 타임챠트,3 is a time chart showing the operation,
제4도는 검출동작을 행하는 대상이되 우에 각 화소의 화상데이타의 내용과 검출방향을 각각 도시하는 모식도.4 is a schematic diagram showing the contents and the detection direction of the image data of each pixel, respectively, when the detection operation is performed.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 타이밍카운터 2 : 오프셋 ROM1: Timing counter 2: Offset ROM
3 : 가산기 10 : 화상메모리3: adder 10: image memory
20 : 시프트레지스터 30 : 데이타비교회로20: shift register 30: data rational church
40, 40A : 방향 ROM 50, 50A : 랫치회로40, 40A: Direction ROM 50, 50A: Latch circuit
100 : 마이크로컴퓨터 14,142,143,144 : 프레임메모리100: microcomputer 14,142,143,144: frame memory
190 : 보조메모리 200 : 고속연산처리장치190: auxiliary memory 200: high speed operation processing device
Claims (1)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP?59-53959 | 1984-03-21 | ||
JP53959 | 1984-03-21 | ||
JP59053959A JPS60197083A (en) | 1984-03-21 | 1984-03-21 | Boundary detection and processing unit of picture |
Publications (2)
Publication Number | Publication Date |
---|---|
KR850006829A true KR850006829A (en) | 1985-10-16 |
KR930004642B1 KR930004642B1 (en) | 1993-06-02 |
Family
ID=12957227
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019850001849A KR930004642B1 (en) | 1984-03-21 | 1985-03-21 | Apparatus for encoding image signal |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPS60197083A (en) |
KR (1) | KR930004642B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4969433B2 (en) | 2007-12-19 | 2012-07-04 | 三菱重工業株式会社 | Centrifugal compressor |
-
1984
- 1984-03-21 JP JP59053959A patent/JPS60197083A/en not_active Expired - Lifetime
-
1985
- 1985-03-21 KR KR1019850001849A patent/KR930004642B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPS60197083A (en) | 1985-10-05 |
KR930004642B1 (en) | 1993-06-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR920013132A (en) | Preferred reference buffer | |
KR860004356A (en) | Data processing device | |
KR850007898A (en) | Raster scanning display | |
KR850004677A (en) | Address transition control system | |
KR910012962A (en) | DMA controller | |
KR890008691A (en) | Data processor devices | |
KR890010709A (en) | Information processing device | |
KR920001323A (en) | How processors work to improve computer performance by removing branches | |
KR920008660A (en) | Image display control device | |
KR840006851A (en) | Automatic data processing circuit | |
KR860000595A (en) | Memory access control method for information processing device | |
KR840001977A (en) | Digital Transmitter with Vector Component Addressing | |
KR910014819A (en) | Dual-Port Cache Tag Memory | |
KR980003942A (en) | Matrix Interpolation Method | |
KR850006829A (en) | Image boundary detection processing device | |
KR910020552A (en) | Improved method and device for current window cache | |
KR910005570A (en) | Programmable Subframe PWM Circuit | |
JPS6431238A (en) | System for controlling store buffer | |
KR920008751A (en) | Apparatus and method for forecasting pages for multi-page DRAM | |
JPS57157369A (en) | Loop tracking processing system | |
KR850006830A (en) | Image coding apparatus | |
JPS5637892A (en) | Memory unit | |
KR850003599A (en) | Main address control system of data processing system | |
KR910017278A (en) | Micro Program Control | |
KR880009300A (en) | Arithmetic processing unit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
LAPS | Lapse due to unpaid annual fee |