KR20240085595A - super-PTAT current source with enhanced temperature coefficient - Google Patents

Abstract

The present disclosure relates to a PTAT (super-PTAT) current generating device with enhanced temperature coefficient performance. The super-PTAT current generating device includes a plurality of PMOS transistors (M ₁ , M ₂ and M ₃ ) that generate bias current and constitute a current mirror; and a plurality of NPN bipolar transistors (Q ₁ , Q ₂ , Q ₃ ) that generate a PTAT voltage and constitute a current mirror. The plurality of NPN bipolar transistors (Q ₁ , Q ₂ , Q ₃ ) function as an emitter follower buffer at the first NPN bipolar transistor (Q ₁ ), the second NPN bipolar transistor (Q ₂ ), and the PTAT voltage generation stage. It includes a third NPN bipolar transistor (Q ₃ ).

Description

PTAT current source with enhanced temperature coefficient {super-PTAT current source with enhanced temperature coefficient}

This disclosure relates to a PTAT (proportional to absolute temperature) current generating device that operates as a current reference among analog basic circuits.

The analog circuit includes a bandgap voltage reference generator with a constant value regardless of temperature as a basic circuit component in order to minimize changes in circuit performance due to temperature changes.

A band gap reference voltage generator is a device that stably supplies a constant voltage despite changes in temperature or external voltage. It is used in all application devices that require a reference voltage, such as semiconductor memory devices or thermal sensors for on-die thermometers. It is used.

A band gap reference voltage generator typically consists of a PTAT current generator with a positive temperature coefficient and a complementary proportional to absolute temperature (CTAT) current generator with a negative temperature coefficient.

In this disclosure, we propose a PTAT (super-PTAT) current generator with enhanced positive temperature coefficient that can sufficiently compensate for amplifier performance degradation at high temperatures without increasing the complexity of the PTAT current generator.

A PTAT (proportional to absolute temperature) current generator with enhanced temperature coefficient performance according to an embodiment of the present disclosure includes a plurality of PMOS transistors (M ₁ , M ₂ , and M _{3 )} that generate bias current and constitute a current mirror. ); and a plurality of NPN bipolar transistors (Q ₁ , Q ₂ , Q ₃ ) that generate a PTAT voltage and constitute a current mirror. The plurality of NPN bipolar transistors (Q ₁ , Q ₂ , Q ₃ ) function as an emitter follower buffer at the first NPN bipolar transistor (Q ₁ ), the second NPN bipolar transistor (Q ₂ ), and the PTAT voltage generation stage. It includes a third NPN bipolar transistor (Q ₃ ).

According to one embodiment, the third NPN bipolar transistor (Q ₃ ) is connected to the collector terminal of the first NPN bipolar transistor (Q ₁ ) and the base terminal of the first NPN bipolar transistor (Q ₁ ) as the emitter follower buffer. can be connected

According to one embodiment, currents flowing through each branch of the plurality of PMOS transistors (M ₁ , M ₂ , and M ₃ ) may all be the same.

According to one embodiment, the PTAT current generating device may further include a resistor (R ₁ ) connected to the emitter terminal of the second NPN bipolar transistor (Q ₂ ).

The PTAT current generation device according to an embodiment of the present disclosure can compensate for amplifier performance degradation at high temperatures without increasing device complexity.

1 is a diagram to explain the principle of the PTAT voltage generator.
Figure 2 shows a PTAT current generation device according to the configuration used in CMOS silicon semiconductor technology.
Figure 3 is a circuit diagram for explaining a super-PTAT current generation device according to an embodiment of the present disclosure.
Figure 4a shows the change in gain value depending on the temperature of the RF transmitting end power amplifier when the PTAT current generating device is not used.
Figure 4b shows the change in gain value depending on the temperature of the RF transmitting end power amplifier when a PTAT current generator is used.
Figure 4c shows the change in gain value depending on the temperature of the RF transmitting end power amplifier when a super-PTAT current generator is used.
Figure 5 shows the temperature coefficient by the PTAT current generating device and the temperature coefficient of the slope augmented by the super-PTAT current generating device.

Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the attached drawings. Also, in describing the present disclosure, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the gist of the present disclosure, the detailed description will be omitted. In addition, the terms described below are terms defined in consideration of the functions in the present disclosure, and may vary depending on the intention or custom of the user or operator. Therefore, the definition should be made based on the contents throughout this specification.

The advantages and features of the present disclosure and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below and may be implemented in various different forms, and the present embodiments are merely intended to ensure that the disclosure is complete and to provide common knowledge in the technical field to which the present disclosure pertains. It is provided to fully inform those who have the scope of the disclosure, and the disclosure is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.

1 is a diagram to explain the principle of the PTAT voltage generator.

Referring to FIG. 1, the PTAT voltage generator includes a first bipolar transistor (Q ₁ ) including a first emitter, a first base, and a first collector, It consists of a second bipolar transistor (Q ₂ ) including a second emitter, a second base, and a second collector.

If the size difference between the two bipolar transistors (Q ₁ and Q ₂ ) is 1:N and the same current I _O is supplied to each of the two bipolar transistors (Q ₁ and Q ₂ ), the first base in the first bipolar transistor (Q1) The difference between the voltage between the first emitter (V _BE1 ) and the voltage (V _BE2 ) between the second base and the second emitter in the second bipolar transistor (Q2) (V _BE = V _BE1 - V _BE2 ) is calculated using the equation below: It can be defined as Equation 1.

[Equation 1]

ΔV _BE = V _BE1 - V _BE2 = kT/q·ln(I _O /I _S1 ) - kT/q·ln(I _O /I _S2 ) = kT/q·ln(I _S2 /I _S1 )

where k is the Boltzmann constant, T is the absolute temperature, q is the charge of the electron, and _I Is the reverse saturation current of the first bipolar transistor (Q ₁ ), and I _S2 is This is the reverse saturation current of the second bipolar transistor (Q ₂ ).

Since the size difference between the two bipolar transistors Q ₁ and Q ₂ is 1:N and I _S2 = N·I _S1 , ΔV _BE can be expressed as Equation 2 below.

[Equation 2]

ΔV _BE = kT/q·ln(N)

The PTAT voltage (V _PTAT ) of the PTAT voltage generator of FIG. 1 is equal to ΔV _BE , and referring to Equation 2, the PTAT voltage (V _PTAT ) is proportional to the absolute temperature T.

Figure 2 shows a PTAT current generation device according to the configuration used in CMOS silicon semiconductor technology.

Referring to FIG. 2, the PTAT current generating device includes a silicon bipolar transistor structure (Q ₁ , Q ₂ ) for generating PTAT voltage, a self-bias current circuit composed of CMOS elements (M ₁ to M ₅ ), and a resistor (R ₁ ) includes.

If the first MOS transistor (M ₁ )-second MOS transistor (M ₂ ) and the third MOS transistor (M ₃ )-fourth MOS transistor (M ₄ ) element pairs each have the same size, the first MOS transistor (M ₁ ) and the drain current (I _D2 ) of _the second MOS transistor (M ₂ ) may be the same.

Since the drain current (I _D1 ) of the first MOS transistor (M ₁ ) and the drain current (I _D2 ) of the second MOS transistor (M ₂ ) are the same, the voltage at node X and the voltage at node Y in FIG. 2 may also be the same. You can.

In FIG. 2, since the PTAT voltage (V _PTAT = ΔV _BE ) is applied to both ends of the resistor (R ₁ ), the drain current (I _D2 ) of the second MOS transistor (M ₂ ) can be defined as Equation 3 below.

[Equation 3]

I _D2 = ΔV _BE /R ₁ = (kT/q·ln(N))/R ₁

In the PTAT current generator of FIG. 2 , the PTAT current may be provided as the drain current (I _D5 ) of the fifth MOS transistor (M ₅ ), which is a current mirror circuit.

The transmitting end of the RF (radio frequency analog circuit) transmits the output signal to the outside through a power amplifier, but due to the operating characteristics of the power amplifier, a lot of heat can be generated, which increases the operating temperature of the RF analog circuit.

As the operating temperature of the RF analog circuit increases, performance such as power gain deteriorates. To compensate for the performance deterioration at high temperatures of the RF analog circuit, a PTAT current generator that supplies a reference current proportional to the temperature rise is used to transmit the RF transmitter. Circuits can be designed.

In this disclosure, we propose a current generator with enhanced temperature proportionality characteristics (super-PTAT current source) developed with a structure that increases the temperature coefficient proportionality to provide sufficient temperature compensation performance for RF power amplifiers whose gain characteristics deteriorate at high temperatures. do.

The PTAT current generator according to an embodiment of the present disclosure is a super-PTAT that supplies a larger current than the existing PTAT current generator when the temperature increases by constructing a circuit that increases the proportionality of the positive temperature coefficient proportional to the absolute temperature. A current generating device is provided.

Figure 3 is a circuit diagram for explaining a super-PTAT current generating device according to an embodiment of the present disclosure.

Referring to FIG. 3, the super-PTAT current generating device includes a plurality of PMOS transistors (M ₁ , M ₂ and M ₃ ) constituting a self-bias current generating device and a current mirror, and a PTAT voltage generating device and a current mirror. It includes a plurality of NPN bipolar transistors (Q ₁ , Q ₂ , Q ₃ ), and a resistor (R ₁ ).

In order to increase the proportionality of the temperature coefficient without increasing the complexity of the PTAT current generator, the super-PTAT current generator has a structure that adds one bipolar transistor (Q ₃ ) as an emitter follower buffer to the PTAT voltage generator. It can be configured.

The super-PTAT current generator is already connected to the collector and base terminals of the first bipolar transistor (Q ₁ ) through a diode connection in a current mirror consisting of a pair of the first bipolar transistor (Q ₁ ) and the second bipolar transistor (Q ₂ ). It may include a third bipolar transistor (Q ₃ ) connected to the first follower buffer.

The super-PTAT current generating device further includes a third bipolar transistor (Q ₃ ) connected to the emitter follower buffer, thereby limiting the base current of the first bipolar transistor (Q ₁ ) and the second bipolar transistor (Q ₂ ), which The accuracy of the current mirror can be increased by minimizing the error in the mirrored current between the first bipolar transistor (Q ₁ ) and the second bipolar transistor (Q ₂ ).

The current mirror composed of PMOS transistors (M ₁ , M ₂ ) of the same size and NPN bipolar transistors (Q ₁ , Q ₂ , Q ₃ ) becomes its own bias current generator and a super-PTAT current generator. The currents I _M1 , I _M2 and I _M3 flowing through each branch of the plurality of PMOS transistors (M ₁ , M ₂ , M ₃ ) included in are all the same.

I_E2 = I_PTAT).The emitter currents of the first bipolar transistor (Q ₁ ) and the second bipolar transistor (Q ₂ ) also become the same (I _E1 I _E2 ), the emitter current of Q ₂ , which mirrors the emitter current of the diode-connected NPN bipolar transistor Q ₁ , is the base-emitter specific voltage difference resulting from the size difference between Q ₁ and Q ₂ and the resistance R ₁ generated. Since it becomes a current, it becomes a current proportional to the absolute temperature (I _E1

I _E2 = I _PTAT ).

The base current (I _B1 ) of the first bipolar transistor (Q ₁ ) and the base current (I _B2 ) of the second bipolar transistor (Q ₂ ) satisfy Equation 4 below.

[Equation 4]

I_B2 = I_E2(1/(β+1))I _B1

I _B2 = I _E2 (1/(β+1))

Referring to Equation 4, the emitter current (I _E3 ) of the third bipolar transistor (Q ₃ ) satisfies Equation 5 below.

[Equation 5]

I _E3 = 2I _B2 = 2I _E2 (1/(β+1))

The base current (I _B3 ) of the third bipolar transistor (Q ₃ ) satisfies Equation 6 below.

[Equation 6]

I _B3 = I _E3 (1/(β+1)) = 2I _E2 (1/(β+1)) ²

The collector current (I _C1 ) of the first bipolar transistor (Q ₁ ) satisfies Equation 7 below.

[Equation 7]

I_E2(β/(β+1)) I _C1 = I _E1 (β/(β+1))

I _E2 (β/(β+1))

Referring to Equation 6 and Equation 7, the current (I _M1 ) of the first PMOS transistor (M ₁ ) satisfies Equation 8 below.

[Equation 8]

I _M1 = I _C1 + I _B3 = I _E2 (β/(β+1)) + 2I _E2 (1/(β+1)) ² = I _E2 (β/(β+1))·(1+2 /(β/(β+1)))

I_E2·β(1+β)으로 간략화 되고, 제2 PMOS 트랜지스터(M₂)의 전류(I_M2) 및 제3 PMOS 트랜지스터(M₃)의 전류(I_M3)는 아래의 수학식 9를 만족한다.In general, β ≫ 1, so Equation 8 above is I _M1

I _E2 ·β (1+β) is simplified, and the current (I _M2 ) of the second PMOS transistor (M ₂ ) and the current (I _M3 ) of the third PMOS transistor (M ₃ ) satisfy Equation 9 below. do.

[Equation 9]

I_M3

I_M1 = I_E2·β(1+β) = I_PTAT·β(1+β) I _M2

I _M3

I _M1 = I _E2 ·β(1+β) = I _PTAT ·β(1+β)

exp[dEe/kT], (dEe: emitter bandgap narrowing, ~100mV)으로 나타낼 수 있고 절대온도에 비례함을 알 수 있다. Here, the current gain β is β = I _C /I _B

It can be expressed as exp[dEe/kT], (dEe: emitter bandgap narrowing, ~100mV), and it can be seen that it is proportional to the absolute temperature.

Accordingly, it can be seen that the super-PTAT current generator of FIG. 4 generates a current with a temperature coefficient increased by multiplying the existing PTAT current by β(1+β).

The super-PTAT current generator according to an embodiment of the present disclosure may be configured as a circuit that increases the temperature coefficient proportionality using transistor device characteristics without adding a complicated circuit.

The super-PTAT current generation device according to an embodiment of the present disclosure may include an emitter follower buffer connection structure that improves PTAT temperature coefficient proportionality and current mirror accuracy with the current gain of a silicon bipolar transistor built in CMOS silicon semiconductor technology. there is.

The super-PTAT current generation device according to an embodiment of the present disclosure may include a simple self-bias current generation circuit using a PMOS transistor current mirror pair and an NPN bipolar transistor current mirror pair.

Figure 4a shows the change in gain value depending on the temperature of the RF transmitting end power amplifier when the PTAT current generating device is not used, and Figure 4b shows the change in gain value depending on the temperature of the RF transmitting end power amplifier when using the PTAT current generating device. indicates.

Referring to FIGS. 4A and 4B, it can be seen that the performance degradation of power gain is compensated at high temperature (HT (120°C)) when the PTAT current generating device is used.

However, it can be confirmed that the temperature compensation function provided by the PTAT current generator is insufficient to sufficiently compensate for the deterioration in amplifier performance at high temperatures (HT (120°C)).

Figure 4c shows the change in gain value depending on the temperature of the RF transmitting end power amplifier when a super-PTAT current generator is used.

Referring to Figures 4b and 4c, it can be seen that when a super-PTAT current generator is used, the performance degradation of the amplifier's power gain is compensated to a greater extent at high temperature (HT (120°C)) than when a PTAT current generator is used. You can.

In this disclosure, we propose a super-PTAT current generator with enhanced performance and a positive temperature coefficient that can sufficiently compensate for amplifier performance degradation at high temperatures without increasing the complexity of the PTAT current generator.

The super-PTAT current generator according to an embodiment of the present disclosure configures a circuit to increase the proportionality of the positive temperature coefficient proportional to the absolute temperature without increasing the complexity of the PTAT current generator, so that when the temperature increases, it is better than the existing PTAT. Larger current can be supplied.

The super-PTAT current generator according to an embodiment of the present disclosure has performance with enhanced positive temperature coefficient and can sufficiently compensate for and improve performance degradation of the RF transmitter amplifier at high temperatures.

Figure 5 shows the temperature coefficient by the PTAT current generating device and the temperature coefficient of the slope augmented by the super-PTAT current generating device.

Referring to Figure 5, the PTAT current of the PTAT current generator is I _O at room temperature (300°K), and the current is 1.3·30% increased by 30% at high temperature (390°K). Since I _O , the slope of the temperature coefficient is 1.

The super-PTAT current generator generates a 40% increased current of 1.4·I _O at high temperature (390°K) according to the actual example of the current gain β value of a given silicon semiconductor bipolar transistor, so the slope of the temperature coefficient is 1.33. -Shows PTAT characteristics.

In the specific embodiments of the present disclosure described above, elements included in the disclosure are expressed in singular or plural numbers according to the specific embodiments presented. However, the singular or plural expressions are selected to suit the presented situation for convenience of explanation, and the present disclosure is not limited to singular or plural components, and even components expressed in plural may be composed of singular or singular. Even expressed components may be composed of plural elements.

Meanwhile, in the detailed description of the present disclosure, specific embodiments have been described, but of course, various modifications are possible without departing from the scope of the present disclosure. Therefore, the scope of the present disclosure should not be limited to the described embodiments, but should be determined not only by the scope of the patent claims described later, but also by the scope of this patent claim and equivalents.

Claims (10)

In a PTAT (proportional to absolute temperature) current generator with enhanced temperature coefficient performance,
A plurality of PMOS transistors (M ₁ , M ₂ and M ₃ ) that generate bias current and constitute a current mirror; and
It includes a plurality of NPN bipolar transistors (Q ₁ , Q ₂ , Q ₃ ) that generate a PTAT voltage and constitute a current mirror,
The plurality of NPN bipolar transistors (Q ₁ , Q ₂ , Q ₃ ) function as an emitter follower buffer at the first NPN bipolar transistor (Q ₁ ), the second NPN bipolar transistor (Q ₂ ), and the PTAT voltage generation stage. A device comprising a third NPN bipolar transistor (Q ₃ ). According to paragraph 1,
The third NPN bipolar transistor (Q ₃ ) is connected to the collector terminal of the first NPN bipolar transistor (Q ₁ ) and the base terminal of the first NPN bipolar transistor (Q ₁ ) as the emitter follower buffer. Device. According to paragraph 1,
A device wherein currents flowing through each branch of the plurality of PMOS transistors (M ₁ , M ₂ , and M ₃ ) are all the same. According to paragraph 1,
The base current (I _B1 ) of the first NPN bipolar transistor (Q ₁ ) and the base current (I _B2 ) of the second NPN bipolar transistor (Q ₂ ) satisfy Equation 4,
[Equation 4]
I _B1 I _B2 = I _E2 (1/(β+1))
Here, I _E2 is the emitter current of the second NPN bipolar transistor (Q ₂ ), and β is a coefficient. According to paragraph 4,
The emitter current (I _E3 ) of the third NPN bipolar transistor (Q ₃ ) satisfies Equation 5,
[Equation 5]
I _E3 = 2I _B2 = 2I _E2 (1/(β+1))
A device characterized in that. According to clause 5,
The base current (I _B3 ) of the third NPN bipolar transistor (Q ₃ ) satisfies Equation 6,
[Equation 6]
I _B3 = I _E3 (1/(β+1)) = 2I _E2 (1/(β+1)) ²
A device characterized in that. According to clause 6,
The collector current (I _C1 ) of the first NPN bipolar transistor (Q ₁ ) satisfies Equation 7,
[Equation 7]
I _C1 = I _E1 (β/(β+1))

I _E2 (β/(β+1))
A device characterized in that. In clause 7,
The current (I _M1 ) of the first PMOS transistor (M ₁ ) satisfies Equation 8,
[Equation 8]
I _M1 = I _C1 + I _B3 = I _E2 (β/(β+1)) + 2I _E2 (1/(β+1)) ² = I _E2 (β/(β+1))(1+2/ (β/(β+1)))
A device characterized in that. According to clause 8,
The current (I _M2 ) of the second PMOS transistor (M ₂ ) and the current (I _M3 ) of the third PMOS transistor (M ₃ ) satisfy Equation 9,
[Equation 9]
I _M2

I _M3

I _M1 = I _E2 ·β(1+β) = I _PTAT ·β(1+β)
A device characterized in that. According to paragraph 1,
The device further comprises a resistor (R ₁ ) connected to the emitter terminal of the second NPN bipolar transistor (Q ₂ ).