KR20240082156A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

The present invention relates to a semiconductor device and a method of manufacturing the same, and more specifically, to a method of manufacturing a semiconductor device having a semiconductor layer containing gallium nitride.
A semiconductor device according to an embodiment of the present invention includes a glass substrate; A crystalline seed layer formed on the glass substrate; and a semiconductor layer containing gallium nitride and formed through an atomic layer deposition process on the seed layer.

Description

Semiconductor device and manufacturing method thereof {SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME}

The present invention relates to a semiconductor device and a method of manufacturing the same, and more specifically, to a method of manufacturing a semiconductor device having a semiconductor layer containing gallium nitride.

Thin film transistors are used as switching circuits in semiconductor devices and display devices. The active layer of the thin film transistor forms a channel region between the gate electrode, the source electrode, and the drain electrode.

Conventionally, amorphous or crystalline silicon was used as the active layer of thin film transistors. However, when silicon was used as the active layer, there were disadvantages such as relatively slow reaction speed and relatively high power loss. Accordingly, research is being actively conducted to use gallium nitride, which enables fast signal conversion and has a low energy loss rate, as an active layer in a thin film transistor.

To form a gallium nitride thin film, a metal organic chemical vapor deposition (MOCVD) method is generally used. In this organic metal chemical vapor deposition method, a gallium nitride thin film is deposited at a temperature of about 1,000°C or higher. That is, when the substrate is maintained at a high temperature of about 1,000°C or higher, a crystallized gallium nitride thin film can be deposited on the substrate.

However, if a gallium nitride thin film is formed while the substrate is heated to a high temperature, a problem occurs in which damage occurs to the substrate or the thin film formed on the substrate. In particular, glass substrates are damaged at temperatures above 600°C, so glass substrates, which have the advantages of being easy to enlarge and are inexpensive, cannot be used to form a gallium nitride thin film, resulting in an excessive increase in manufacturing costs. .

KR 10-2019-0074774 A

The present invention provides a semiconductor device having a semiconductor layer containing gallium nitride crystallized at low temperature and a method for manufacturing the same.

A semiconductor device according to an embodiment of the present invention includes a glass substrate; A crystalline seed layer formed on the glass substrate; and a semiconductor layer comprising gallium nitride and formed on the seed layer.

The seed layer may have a hexagonal crystal structure.

The seed layer may include zinc oxide.

The seed layer may be formed through an atomic layer deposition process.

Additionally, a method of manufacturing a semiconductor device according to an embodiment of the present invention includes providing a glass substrate in a reaction space; forming a crystalline seed layer on the glass substrate; and forming a semiconductor layer containing gallium nitride on the seed layer.

The seed layer includes zinc oxide, and in forming the seed layer, the seed layer may be formed on the glass substrate through an atomic layer deposition process.

In forming the semiconductor layer, the semiconductor layer may be formed on the seed layer using a chemical vapor deposition process or an atomic layer deposition process.

Forming the semiconductor layer includes forming a first semiconductor layer on the seed layer through an atomic layer deposition process; and forming a second semiconductor layer on the first semiconductor layer through a chemical vapor deposition process.

In the step of forming the semiconductor layer, the semiconductor layer is formed by an atomic layer deposition process of sequentially supplying a raw material gas containing gallium and a reaction gas containing nitrogen to the reaction space, and when supplying the reaction gas, the reaction occurs. Plasma can be formed in space.

In the step of forming the semiconductor layer, the semiconductor layer is formed through an atomic layer deposition process of sequentially supplying a raw material gas containing gallium and a reaction gas containing nitrogen to the reaction space, and after supplying the raw material gas, Plasma may be formed in the reaction space before supplying the reaction gas.

In forming the seed layer and forming the semiconductor layer, the temperature of the reaction space may be maintained at 500°C or lower.

It may further include exposing the semiconductor layer to hydrogen or oxygen plasma.

Before forming the seed layer, the method may further include supplying a gas containing at least one of fluorine and chlorine to the reaction space.

The steps of forming the seed layer and forming the semiconductor layer may be performed in the same chamber.

The steps of forming the seed layer and forming the semiconductor layer may be performed continuously in different chambers.

Additionally, a thin film transistor according to an embodiment of the present invention includes a gate electrode formed on a glass substrate; a gate insulating film formed on the gate electrode; an active layer formed on the gate insulating film, including a crystalline seed layer, and a semiconductor layer containing gallium nitride and formed on the seed layer; and a source electrode and a drain electrode formed on the active layer and spaced apart from each other.

In addition, a thin film transistor according to an embodiment of the present invention includes a source electrode and a drain electrode formed to be spaced apart from each other on a glass substrate; an active layer extending over the source electrode and the drain electrode and including a crystalline seed layer, a semiconductor layer containing gallium nitride and formed on the seed layer; a gate insulating film formed on the active layer; and a gate electrode formed on the gate insulating film.

The seed layer may have a hexagonal crystal structure.

The seed layer may include zinc oxide.

According to an embodiment of the present invention, a semiconductor layer containing gallium nitride crystallized at low temperature can be formed.

That is, according to an embodiment of the present invention, by forming a semiconductor layer on a crystalline seed layer, it is possible to form a semiconductor layer containing gallium nitride crystallized at a low temperature of 500 ° C. or lower without damaging the glass substrate.

In addition, by using the semiconductor layer formed in this way as an active layer, it is possible to manufacture a transistor that enables fast signal conversion and has a low energy loss rate.

1 is a diagram schematically showing a substrate processing apparatus according to an embodiment of the present invention.
2 is a diagram schematically showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.
Figure 3 is a diagram for explaining the process cycle of forming a semiconductor layer according to an embodiment of the present invention.
Figure 4 is a diagram schematically showing a thin film transistor according to an embodiment of the present invention.
Figure 5 is a diagram schematically showing a thin film transistor according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. The embodiments of the present invention only serve to ensure that the disclosure of the present invention is complete and to those of ordinary skill in the art. It is provided to provide complete information.

Throughout the specification, when referring to one component, such as a layer, film, region, or substrate, being located “on” another component, it means that the one component is in direct contact “on” or It can be interpreted that there may be other components intervening in between.

Additionally, relative terms such as “top” or “bottom” may be used herein to describe the relative relationship of some elements to other elements as shown in the figures. Relative terms may be understood as intended to include other orientations of the device in addition to the orientation depicted in the drawings. In order to explain the invention in detail, the drawings may be exaggerated, and like symbols in the drawings refer to like elements.

1 is a diagram schematically showing a substrate processing apparatus according to an embodiment of the present invention.

Referring to FIG. 1, a substrate processing apparatus according to an embodiment of the present invention is an apparatus for depositing a thin film, for example, a thin film containing gallium nitride (GaN), and is provided in a chamber 10 and the chamber 10. A substrate support 20 for supporting the substrate S provided in the chamber 10 is provided in the chamber 10 to face the substrate support 20, and the substrate support 20 is provided in the chamber 10. It includes a gas injection unit 30 for spraying a process gas toward the chamber 10 and an RF power source 50 for supplying power to generate plasma within the chamber 10. Additionally, the substrate processing apparatus may include a gas supply unit 40 that supplies process gas, and may further include a control unit (not shown) that controls the RF power source 50.

The chamber 10 provides a predetermined reaction space and keeps it airtight. The chamber 10 includes a body 12 having a predetermined reaction space including a substantially circular or square planar portion and a side wall extending upward from the plane portion, and a chamber ( It may include a cover 14 that keeps 10) airtight. However, the chamber 10 is not limited to this and may be manufactured in various shapes corresponding to the shape of the substrate S.

An exhaust port (not shown) may be formed in a predetermined area of the lower surface of the chamber 10, and an exhaust pipe (not shown) connected to the exhaust port may be provided on the outside of the chamber 10. Additionally, the exhaust pipe may be connected to an exhaust device (not shown). A vacuum pump such as a turbomolecular pump may be used as an exhaust device. Therefore, the inside of the chamber 10 can be vacuumed to a predetermined reduced pressure atmosphere, for example, a predetermined pressure of 0.1 mTorr or less, by the exhaust device. In addition to the bottom of the chamber 10, the exhaust pipe may be installed on the side of the chamber 10 below the substrate support 20, which will be described later. In addition, of course, in order to reduce the exhaust time, a plurality of exhaust pipes and corresponding exhaust devices may be additionally installed.

Meanwhile, the substrate S provided in the chamber 10 may be seated on the substrate support 20 for a thin film formation process. Here, the substrate S may include an amorphous substrate. Additionally, the substrate S may include a glass substrate. Of course, the substrate S may have a seed layer already formed on the substrate S, or may be provided into the chamber 10 without the seed layer formed. The substrate support unit 20 may be provided with, for example, an electrostatic chuck so that the substrate S can be seated and supported, so that the substrate S can be adsorbed and held by electrostatic force, or the substrate S may be adsorbed and held by vacuum adsorption or mechanical force. ) may be supported.

The substrate support 20 may be provided in a shape corresponding to the shape of the substrate S, for example, circular or square. The substrate support 20 may include a substrate support 22 on which the substrate S is mounted, and an elevator 24 disposed below the substrate support 22 to move the substrate support 22 up and down. Here, the substrate support 22 may be manufactured larger than the substrate S, and the elevator 24 is provided to support at least one area, for example, the center, of the substrate support 22, and is located on the substrate support 22. When the substrate S is seated on the substrate S, the substrate support 22 can be moved to be closer to the gas injection unit 20. Additionally, a heater (not shown) may be installed inside the substrate support. The heater generates heat at a predetermined temperature to heat the substrate support 22 and the substrate S placed on the substrate support 22, thereby allowing a thin film to be deposited uniformly on the substrate S.

At least part of the gas supply unit 40 may be installed outside the chamber 10, and supplies gas to the gas injection unit 30. The gas supply unit 40 may include a raw material gas supply unit for supplying raw material gas and a reaction gas supply unit for supplying a reaction gas. Additionally, the gas supply unit 40 may further include a purge gas supply unit for supplying an inert gas such as argon (Ar) gas or a low-reactivity gas such as nitrogen (N ₂ ) gas. Additionally, the gas supply unit 40 may further include a processing gas supply unit for supplying hydrogen (H ₂ ) gas.

Meanwhile, the gas supply unit 40 does not necessarily supply one gas to the gas injection unit 30, but may be configured to supply a plurality of gases simultaneously or to supply a selected gas among the plurality of gases.

The raw material gas supply unit may be configured to supply a gas containing gallium (Ga) as the raw material gas, and the reactive gas supply unit may supply a gas containing nitrogen (N) as the reactive gas. Here, the raw material gas, that is, the gallium-containing gas, may include trimethyl gallium (TMGa) gas or triethyl gallium (TMGa) gas, and the reactive gas, that is, the gas containing nitrogen (N). may include ammonia (NH ₃ ) gas.

The gas injection unit 30 is provided on the upper side of the chamber 10 and sprays process gas toward the substrate S. The upper side of the gas injection unit 30 is connected to the gas supply unit 40, and a plurality of injection holes (not shown) for spraying the process gas onto the substrate S are formed on the lower side. In this way, inside the gas injection unit 30, a raw material gas supply path for spraying and supplying raw material gas onto the substrate and a reaction gas supply path for spraying and supplying a reaction gas on the substrate are formed. The raw material gas supply path and the reaction gas supply path are formed to be independent and separate from each other, so that the raw material gas and the reaction gas can be separately supplied to the substrate so that they are not mixed within the gas injection unit 30.

The gas injection unit 30 may be manufactured in a shape corresponding to the shape of the substrate S, and may be approximately circular or square. Here, the gas injection unit 30 may be provided at a predetermined distance from the side wall of the chamber 10 and the cover 14. Additionally, when forming plasma in the reaction space within the chamber 10, the gas injection unit 30 may receive power from the RF power source 50 and act as an upper electrode.

The RF power source 50 supplies power to form plasma. That is, the RF power source 50 supplies power to generate plasma in the reaction space within the chamber 10. For example, the RF power source 50 supplies power to either the substrate support 20 or the gas injection unit 30, and the other of the substrate support 20 or the gas injection unit 30 is grounded to support the substrate. Plasma can be formed in the space between the support part 20 and the gas injection part 30.

A semiconductor device according to an embodiment of the present invention can be manufactured using the substrate processing apparatus described above.

Here, the semiconductor device according to an embodiment of the present invention includes a substrate, a crystalline seed layer formed on the substrate, and a semiconductor layer including gallium nitride (GaN) and formed on the seed layer.

The substrate may include various substrates for forming a gallium nitride (GaN) thin film. Meanwhile, the substrate may include an amorphous substrate, for example, a glass substrate. Glass substrates are damaged at temperatures above 600°C, but in embodiments of the present invention, thin films can be deposited at temperatures below 500°C, making it possible to use glass substrates that have the advantage of being easy to enlarge to a large area and being inexpensive.

A seed layer is formed on the substrate to form a gallium nitride (GaN) thin film on the seed layer. Here, the seed layer may include a polycrystalline seed layer having a hexagonal crystal structure. When gallium nitride (GaN) is crystallized into a hexagonal crystal structure, its electron mobility increases, enabling high-speed operation and exhibiting properties that are resistant to high-temperature heat. In order to form such a polycrystalline gallium nitride (GaN) thin film, the seed layer for forming the gallium nitride (GaN) thin film also needs to have the same crystal structure. That is, in order to form a crystalline gallium nitride (GaN) thin film, a seed layer whose crystal lattice is well matched to the gallium nitride (GaN) thin film must be used. Zinc oxide (ZnO) has a hexagonal crystal structure and is prone to crystallization even when deposited at low temperatures. Accordingly, in an embodiment of the present invention, a seed layer containing zinc oxide (ZnO) can be used as a seed layer for forming a gallium nitride (GaN) thin film.

The seed layer may be formed using a chemical vapor deposition (CVD) process or an atomic layer deposition (ALD) process. For example, the seed layer can be formed through an atomic layer deposition process. The atomic layer deposition process forms a thin film on an atomic layer basis and supplies energy, so a crystalline seed layer can be formed more effectively.

The semiconductor layer contains gallium nitride (GaN) and is formed on the seed layer. To form a gallium nitride (GaN) thin film, conventionally, a semiconductor layer containing gallium nitride (GaN) was formed directly on a substrate using a metal organic chemical vapor deposition (MOCVD) method. However, in this case, since the gallium nitride (GaN) thin film crystallizes at a temperature of about 1,000°C or higher, there was a problem in that a glass substrate that was damaged at a temperature of 600°C or higher could not be used. Accordingly, in an embodiment of the present invention, a crystalline seed layer is first formed to crystallize gallium nitride (GaN) at a temperature of 500° C. or lower without damaging the glass substrate, and gallium nitride (GaN) is formed on the crystalline seed layer. A semiconductor layer containing

The semiconductor layer may further include a dopant in addition to gallium nitride (GaN). The semiconductor layer needs to be formed as a p-type semiconductor layer or an n-type semiconductor layer depending on the type. Accordingly, in order to form the semiconductor layer as a p-type semiconductor layer, the semiconductor layer may include gallium nitride (GaN) and a p-type dopant. Here, the p-type dopant may include Group 2 elements such as zinc (Zn) and magnesium (Mg), or Group 6 elements such as oxygen (O), sulfur (S), and phosphorus (P). Additionally, in order to form the semiconductor layer as an n-type semiconductor layer, the semiconductor layer may include gallium nitride (GaN) and an n-type dopant. Here, the n-type dopant may include a Group 4 element such as silicon (Si) or germanium (Ge).

FIG. 2 is a diagram schematically showing a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a diagram illustrating a process cycle of forming a semiconductor layer according to an embodiment of the present invention.

2 and 3, the method of manufacturing a semiconductor device according to an embodiment of the present invention includes providing a substrate in a reaction space (S100) and forming a crystalline seed layer on the substrate (S200). and forming a semiconductor layer containing gallium nitride on the seed layer (S300).

In the step of preparing a substrate (S100), the substrate is prepared by introducing it into the reaction space of the chamber 10. The substrate brought into the process space may be seated on the substrate support unit 20. Here, as described above, the substrate may include an amorphous substrate for forming a semiconductor layer containing gallium nitride, for example, a glass substrate. Additionally, the step of preparing a substrate (S100) may be performed by bringing in a substrate on which a predetermined functional layer is formed. For example, in the step of preparing a substrate (S100), the substrate is prepared by bringing in a substrate on which a gate electrode is formed on the upper surface and a gate insulating film is formed on the substrate and the gate electrode to cover the gate electrode. It can also be prepared by bringing in a substrate in which the electrode and the drain electrode are spaced apart from each other. Here, the substrate supporter 20 may be provided with, for example, an electrostatic chuck so that the substrate can be seated and supported, and may adsorb and hold the substrate by electrostatic force, or may support the substrate by vacuum suction or mechanical force.

In the step of forming a seed layer (S200), a crystalline seed layer is formed on the substrate. Here, the seed layer may include a polycrystalline seed layer having a hexagonal crystal structure. In this case, the seed layer may include zinc oxide (ZnO) whose crystal lattice matches well with the gallium nitride (GaN) thin film.

In the step of forming a seed layer (S200), the seed layer may be formed on the substrate using a chemical vapor deposition process or an atomic layer deposition process. That is, in the step of forming the seed layer (S200), the seed layer may be formed through a chemical vapor deposition process in which a raw material gas containing zinc (Zn) and a reactive gas containing oxygen (O) are simultaneously supplied. On the other hand, in the step of forming the seed layer (S200), the seed layer can be formed through an atomic layer deposition process in which a raw material gas containing zinc (Zn) and a reaction gas containing oxygen (O) are sequentially supplied. When forming a seed layer containing zinc oxide (ZnO) through a chemical vapor deposition process, the seed layer can be formed to a thickness of 500 Å or more. This is because when forming a seed layer containing zinc oxide (ZnO) through a chemical vapor deposition process, crystals of zinc oxide (ZnO) may be generated at a thickness of 500 to 600 Å. On the other hand, when forming a seed layer containing zinc oxide (ZnO) using an atomic layer deposition process, the seed layer can be formed to a thickness of 50 Å or more. This is because the atomic layer deposition process forms a thin film on an atomic layer basis and supplies energy, so zinc oxide (ZnO) crystals can be generated at a thickness of 50 to 100 Å faster than the chemical vapor deposition process.

In contrast, forming a seed layer (S200) includes forming a first seed layer on a substrate by an atomic layer deposition process and forming a second seed layer on the first seed layer by a chemical vapor deposition process. may include. In this way, in the seed layer forming step (S200), when the first seed layer is formed by an atomic layer deposition process and the second seed layer is formed by a chemical vapor deposition process, zinc oxide (ZnO) is rapidly crystallized and At the same time, it is possible to form a seed layer containing zinc oxide (ZnO) with a sufficient thickness.

Before forming the semiconductor layer (S300), a step of supplying a gas containing at least one of fluorine (F) and chlorine (Cl) to the reaction space of the chamber 10 may be performed. After forming the seed layer on the substrate, residual material generated in the seed layer forming step (S200) may exist on the seed layer. Additionally, in order to stably form a semiconductor layer on a seed layer, it is necessary to clean up the surface by etching a portion of the formed seed layer. Accordingly, the method of manufacturing a semiconductor device according to an embodiment of the present invention supplies a gas containing fluorine (F) to the reaction space after forming the seed layer (S200) and before forming the semiconductor layer (S300). Alternatively, a high-quality semiconductor layer can be formed in a subsequent process by supplying a gas containing chlorine (Cl), or supplying a gas containing fluorine (F) and chlorine (Cl).

In the step of forming a semiconductor layer (S300), a semiconductor layer containing gallium nitride (GaN) is formed on a crystalline seed layer. Here, the semiconductor layer containing gallium nitride (GaN) may form at least a portion of the active layer of a thin film transistor (TFT) used as a switching circuit in a semiconductor device or display device. For example, the semiconductor layer may form a channel region between the gate electrode, source electrode, and drain electrode of the thin film transistor.

In an embodiment of the present invention, the step of forming the semiconductor layer (S300) can be performed in a low temperature process of 500°C or lower. That is, the step S300 of forming the semiconductor layer may be performed by controlling the temperature of the process space of the chamber 10 to 200°C or higher and 500°C or lower. The semiconductor layer containing gallium nitride (GaN) may be formed at a low temperature of 200°C to 500°C by at least one of a chemical vapor deposition process and an atomic layer deposition process, which will be described in more detail below.

In the step of forming a semiconductor layer (S300), a semiconductor layer containing gallium nitride (GaN) may be formed on a crystalline seed layer using a chemical vapor deposition process or an atomic layer deposition process. In contrast, the step of forming a semiconductor layer (S300) includes forming a first semiconductor layer by an atomic layer deposition process on a crystalline seed layer and forming a second semiconductor layer by a chemical vapor deposition process on the first semiconductor layer. It may include steps to: In this way, when the first semiconductor layer is formed through an atomic layer deposition process and the second semiconductor layer is formed through a chemical vapor deposition process, gallium nitride (GaN) is quickly crystallized on the crystalline seed layer and at the same time, the crystalline layer is formed to a sufficient thickness. It is possible to form a semiconductor layer containing gallium nitride (GaN).

In this way, the step of forming the semiconductor layer (S300) may be performed by forming at least a portion of the semiconductor layer through an atomic layer deposition process. In this case, the step of forming the semiconductor layer (S300) may be performed by using a raw material gas containing gallium in the reaction space. It may include the steps of supplying, purging the reaction space to which the raw material gas is supplied, supplying a reaction gas containing nitrogen to the reaction space, and purging the reaction space to which the reaction gas is supplied. .

In the step of supplying the raw material gas, the raw material gas containing gallium is supplied to the substrate. Here, in the step of supplying the raw material gas, the raw material gas containing gallium is supplied to the substrate through the raw material gas supply path of the above-described substrate processing apparatus. At this time, the raw material gas containing gallium may include trimethyl gallium (TMGa) gas or triethyl gallium (TEGa) gas containing gallium as a main component. In the step of supplying the raw material gas, the raw material gas containing gallium is sprayed onto the substrate and adsorbed.

Meanwhile, a step of supplying a dopant gas on the substrate may be performed simultaneously with the step of supplying the raw material gas or after the step of supplying the raw material gas. As described above, the semiconductor layer containing gallium nitride (GaN) needs to be formed as a p-type semiconductor layer or an n-type semiconductor layer depending on the type. Accordingly, a step of supplying a p-type dopant gas or a step of supplying an n-type dopant gas may be performed on the substrate simultaneously with the step of supplying the source gas or after the step of supplying the source gas. The dopant gas may be supplied through at least one of a raw material gas supply path and a reaction gas supply path, where the p-type dopant gas is a group 2 element such as zinc (Zn) or magnesium (Mg), or oxygen (O). , may be a gas containing Group 6 elements such as sulfur (S) and phosphorus (P), and the n-type dopant gas may be a gas containing Group 4 elements such as silicon (Si) and germanium (Ge). In this way, a p-type semiconductor layer or an n-type semiconductor layer can be formed by supplying a p-type dopant gas or an n-type dopant gas at the same time as the step of supplying the source gas or after the step of supplying the source gas.

After supplying the raw material gas, a step of purging the reaction space to which the raw material gas has been supplied may be performed. In the step of purging the reaction space where the raw material gas is supplied, the raw material gas remaining in the reaction space of the chamber 10 can be removed. This can be achieved by supplying an inert gas, for example, argon (Ar) gas, to the reaction space, and the argon (Ar) gas can be supplied through at least one of the raw material gas supply path and the reaction gas supply path.

After supplying the raw material gas, a step of forming plasma in the reaction space may be performed. In this case, plasma of argon gas (Ar) can be formed by applying the RF power 50 in the step of purging the reaction space, and plasma can also be formed in the reaction space before or after the step of purging the reaction space. Of course. When forming plasma before or after the step of purging the reaction space, hydrogen (H ₂ ) gas or oxygen (O ₂ ) gas is supplied to the reaction space through the above-described processing gas supply unit, and RF power 50 is applied. It can be performed by doing this. In addition, of course, argon (Ar) gas may be supplied to the reaction space separately from the purge gas, and the RF power source 50 may be applied. In this way, when the substrate is exposed to plasma after supplying the raw material gas, the stress of the thin film can be controlled and the film quality can be improved.

After the step of purging the reaction space where the raw material gas is supplied, the step of supplying the reaction gas is performed. In the step of supplying a reaction gas, a reaction gas containing nitrogen is supplied onto the substrate. Here, in the step of supplying the reaction gas, the reaction gas containing nitrogen is supplied to the substrate through the reaction gas supply path of the above-described substrate processing apparatus. At this time, the reaction gas containing nitrogen may include ammonia (NH ₃ ) gas containing nitrogen as a main component. When a reaction gas is supplied to the substrate on which the raw material is adsorbed, the raw material reacts with the reaction material contained in the reaction gas.

At this time, in the step of supplying the reaction gas (S240), the RF power 50 may be applied to the reaction space to activate the reaction gas and generate plasma in order to effectively react the nitrogen component with the gallium component. That is, when supplying the reaction gas, plasma can be formed in the reaction space of the chamber 10. At this time, forming the semiconductor layer may further include applying power to form plasma in the reaction space, where at least part of the step of supplying the reaction gas includes forming plasma in the reaction space. It can be performed while power is being applied. That is, at least a portion of the section in which the step of supplying the reaction gas is performed may overlap with the section in which power for forming plasma is applied to the reaction space. In FIG. 3, the RF power 50 is shown to be applied to the reaction space only in the step of supplying the reaction gas, but the step of applying the RF power 50 to the reaction space is performed while the step of supplying the reaction gas is performed. This includes all cases of applying the RF power 50, where the RF power 50 is applied before starting the supply of the reaction gas to the reaction space or after the supply of the reaction gas to the reaction space is terminated, or Of course, the RF power 50 may be applied intermittently, that is, in pulse form, while the reaction gas is supplied.

In this way, in the step of supplying the reaction gas, the supplied nitrogen-containing gas is activated by nitrogen radicals to react with the gallium component, and a semiconductor layer containing gallium nitride (GaN) is formed on the substrate. It can be formed at low processing temperatures. That is, when the reaction gas is activated and supplied on the substrate, the step of forming the semiconductor layer (S300) can be performed by controlling the process space of the chamber 10 to a low temperature of 200°C or higher and 500°C or lower.

After supplying the reaction gas, a step of purging the reaction space to which the reaction gas has been supplied may be performed. In the step of purging the reaction space where the reaction gas is supplied, the reaction gas remaining in the reaction space of the chamber 10 may be removed. Similar to the step of purging the raw material gas, the step of purging the reaction gas may be performed by supplying an inert gas, for example, argon (Ar) gas, to the reaction space, and the argon (Ar) gas may be supplied through the raw material gas supply path and As described above, the reaction gas can be supplied through at least one of the supply paths.

Here, the step of forming a semiconductor layer according to an embodiment of the present invention (S300) is a process including supplying raw material gas, purging the raw material gas, supplying reaction gas, and purging the reaction gas. The cycle can be performed multiple times. That is, the step of forming a semiconductor layer (S300) includes supplying raw material gas, purging the raw material gas, supplying the reaction gas, and purging the reaction gas to form one process cycle, and the process The cycle may be repeatedly performed until a semiconductor layer containing gallium nitride (GaN) of a desired thickness is formed on the substrate.

Meanwhile, the method of manufacturing a semiconductor device according to an embodiment of the present invention may further include exposing the semiconductor layer to hydrogen or oxygen plasma after forming the semiconductor layer (S300). The step of exposing the semiconductor layer to hydrogen or oxygen plasma includes, for example, supplying hydrogen (H ₂ ) gas or oxygen (O ₂ ) gas to the reaction space through the above-described processing gas supply unit and applying RF power 50. It can be performed by doing this. In addition, of course, in addition to hydrogen (H ₂ ) gas or oxygen (O ₂ ) gas, argon (Ar) gas or helium (He) gas, which are inert gases, can also be used.

When the semiconductor layer is exposed to hydrogen or oxygen plasma in the step of exposing the semiconductor layer to hydrogen or oxygen plasma, the semiconductor layer containing amorphous gallium nitride (GaN) may be crystallized. The semiconductor layer may be deposited on the seed layer in an amorphous state. When the semiconductor layer is exposed to hydrogen or oxygen plasma as in an embodiment of the present invention, the semiconductor layer containing amorphous gallium nitride (GaN) is converted into a single crystal. Alternatively, it can be crystallized to have a polycrystalline structure. In addition, if hydrogen or oxygen plasma is formed in the reaction space to expose the semiconductor layer to hydrogen or oxygen plasma, the stress of the thin film can be adjusted and impurities remaining in the chamber 10 or contained in the semiconductor layer can be removed. Of course, it is also possible to effectively remove impurities.

In the above, the formation of a crystalline seed layer and a semiconductor layer on a substrate in-situ in the same chamber using the above-described substrate processing apparatus has been described, but embodiments of the present invention are not limited thereto. . That is, of course, the process of forming a crystalline seed layer on a substrate and the process of forming a semiconductor layer on the crystalline seed layer may be performed continuously in different chambers. In this case, the process of forming a crystalline seed layer may be performed by a sputtering process, and the process of forming a semiconductor layer may be performed by introducing a substrate on which a crystalline seed layer is formed by a sputtering process into the above-described substrate processing apparatus and performing atomic layer deposition. It can be performed by a process. In addition, of course, when the process of forming a crystalline seed layer and the process of forming a semiconductor layer are performed using chemical vapor deposition or atomic layer deposition, each process may be performed continuously in different chambers.

FIG. 4 is a diagram schematically showing a thin film transistor according to an embodiment of the present invention, and FIG. 5 is a diagram schematically showing a thin film transistor according to another embodiment of the present invention.

Referring to FIG. 4, the thin film transistor according to an embodiment of the present invention is a bottom gate type thin film transistor, and includes a gate electrode 110 formed on a substrate 100, and a gate electrode 110 on the gate electrode 110. A gate insulating film 120 formed on the gate insulating film 120, an active layer including a crystalline seed layer 130 and a semiconductor layer 140 formed on the seed layer 130, and the active layer It includes a source electrode 150a and a drain electrode 150b formed to be spaced apart from each other.

As described above, the substrate 100 may include an amorphous substrate and, for example, may include a glass substrate.

The gate electrode 110 can be formed using a conductive material, for example, aluminum (Al), neodymium (Nd), silver (Ag), chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum. It may be formed of at least one metal selected from (Mo) and copper (Cu) or an alloy containing these metals. Additionally, the gate electrode 110 can be formed not only as a single layer but also as a multi-layer composed of a plurality of metal layers. That is, metal layers such as chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum (Mo), which have excellent physical and chemical properties, and aluminum (Al) series, silver (Ag) series, or copper (Cu) series with low resistivity. It can also be formed as a double layer containing a metal layer.

The gate insulating film 120 is formed on the gate electrode 110. That is, the gate insulating film 120 may be formed on the substrate 100 including the top and sides of the gate electrode 110. The gate insulating film 120 is made of silicon oxide (SiO ₂ ), silicon nitride (SiN), high-K dielectric, and aluminum oxide (Al ₂ O ₃ ), which have excellent adhesion to metal materials and excellent insulating voltage. It can be formed as a thin film using one or more insulating materials. Here, the high-K dielectric is a dielectric having a higher dielectric constant than silicon oxide (SiO ₂ ) and may include hafnium oxide (HfO ₂ ), zirconium oxide (ZrO ₂ ), etc.

The active layer is formed on the gate insulating film 120, and at least a portion thereof overlaps the gate electrode 110. The active layer may include a crystalline seed layer 130 and a semiconductor layer 140 containing gallium nitride. As described above, this active layer forms a seed layer 130 containing crystallized zinc oxide (ZnO) having a hexagonal crystal structure by at least one of an atomic layer deposition process and a chemical vapor deposition process, and the seed layer 130 The semiconductor layer 140 including crystallized gallium nitride (GaN) having a hexagonal crystal structure is formed on the semiconductor layer 140 using at least one of an atomic layer deposition process and a chemical vapor deposition process.

The source electrode 150a and the drain electrode 150b are formed on the active layer, more specifically, on the crystalline semiconductor layer 140 in the active layer, and partially overlap with the gate electrode 110, with the gate electrode 110 sandwiched between them. The source electrode 150a and the drain electrode 150b may be formed to be spaced apart from each other. The source electrode 150a and the drain electrode 150b can be formed through the same process using the same material, and can be formed using a conductive material, for example, aluminum (Al), neodymium (Nd), or silver. It may be formed of at least one metal selected from (Ag), chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum (Mo), or an alloy containing these metals. That is, it can be formed of the same material as the gate electrode 110, but can also be formed of a different material. In addition, of course, the source electrode 150a and the drain electrode 150b can be formed not only as a single layer but also as a multilayer of multiple metal layers.

Figure 5 is a diagram schematically showing a thin film transistor according to another embodiment of the present invention. A thin film transistor according to another embodiment of the present invention is a top gate type thin film transistor, which includes a source electrode 150a and a drain electrode 150b formed on a substrate 100 to be spaced apart from each other, and the source electrode ( 150a) and an active layer extending on the drain electrode 150b and including a crystalline seed layer 130 and a semiconductor layer 140 formed on the seed layer 130, and a gate insulating film formed on the active layer. It may include (120) and a gate electrode 110 formed on the gate insulating film 120.

Even in the case of such a top gate type thin film transistor, the content described above with respect to FIG. 4 can be applied as is. That is, in the case of a thin film transistor according to another embodiment of the present invention, the active layer is connected to the source electrode (150a) by a portion formed on the exposed area of the substrate 100 between the source electrode (150a) and the drain electrode (150b). It is formed on the drain electrode 150b) and may include a crystalline seed layer 130 and a semiconductor layer 140 containing gallium nitride and formed on the seed layer 130. As described above, this active layer forms a seed layer 130 containing crystallized zinc oxide (ZnO) having a hexagonal crystal structure by at least one of an atomic layer deposition process and a chemical vapor deposition process, and the seed layer 130 As described above, the semiconductor layer 140 including crystallized gallium nitride (GaN) having a hexagonal crystal structure can be formed on the semiconductor layer 140 using at least one of an atomic layer deposition process and a chemical vapor deposition process. In the case of the thin film transistor according to another embodiment of the present invention, only the stacking order is different, and the content described in the thin film transistor according to the above-described embodiment of the present invention can be applied as is, so redundant description is omitted. I decided to do it.

In this way, a semiconductor layer containing gallium nitride crystallized at low temperature can be formed.

That is, according to an embodiment of the present invention, by forming a semiconductor layer on a crystalline seed layer, it is possible to form a semiconductor layer containing gallium nitride crystallized at a low temperature of 500 ° C. or lower without damaging the glass substrate.

In addition, by using the semiconductor layer formed in this way as an active layer, it is possible to manufacture a transistor that enables fast signal conversion and has a low energy loss rate.

In the above, preferred embodiments of the present invention have been described and illustrated using specific terms, but such terms are only for clearly describing the present invention, and the embodiments of the present invention and the described terms are in accordance with the technical spirit of the following claims. It is obvious that various changes and changes can be made without departing from the scope. These modified embodiments should not be understood individually from the spirit and scope of the present invention, but should be regarded as falling within the scope of the claims of the present invention.

10: Chamber 20: Substrate support
30: gas injection unit 40: gas supply unit
50: RF power 100: substrate
110: gate electrode 120: gate insulating film
130: seed layer 140: semiconductor layer
150a: source electrode 150b: drain electrode

Claims (19)

glass substrate;
A crystalline seed layer formed on the glass substrate; and
A semiconductor device comprising: a semiconductor layer comprising gallium nitride and formed on the seed layer. In claim 1,
The seed layer is a semiconductor device having a hexagonal crystal structure. In claim 2,
The seed layer is a semiconductor device containing zinc oxide. In claim 1,
The seed layer is a semiconductor device formed through an atomic layer deposition process. providing a glass substrate in the reaction space;
forming a crystalline seed layer on the glass substrate; and
A method of manufacturing a semiconductor device comprising: forming a semiconductor layer containing gallium nitride on the seed layer. In claim 5,
The seed layer includes zinc oxide,
The step of forming the seed layer is,
A method of manufacturing a semiconductor device in which a seed layer is formed on the glass substrate by an atomic layer deposition process. In claim 5,
The step of forming the semiconductor layer is,
A method of manufacturing a semiconductor device in which a semiconductor layer is formed on the seed layer by a chemical vapor deposition process or an atomic layer deposition process. In claim 5,
The step of forming the semiconductor layer is,
forming a first semiconductor layer on the seed layer through an atomic layer deposition process; and
A method of manufacturing a semiconductor device comprising: forming a second semiconductor layer on the first semiconductor layer through a chemical vapor deposition process. In claim 5,
The step of forming the semiconductor layer is,
Forming a semiconductor layer through an atomic layer deposition process in which a raw material gas containing gallium and a reaction gas containing nitrogen are sequentially supplied to the reaction space,
A method of manufacturing a semiconductor device that forms plasma in the reaction space when supplying the reaction gas. In claim 5,
The step of forming the semiconductor layer is,
Forming a semiconductor layer through an atomic layer deposition process in which a raw material gas containing gallium and a reaction gas containing nitrogen are sequentially supplied to the reaction space,
A method of manufacturing a semiconductor device in which plasma is formed in the reaction space after supplying the raw material gas and before supplying the reaction gas. In claim 5,
Forming the seed layer and forming the semiconductor layer include:
A method of manufacturing a semiconductor device that maintains the temperature of the reaction space below 500°C. In claim 5,
A method of manufacturing a semiconductor device further comprising exposing the semiconductor layer to hydrogen or oxygen plasma. In claim 5,
Before forming the semiconductor layer,
The method of manufacturing a semiconductor device further comprising supplying a gas containing at least one of fluorine and chlorine to the reaction space. In claim 5,
The steps of forming the seed layer and forming the semiconductor layer include:
A method of manufacturing a semiconductor device performed in the same chamber. In claim 5,
The steps of forming the seed layer and forming the semiconductor layer include:
A method of manufacturing semiconductor devices performed continuously in different chambers. A gate electrode formed on a glass substrate;
a gate insulating film formed on the gate electrode;
an active layer formed on the gate insulating film, including a crystalline seed layer, and a semiconductor layer containing gallium nitride and formed on the seed layer; and
A thin film transistor including a source electrode and a drain electrode formed on the active layer and spaced apart from each other. A source electrode and a drain electrode formed on a glass substrate and spaced apart from each other;
an active layer extending over the source electrode and the drain electrode and including a crystalline seed layer, a semiconductor layer containing gallium nitride and formed on the seed layer;
a gate insulating film formed on the active layer; and
A thin film transistor including a gate electrode formed on the gate insulating film. The method of claim 16 or 17,
The seed layer is a thin film transistor having a hexagonal crystal structure. In claim 18,
The seed layer is a thin film transistor containing zinc oxide.

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