KR20240076814A - 메모리 물리적 어드레스 매핑의 동적 재분할 - Google Patents
메모리 물리적 어드레스 매핑의 동적 재분할 Download PDFInfo
- Publication number
- KR20240076814A KR20240076814A KR1020247014140A KR20247014140A KR20240076814A KR 20240076814 A KR20240076814 A KR 20240076814A KR 1020247014140 A KR1020247014140 A KR 1020247014140A KR 20247014140 A KR20247014140 A KR 20247014140A KR 20240076814 A KR20240076814 A KR 20240076814A
- Authority
- KR
- South Korea
- Prior art keywords
- memory
- physical
- data
- processing system
- map
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0607—Interleaved addressing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/0644—Management of space entities, e.g. partitions, extents, pools
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1016—Performance improvement
- G06F2212/1024—Latency reduction
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1056—Simplification
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7201—Logical to physical mapping or translation of blocks or pages
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7204—Capacity control, e.g. partitioning, end-of-life degradation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7206—Reconfiguration of flash memory system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7207—Details relating to flash memory management management of metadata or control data
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7208—Multiple device management, e.g. distributing data over multiple flash devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Quality & Reliability (AREA)
- Computer Security & Cryptography (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Memory System (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US17/487,247 | 2021-09-28 | ||
| US17/487,247 US11687251B2 (en) | 2021-09-28 | 2021-09-28 | Dynamic repartition of memory physical address mapping |
| PCT/US2022/044099 WO2023055610A1 (en) | 2021-09-28 | 2022-09-20 | Dynamic repartition of memory physical address mapping |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20240076814A true KR20240076814A (ko) | 2024-05-30 |
Family
ID=85718196
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020247014140A Pending KR20240076814A (ko) | 2021-09-28 | 2022-09-20 | 메모리 물리적 어드레스 매핑의 동적 재분할 |
Country Status (6)
| Country | Link |
|---|---|
| US (3) | US11687251B2 (https=) |
| EP (1) | EP4409391A4 (https=) |
| JP (1) | JP2024533592A (https=) |
| KR (1) | KR20240076814A (https=) |
| CN (1) | CN118251651A (https=) |
| WO (1) | WO2023055610A1 (https=) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119003231B (zh) * | 2022-04-19 | 2025-06-24 | 华为技术有限公司 | 数据写入方法以及处理系统 |
| TWI808010B (zh) * | 2022-09-26 | 2023-07-01 | 慧榮科技股份有限公司 | 資料處理方法及對應之資料儲存裝置 |
| US12197266B2 (en) * | 2022-11-22 | 2025-01-14 | Gopro, Inc. | Dynamic power allocation for memory using multiple interleaving patterns |
| US20240272821A1 (en) * | 2023-02-14 | 2024-08-15 | Memryx Incorporated | Core group memory processsing chip design |
| KR20260037161A (ko) * | 2023-07-21 | 2026-03-17 | 마이크론 테크놀로지, 인크. | 호스트 구성 가능한 기본 데이터 관리 유닛 |
| US12373362B2 (en) * | 2023-08-01 | 2025-07-29 | Primemas Inc. | Semiconductor device and method of building a pooled memory without using switches |
| CN117389486B (zh) * | 2023-12-13 | 2024-04-19 | 浙江国利信安科技有限公司 | 用于实时处理epa网络数据的方法、计算设备和存储介质 |
| US20260086935A1 (en) * | 2024-09-25 | 2026-03-26 | Micron Technology, Inc. | Disaggregated Host Memory Buffer Implemented via Random Access Memory Connected via Computer Express Link Fabric |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003202998A (ja) * | 2002-01-07 | 2003-07-18 | Nec Corp | 自動資源分割型情報処理装置、自動資源分割方法 |
| US20040088513A1 (en) * | 2002-10-30 | 2004-05-06 | Biessener David W. | Controller for partition-level security and backup |
| US8301938B2 (en) | 2005-03-21 | 2012-10-30 | Hewlett-Packard Development Company, L.P. | Managing memory health |
| KR100937429B1 (ko) * | 2008-02-04 | 2010-01-18 | 엘지전자 주식회사 | 신호 송수신 방법 및 신호 송수신 장치 |
| US8127185B2 (en) | 2009-01-23 | 2012-02-28 | Micron Technology, Inc. | Memory devices and methods for managing error regions |
| US8612718B2 (en) * | 2009-08-19 | 2013-12-17 | Seagate Technology Llc | Mapping alignment |
| US8156304B2 (en) | 2009-12-04 | 2012-04-10 | Oracle International Corporation | Dynamic data storage repartitioning |
| US8356137B2 (en) | 2010-02-26 | 2013-01-15 | Apple Inc. | Data storage scheme for non-volatile memories based on data priority |
| US8375174B1 (en) | 2010-03-29 | 2013-02-12 | Emc Corporation | Techniques for use with memory partitioning and management |
| CN103262054B (zh) * | 2010-12-13 | 2015-11-25 | 桑迪士克科技股份有限公司 | 用于自动提交存储器的装置、系统和方法 |
| US9530466B1 (en) * | 2014-01-14 | 2016-12-27 | Marvell International Llc. | System and method for memory access dynamic mode switching |
| US10360155B1 (en) * | 2018-04-05 | 2019-07-23 | Western Digital Technologies, Inc. | Multi-tier memory management |
| US11340909B2 (en) * | 2019-07-23 | 2022-05-24 | Vmware, Inc. | Constructing a UEFI bootloader handoff address space for a physical machine hosting virtual machines |
| CN113296886B (zh) * | 2021-03-31 | 2025-07-11 | 阿里巴巴创新公司 | 虚拟机内存管理方法、装置及系统、物理机 |
-
2021
- 2021-09-28 US US17/487,247 patent/US11687251B2/en active Active
-
2022
- 2022-09-20 JP JP2024517033A patent/JP2024533592A/ja active Pending
- 2022-09-20 WO PCT/US2022/044099 patent/WO2023055610A1/en not_active Ceased
- 2022-09-20 CN CN202280062560.2A patent/CN118251651A/zh active Pending
- 2022-09-20 EP EP22877144.0A patent/EP4409391A4/en active Pending
- 2022-09-20 KR KR1020247014140A patent/KR20240076814A/ko active Pending
-
2023
- 2023-06-12 US US18/208,639 patent/US12436684B2/en active Active
-
2025
- 2025-09-09 US US19/322,950 patent/US20260072599A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US12436684B2 (en) | 2025-10-07 |
| EP4409391A4 (en) | 2025-08-13 |
| WO2023055610A1 (en) | 2023-04-06 |
| US20260072599A1 (en) | 2026-03-12 |
| EP4409391A1 (en) | 2024-08-07 |
| US20230384947A1 (en) | 2023-11-30 |
| JP2024533592A (ja) | 2024-09-12 |
| CN118251651A (zh) | 2024-06-25 |
| US11687251B2 (en) | 2023-06-27 |
| US20230097344A1 (en) | 2023-03-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR20240076814A (ko) | 메모리 물리적 어드레스 매핑의 동적 재분할 | |
| US11567917B2 (en) | Writing data and metadata into storage | |
| US11409437B2 (en) | Persisting configuration information | |
| US8447918B2 (en) | Garbage collection for failure prediction and repartitioning | |
| US9836409B2 (en) | Seamless application access to hybrid main memory | |
| AU2010234648B2 (en) | Method and apparatus for storing data in a flash memory data storage device | |
| US9811456B2 (en) | Reliable wear-leveling for non-volatile memory and method therefor | |
| US9747158B1 (en) | Intelligent refresh of 3D NAND | |
| KR20150105323A (ko) | 데이터 스토리지 방법 및 시스템 | |
| US20080235477A1 (en) | Coherent data mover | |
| KR20180002259A (ko) | 계층적 플래시 변환 레이어 구조 및 그 설계 방법 | |
| US11409451B2 (en) | Systems, methods, and storage media for using the otherwise-unutilized storage space on a storage device | |
| KR20200121372A (ko) | 하이브리드 메모리 시스템 | |
| CN110928487A (zh) | 存储装置和存储装置的操作方法 | |
| US9971537B1 (en) | Hardware support to track and transition flash LUNs into SLC mode | |
| KR20200117032A (ko) | 하이브리드 메모리 시스템 | |
| US7330955B2 (en) | Recovery record for updating a system configuration | |
| CN107636599B (zh) | 当单个输入/输出请求跨越两个存储设备时响应于存储设备故障返回相干数据 | |
| EP4120087B1 (en) | Systems, methods, and devices for utilization aware memory allocation |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
|
| E13-X000 | Pre-grant limitation requested |
St.27 status event code: A-2-3-E10-E13-lim-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| P11 | Amendment of application requested |
Free format text: ST27 STATUS EVENT CODE: A-2-2-P10-P11-NAP-X000 (AS PROVIDED BY THE NATIONAL OFFICE) |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |