KR20240065735A - Display device - Google Patents

Abstract

The present invention includes a substrate including a plurality of sub-pixels, a first electrode formed on each of the plurality of sub-pixels, a bank and a light-emitting layer formed on the first electrode, and a second electrode formed on the bank and the light-emitting layer, Each of the plurality of sub-pixels includes first and second light-emitting regions that emit different lights, and in each of the plurality of sub-pixels, the first light-emitting layer is formed only in one of the first and second light-emitting regions. to provide.

Description

Display device {DISPLAY DEVICE}

The present invention relates to a display device.

As the information society develops, the demand for display devices for displaying images is increasing in various forms. Accordingly, recently, various display devices such as liquid crystal display (LCD), plasma display panel (PDP), and electroluminescence display (ELD) have been used. Additionally, the electroluminescent display device may include a display device such as an organic light emitting display (OLED) and a quantum dot light emitting display (QLED).

Among display devices, electroluminescent displays are self-luminous and have superior viewing angles and contrast ratios compared to liquid crystal displays (LCDs). They do not require a separate backlight, so they can be lightweight and thin, and have the advantage of low power consumption. . In addition, electroluminescent displays have the advantage of being capable of driving at low direct current voltages, having a fast response speed, and especially low manufacturing costs.

Meanwhile, conventionally, it has been disclosed to form a light emitting layer of a light emitting device in each sub-pixel through a solution process. In this case, during the solution process, in order to prevent the solutions formed in each sub-pixel between neighboring sub-pixels from mixing with each other, the width of the bank formed between neighboring sub-pixels needs to be maintained at a certain level. Accordingly, a problem occurs in which the aperture ratio decreases.

The purpose of the present invention is to provide a display device with an improved aperture ratio.

In order to achieve the object, the present invention provides a substrate including a plurality of sub-pixels, a first electrode formed on each of the plurality of sub-pixels, a bank and a light-emitting layer formed on the first electrode, and a first electrode formed on the bank and the light-emitting layer. It includes two electrodes, and each of the plurality of sub-pixels includes first and second light-emitting regions that emit different lights, and in each of the plurality of sub-pixels, the first light-emitting layer is located in one of the first and second light-emitting regions. Only formed, provided display devices.

According to the present invention, there is an effect of improving the aperture ratio by forming a sub-pixel in which a plurality of light-emitting areas having different light-emitting layers are arranged.

1 is a plan view of a display device according to an embodiment of the present invention.
Figure 2 is a cross-sectional view corresponding to line II' of a display device according to an embodiment of the present invention.
Figure 3 is a cross-sectional view of a light-emitting element of a display device according to an embodiment of the present invention.
Figure 4 is a cross-sectional view corresponding to line II-II' of a display device according to an embodiment of the present invention.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. These embodiments only serve to ensure that the disclosure of the present invention is complete and that common knowledge in the technical field to which the present invention pertains is not limited. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. In cases where a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

In the case of a description of a temporal relationship, for example, if a temporal relationship is described as 'after', 'successfully after', 'after', 'before', etc., 'immediately' or 'directly' Unless used, non-consecutive cases may also be included.

Although first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

Each feature of the various embodiments of the present invention can be combined or combined with each other partially or entirely, and various technical interconnections and operations are possible, and each embodiment can be implemented independently of each other or together in a related relationship. It may be possible.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

1 is a plan view of a display device according to an embodiment of the present invention.

Referring to FIG. 1, a display device according to an embodiment of the present invention may include first to third sub-pixels (P1-P3). Figure 1 shows that the first to third sub-pixels (P1-P3) are arranged in the horizontal direction, but the present invention is not limited thereto. The first to third sub-pixels (P1-P3) may be arranged in a vertical direction. Each of the first to third sub-pixels (P1-P3) may emit red, green, and blue light, but is not limited thereto.

Each of the first to third sub-pixels (P1-P3) may include an emission area (EA) that emits light and a non-emission area (NEA) surrounding the emission area (EA).

The non-emission area (NEA) defines the emission area (EA) and may include the bank 300 and the signal area (SA). The bank 300 includes first and second banks 310 and 320, and the auxiliary area SA may include an auxiliary electrode.

The light-emitting area EA may include first and second light-emitting areas EA1 and EA2 that emit light of different wavelengths. In each of the first to third sub-pixels P1-P3, the first bank 310 may be formed to surround the edge. In each of the first to third sub-pixels P1-P3, the second bank 320 is formed inside the area surrounded by the first bank 310 and may be formed linearly. One side and the other side of the second bank 320 may be formed to contact the first bank 310. When the first and second banks 310 and 320 are made of the same material, the first and second banks 310 and 320 may be viewed as one structure and are not distinct from each other.

In each of the first to third sub-pixels P1-P3, the first and second emission areas EA1 and EA2 may be surrounded by first and second banks 310 and 320, respectively. Specifically, one side of each of the first and second light emitting areas EA1 and EA2 may be in contact with the second bank 320 , and the remaining side may be in contact with the first bank 310 . Additionally, in each of the first to third sub-pixels P1-P3, the second bank 320 may be formed between the first and second emission areas EA1 and EA2. That is, the first and second light emitting areas EA1 and EA2 may be divided by the second bank 320.

In each of the first to third sub-pixels P1-P3, the first and second emission areas EA1 and EA2 may be arranged in the horizontal direction. Additionally, the area of the first light-emitting area EA1 may be larger than the area of the second light-emitting area EA2. When each of the first to third sub-pixels (P1-P3) emits red, green, and blue light, the first emission area (EA1) of each of the first to third sub-pixels (P1-P3) emits red and green light. and may emit blue light. Additionally, the second emission area EA2 of each of the first to third sub-pixels P1-P3 may emit white light.

Figure 2 is a cross-sectional view corresponding to line II' of a display device according to an embodiment of the present invention.

Referring to FIG. 2, a display device according to an embodiment of the present invention includes a substrate 100, a circuit element layer 150, a light emitting element 200, a bank 300, an encapsulation layer 400, and a color filter 500. ) and a black matrix 600.

The substrate 100 may be made of glass or plastic, but is not limited thereto. The display device according to an embodiment of the present invention may be configured in a top emission manner in which emitted light is emitted toward the top. Accordingly, not only transparent materials but also opaque materials can be used as the material for the substrate 100.

First to third sub-pixels (P1-P3) may be formed on the substrate 100. The first sub-pixel (P1) emits red (R) light, the second sub-pixel (P2) emits green (G) light, and the third sub-pixel (P3) emits blue (B) light. It may be formed, but is not limited thereto. The arrangement order of each of the first to third sub-pixels (P1-P3) can be changed in various ways.

The circuit element layer 150 may be formed on the substrate 100. The circuit element layer 150 may include a thin film transistor portion (T) and a circuit portion (C).

The thin film transistor unit (T) may be formed in each of the first to third sub-pixels (P1-P3). Additionally, the thin film transistor unit T may include a switching thin film transistor, a driving thin film transistor, and a sensing thin film transistor.

The switching thin film transistor may be switched according to a gate signal supplied to the gate wire and supply the data voltage supplied from the data wire to the driving thin film transistor. The driving thin film transistor can be switched according to the data voltage supplied from the switching thin film transistor to generate a data current from the power supplied from the power wiring and supply it to the first electrode 210. The sensing thin film transistor can sense the threshold voltage deviation of the driving thin film transistor, which causes image quality degradation, and can supply the current of the driving thin film transistor to the reference wiring in response to a sensing control signal supplied from the gate wiring or a separate sensing wiring. there is.

The circuit unit C may include circuit elements including signal wires and a capacitor for driving the thin film transistor unit T.

Signal wires may include gate wires, data wires, power wires, and reference wires. The capacitor can maintain the data voltage supplied to the driving thin film transistor for one frame and can be connected to the gate terminal and source terminal of the driving thin film transistor, respectively.

The light emitting device 200 may be formed on the circuit device layer 150. The light emitting device 200 may include a first electrode 210, a light emitting layer 220, and a second electrode 230.

The first electrode 210 may be formed on the circuit element layer 150. The first electrode 210 is formed in each of the first to third sub-pixels (P1-P3) and may function as an anode of the display device. The first electrode 210 may be electrically connected to a driving thin film transistor formed in the circuit element layer 150.

The first electrode 210 may include a transparent conductive material. For example, the first electrode 210 may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, the first electrode 210 is made of a metal material such as aluminum (Al), silver (Ag), copper (Cu), molybdenum (Mo), titanium (Ti), tungsten (W), or chromium (Cr). It may be comprised of an alloy. Additionally, the first electrode 210 is shown as a single layer, but may be formed as a multiple layer. For example, the first electrode 210 may be formed as a triple layer of a transparent conductive material, a metal material, and a transparent conductive material sequentially stacked.

The bank 300 is formed on the first electrode 210 and may include first and second banks 310 and 320. The first bank 310 may be formed at the boundary between the first to third sub-pixels (P1-P3) and cover the end of the first electrode 210. The second bank 320 is formed inside the first to third sub-pixels (P1-P3) and may be formed inside the area surrounded by the first bank 310.

As described above in FIG. 1 , the bank 300 includes first and second banks 310 and 320 and may define an emission area EA.

The first bank 310 may be formed in the boundary area of neighboring sub-pixels. Specifically, referring to FIG. 2, the first bank 310 is located in the boundary area between the first and second sub-pixels (P1, P2) and the boundary area between the second and third sub-pixels (P2, P3). can be formed. Additionally, the first bank 310 may be formed in the outer area of the sub-pixel. Additionally, the first bank 310 may be formed to cover an end of the first electrode 210 disposed in each of the first to third sub-pixels (P1-P3).

The second bank 320 may be formed inside each of the first to third sub-pixels (P1-P3). The second bank 320 may be formed on the top surface of the first electrode 210. Additionally, the second bank 320 may be formed at a different location from both ends of the first electrode 210. Referring to FIG. 2, the second bank 320 may be formed closer to the right end of the first electrode 210 than the left end, but is not limited to this.

The second bank 320 can distinguish the first and second light emitting areas EA1 and EA2. That is, the second bank 320 may be formed between the first and second light emitting areas EA1 and EA2. The width of the first emission area EA1 is the distance from the second bank 320 to the first bank 310 covering one end of the first electrode 210, and the width of the second emission area EA2 is the distance from the second bank 320 to the first bank 310 covering one end of the first electrode 210. 2 It may be the distance from the bank 320 to the first bank 310 covering the other end of the first electrode 210. At this time, the area of the first emission area EA1 may be larger than the area of the second emission area EA2. Referring to FIG. 2, the first emission area EA1 is an area from the second bank 320 to the first bank 310 disposed adjacent to the left, and the second emission area EA2 is an area from the second bank 310. It may be an area from 320 to the first bank 310 disposed adjacent to the right.

The first and second banks 310 and 320 are made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc. It may include an organic insulating material. Alternatively, the first and second banks 310 and 320 may include an inorganic insulating material such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide. You can. Additionally, the first and second banks 310 and 320 may be formed including black dye to absorb light incident from the outside.

The first and second banks 310 and 320 may be made of the same material. Additionally, the top surface of the first bank 310 and the top surface of the second bank 320 may be located on the same plane.

The light emitting layer 220 may be formed on the first electrode 210. Additionally, the light emitting layer 220 may be formed on the bank 300 and continuously formed on the first to third sub-pixels (P1-P3) and the boundary area between them.

The light-emitting layer 220 may include a first light-emitting layer 221 and a second light-emitting layer 222. Each of the first and second light emitting layers 221 and 222 may include a hole transport layer, an organic light emitting layer, and an electron transport layer. In this case, when voltage is applied to the first electrode 210 and the second electrode 230, holes and electrons move to the light-emitting layer 220 through the hole transport layer and electron transport layer, respectively, and combine with each other in the light-emitting layer 220. It can emit light.

The first light emitting layer 221 may be formed on the first electrode 210 through a solution process. In each of the first to third sub-pixels (P1-P3), the first emission layer 221 may be formed in the first emission area (EA1) and may not be formed in the second emission area (EA2). When each of the first to third sub-pixels (P1-P3) emits red, green, and blue light, the first emission area (EA1) of each of the first to third sub-pixels (P1-P3) emits red and green light. and may emit blue light. Additionally, since the first light emitting layer 221 is formed through a solution process, the end may have a rounded shape. That is, the side surface of the first light emitting layer 221 adjacent to the first and second banks 310 and 320 may have a round shape.

The second light emitting layer 222 may be formed on the first light emitting layer 221 through a deposition process. In each of the first to third sub-pixels P1-P3, the second emission layer 222 may be formed in both the first and second emission areas EA1 and EA2. That is, in the first emission area EA1, the second emission layer 222 is formed on the first emission layer 221, and in the second emission area EA2, the second emission layer 222 is formed on the first electrode 210. ) can be formed on Additionally, the second light emitting layer 222 may be formed on the bank 300 and continuously formed on the boundary areas of each of the first to third sub-pixels (P1-P3). Additionally, the second emission area EA2 of each of the first to third sub-pixels P1-P3 may emit white light. Additionally, since the second light emitting layer 222 is formed through a deposition process, the top surface may be flat.

The second light emitting layer 222 formed in the second light emitting area EA2 may have a flat top. At this time, the first light emitting layer 221 formed through a solution process in the first light emitting area EA1 may have a rounded side surface adjacent to the first and second banks 310 and 320. Accordingly, the second light-emitting layer 222 formed through a deposition process on the first light-emitting layer 221 in the first light-emitting area EA1 may be formed along the upper surface of the first light-emitting layer 221. That is, in the first emission area EA1, the second emission layer 222 may have a rounded side surface adjacent to the first and second banks 310 and 320.

Accordingly, the present invention may disclose a light-emitting layer 220 including a first light-emitting layer 221 formed through a solution process and a second light-emitting layer 222 formed through a deposition process. Since both the first and second emission layers 221 and 222 are formed in the first emission area EA1, the first emission area EA1 can emit white light along with light of the color corresponding to each sub-pixel. . Additionally, since only the second emission layer 222 is formed in the second emission area EA2, the second emission area EA2 can emit white light.

In the present invention, by additionally forming the second bank 320 inside each sub-pixel, a second emission area EA2 that emits white light can be additionally formed. Specifically, compared to a structure in which each of the plurality of sub-pixels includes only one light-emitting area surrounded by a bank, a second light-emitting area EA2 that emits white light may be additionally disclosed. That is, in a structure that starts only one light-emitting area, the second light-emitting area EA2 can be additionally formed in the area where the bank is formed. Accordingly, compared to a structure that discloses only one light emitting area, the area of the light emitting area can be increased. Accordingly, by forming the second light emitting area EA2, the present invention can provide a display device with an improved aperture ratio. In addition, even when compared to a structure that discloses only one light-emitting area, the present invention can maintain the separation distance between the first light-emitting area EA1 formed in each of the plurality of sub-pixels, so the color mixing of light emitted from adjacent sub-pixels is also possible. It can be easily prevented.

The second electrode 230 may be formed on the light emitting layer 220. The second electrode 230 may function as a cathode of the display device. Like the light emitting layer 220, the second electrode 230 may be formed in the first to third sub-pixels (P1-P3) and the boundary area between them. That is, the second electrode 230 may also be formed on the first electrode 210 and the bank 300.

Since the display device according to an embodiment of the present invention is made of a top emission type, the second electrode 230 is made of ITO (Indium Tin Oxide) or IZO (ITO) in order to transmit the light emitted from the light emitting layer 220 toward the top. It may include a transparent conductive material such as Indium Zinc Oxide. And, the second electrode 230 may be made of a single layer or multiple layers.

The encapsulation layer 400 is formed on the second electrode 230 to prevent external moisture from penetrating into the light emitting layer 220. The encapsulation layer 400 may include an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). Alternatively, the encapsulation layer 400 is made of an organic insulating material such as acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. It can be done including.

The black matrix 500 may be formed on the encapsulation layer 400. The black matrix 500 is formed in a matrix structure at the boundary between the first to fourth sub-pixels (P1-P3) to prevent light leakage from occurring at the boundary between the first to fourth sub-pixels (P1-P3). You can.

The color filter 600 may be formed on the encapsulation layer 400 and the black matrix 500. The color filter 800 may include first to third color filters 610-630. The first color filter 810 transmits only red (R) light, the second color filter 820 transmits only green (G) light, and the third color filter 830 transmits only blue (B) light. You can.

Although not shown, an absorption film is formed on the color filter 800 to prevent external light from entering and minimize reduction in luminance.

Figure 3 is a cross-sectional view of the light emitting device 200 of a display device according to an embodiment of the present invention. In one sub-pixel P, the first electrode 210, the light-emitting layer 220, and the second electrode 230 of the first and second light-emitting areas EA1 and EA2 are shown.

A first electrode 210, a first emission layer 221, a second emission layer 222, and a second electrode 230 may be formed in the first emission area EA1.

As described above with reference to FIG. 2 , the first electrode 210 may function as an anode of the display device. Additionally, the first electrode 210 may include a transparent conductive material or a metal material.

The first light-emitting layer 221 may be formed on the first electrode 210 through a solution process. In addition, the first light-emitting layer 221 includes a hole injection layer (HIL), a hole transport layer (HTL), a first light-emitting material layer (EML1), an electron transport layer (ETL), and an N-type charge generation layer (N-CGL). can do.

The hole injection layer (HIL) can inject holes, and the hole transport layer (HTL) can transport holes. Additionally, the first light emitting material layer EML1 may emit light of a color corresponding to each sub-pixel. For example, when each of the first to third sub-pixels (P1-P3) emits red, green, and blue light, the first light emitting layer 221 of each of the first to third sub-pixels (P1-P3) It can emit red, green and blue light. Additionally, the electron transport layer (ETL) can transport electrons, and the N-type charge generation layer (N-CGL) can generate electrons.

The second light emitting layer 222 may be formed on the first light emitting layer 221 through a deposition process. In addition, the second light emitting layer 222 includes a P-type charge generation layer (P-CGL), a hole transport layer (HTL), a second light emitting material layer (EML2), an electron transport layer (ETL), and an electron injection layer (EIL). can do.

The P-type charge generation layer (P-CGL) generates holes, and the hole transport layer (HTL) can transport holes. Additionally, the second light emitting material layer EML2 may emit white light. Additionally, the electron transport layer (ETL) can transport electrons, and the electron injection layer (EIL) can inject electrons.

As described above in FIG. 2, the second electrode 230 may function as a cathode of the display device. Additionally, the second electrode 230 may include a transparent conductive material.

That is, in the first light-emitting area EA1, the light-emitting device 200 may include a first light-emitting layer 221 formed through a solution process and a second light-emitting layer 222 formed through a deposition process.

A first electrode 210, a second emission layer 222, and a second electrode 230 may be formed in the second emission area EA2. That is, compared to the first emission area EA1, the first emission layer 221 may not be formed in the second emission area EA2.

The second light-emitting layer 222 formed in the second light-emitting area EA2 may be formed through the same process as the second light-emitting layer 222 formed in the first light-emitting area EA1 and may have the same structure. That is, the second light-emitting layer 222 formed in the second light-emitting area EA2 is formed through a deposition process and includes a P-type charge generation layer (P-CGL), a hole transport layer (HTL), a second light-emitting material layer (EML2), The electron transport layer (ETL) and the electron injection layer (EIL) may be sequentially stacked.

That is, the light emitting device 200 formed in the second light emitting area EA2 may include the second light emitting layer 222 formed through a deposition process. Additionally, since the second light emitting layer 222 can be formed in both the first and second light emitting areas EA1 and EA2 through a single deposition process, the process can be simplified. Accordingly, the first emission layer 221 may be formed in the first emission area EA1 through a solution process, and the second emission layer 222 may be formed on the first emission layer 221 through a deposition process.

Figure 4 is a cross-sectional view corresponding to line II-II' of a display device according to an embodiment of the present invention. Additionally, the display device according to an embodiment of the present invention may include a first emission area EA1 where a driving thin film transistor DT is disposed and an auxiliary area SA where a plurality of auxiliary electrodes SE are disposed. .

The first light emitting area (EA1) includes a substrate 100, a blocking layer (LS), a buffer layer (BUF), a driving thin film transistor (DT), a passivation layer (PAS), a planarization layer (OC), a first bank 310, and A light emitting device 200 may be formed.

The blocking layer LS is formed on the substrate 100 and may include a conductive material capable of blocking light. For example, the blocking layer (LS) is made of a metal material such as aluminum (Al), silver (Ag), copper (Cu), molybdenum (Mo), titanium (Ti), tungsten (W), or chromium (Cr). It may include alloys thereof. Additionally, the blocking layer LS is shown as a single layer, but may be formed as a multiple layer. For example, the blocking layer LS may be formed as a double layer, and the double layer may be composed of a lower layer and an upper layer containing different materials. At this time, the lower layer may be made of molybdenum-titanium alloy (MoTi), and the upper layer may be made of copper (Cu), but are not limited to this.

The buffer layer BUF may be formed on the substrate 100 to cover the blocking layer LS. The buffer layer (BUF) may include silicon nitride (SiNx) or silicon oxide (SiOx). Additionally, the buffer layer (BUF) is shown as a single layer. It can be formed in multiple layers. The buffer layer BUF insulates the blocking layer LS and can improve adhesion between the layers formed on the buffer layer BUF and the substrate 100.

As described above in FIG. 2, the thin film transistor unit T may be formed on the substrate 100 and may include a switching thin film transistor, a driving thin film transistor, and a sensing thin film transistor. Figure 4 shows a driving thin film transistor (DT).

The driving thin film transistor (DT) may be formed on the buffer layer (BUF). Additionally, the driving thin film transistor DT may be disposed at a position overlapping the blocking layer LS. Accordingly, the blocking layer (LS) is disposed below the driving thin film transistor (DT), thereby preventing external light from affecting the driving thin film transistor (DT), thereby improving the reliability of the driving thin film transistor (DT). .

The driving thin film transistor (DT) may include a semiconductor layer (ACT), a gate insulating layer (GI), a gate electrode (G), a source electrode (S), and a drain electrode (D).

The semiconductor layer (ACT) of the driving thin film transistor (DT) may be formed on the buffer layer (BUF). The semiconductor layer (ACT) may include a poly-silicon semiconductor or an oxide semiconductor. And, when the semiconductor layer 410 includes an oxide semiconductor, indium-galium-zinc-oxide (IGZO), indium-zinc-oxide (IZO), indium-gallium-tin-oxide (IGTO), and indium-gallium-tin-oxide (IGO) -gallium-oxide) and may contain at least one oxide.

The gate insulating layer GI of the driving thin film transistor DT may be formed on the semiconductor layer ACT to insulate the gate electrode G from the semiconductor layer ACT. The gate insulating layer (GI) of the driving thin film transistor (DT) may include silicon nitride (SiNx) or silicon oxide (SiOx). Additionally, the gate insulating layer (GI) is shown as a single layer. It can be formed in multiple layers.

The gate electrode (G) of the driving thin film transistor (DT) may be formed on the gate insulating layer (GI). The gate electrode G may be formed on the gate insulating layer GI so as to overlap the channel region of the semiconductor layer ACT.

The interlayer insulating layer (INS) may be formed on the gate insulating layer (GI) and the gate electrode 430 of the driving thin film transistor (DT). The interlayer insulating layer 600 is made of an organic insulating material such as acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. It can be done including.

A contact hole may be formed in the gate insulating layer (GI) and the interlayer insulating layer (INS) of the driving thin film transistor (DT) to expose the semiconductor layer (ACT) of the driving thin film transistor (DT).

The source electrode (S) and the drain electrode (D) of the driving thin film transistor (DT) may be formed on the interlayer insulating layer (INS) while facing each other. In addition, each of the source electrode (S) and drain electrode (D) of the driving thin film transistor (DT) may be connected to the semiconductor layer (ACT) through contact holes formed in the gate insulating layer (GI) and the interlayer insulating layer (INS). .

Although not shown, the drain electrode (D) of the driving thin film transistor (DT) may be electrically connected to the blocking layer (LS). Accordingly, the blocking layer LS made of a conductive material can be electrically stabilized and the blocking layer LS can be prevented from interfering with the normal operation of the semiconductor layer ACT.

The planarization layer (OC) is formed on the driving thin film transistor (DT) and can compensate for steps caused by the driving thin film transistor (DT) and contact holes. The planarization layer (OC) may include an inorganic insulating material such as silicon oxide (SiOX) or silicon nitride (SiNX). Alternatively, the planarization layer 700 is an organic insulating material such as acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. It can be done including.

The light emitting device 200 may be formed on the planarization layer (OC). As described above in FIGS. 2 and 3 , the light emitting device 200 may include a first electrode 210, a light emitting layer 220, and a second electrode 230. Additionally, the first bank 310 may be formed on the planarization layer OC and the first electrode 210.

A plurality of auxiliary electrodes SE may be formed in the auxiliary area SA. The plurality of auxiliary electrodes SE may include first to third auxiliary electrodes SE1-SE3.

The first auxiliary electrode SE1 may be formed on the substrate 100 . The signal line VL may be formed simultaneously through the same process as the blocking layer LS and may include the same material.

The buffer layer (BUF), the gate insulating layer (GI), and the interlayer insulating layer (INS) may extend from the first emission area (EA1) to the auxiliary area (SA). The buffer layer (BUF), the gate insulating layer (GI), and the interlayer insulating layer (INS) may be formed on the substrate 100 to cover the first auxiliary electrode (SE1). At this time, a portion of the upper surface of the first auxiliary electrode SE1 may be exposed by the contact hole H of the buffer layer BUF, the gate insulating layer GI, and the interlayer insulating layer INS.

The second auxiliary electrode SE2 may be formed on the interlayer insulating layer INS. The second auxiliary electrode SE2 may be formed simultaneously through the same process as the drain electrode D of the driving thin film transistor DT and may include the same material. The second auxiliary electrode SE2 may be electrically connected to the first auxiliary electrode SE1 through the contact hole H.

The planarization layer OC may extend from the first emission area EA1 to the auxiliary area SA. The planarization layer OC may be formed to cover the second auxiliary electrode SE2. At this time, a portion of the upper surface of the second auxiliary electrode SE2 may be exposed through the contact hole H of the planarization layer OC.

The third auxiliary electrode SE3 may be formed on the planarization layer OC. The third auxiliary electrode SE3 may be formed simultaneously through the same process as the first electrode 210 and may include the same material. The third auxiliary electrode SE3 may be electrically connected to the second auxiliary electrode SE2 through the contact hole H.

Additionally, the second electrode 230 may be formed on the front surface of the substrate 100 and electrically connected to the third auxiliary electrode SE3 through the contact hole H. That is, since the first to third auxiliary electrodes (SE1-SE3) and the second electrode 230 are both made of a conductive material, the second electrode 230 connects to the first to third auxiliary electrodes through the contact hole (H). (SE1-SE3) can all be electrically connected.

Since the display device according to an embodiment of the present invention is made of a top emission type, the second electrode 230 is made of ITO (Indium Tin Oxide) or IZO (ITO) in order to transmit the light emitted from the light emitting layer 220 toward the top. It may include a transparent conductive material such as Indium Zinc Oxide. Additionally, in order to increase light transmittance, it is necessary to reduce the thickness of the second electrode 230. In this way, when the thickness of the second electrode 230 made of a transparent conductive material decreases, the resistance of the second electrode 230 may increase. Accordingly, the present invention discloses reducing the resistance of the second electrode 230 by electrically connecting the first to third auxiliary electrodes (SE1-SE3) with the second electrode 230.

However, in the process of forming the second light emitting layer 222, the second light emitting layer 222 is also formed on the first bank 310 and may extend to the inside of the contact hole (H). That is, the second light emitting layer 222 may also be formed on the third auxiliary electrode SE3. Accordingly, the second electrode 230 may not be deposited stably on the third auxiliary electrode SE3.

In this case, the present invention can initiate a stable connection structure between the second electrode 230 and the third auxiliary electrode SE3 by irradiating a laser to the welding area W. Specifically, a laser may be irradiated to the welding area (W) through laser equipment disposed on the outside of the bottom surface of the substrate 100. The laser may be irradiated to the third auxiliary electrode SE3, thereby partially melting the third auxiliary electrode SE3. The melted third auxiliary electrode SE3 may penetrate the second light emitting layer 222 and contact the second electrode 230. Accordingly, the second electrode 230 and the third auxiliary electrode SE3 may be electrically connected.

Although embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and various modifications may be made without departing from the technical spirit of the present invention. . Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but are for illustrative purposes, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. The scope of protection of the present invention should be interpreted in accordance with the claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of rights of the present invention.

100: substrate 150: circuit element layer
200: light emitting element 210: first electrode
220: light emitting layer 221: first stack
222: second stack 230: second electrode
300: bank 310: first bank
320: second bank 400: encapsulation layer
500: Black Matrix 600: Color Filter
P: Sub-pixel EA: Emitting area

Claims (13)

A substrate including a plurality of sub-pixels;
On the substrate, a first electrode formed in each of the plurality of sub-pixels;
a bank and a light emitting layer formed on the first electrode; and
It includes a second electrode formed on the bank and the light emitting layer,
Each of the plurality of sub-pixels includes first and second light-emitting areas that emit different lights,
In each of the plurality of sub-pixels, the first light-emitting layer is formed only in one of the first and second light-emitting regions. According to claim 1,
The bank is,
In the plurality of sub-pixels, a first bank formed in a boundary area of adjacent sub-pixels; and
A display device comprising a second bank formed within the plurality of sub-pixels. According to clause 2,
The display device wherein the second bank is formed at a position at a different distance from both ends of the first electrode. According to clause 2,
Each of the first and second light emitting areas is surrounded by the first and second banks. According to clause 4,
The second bank is formed between the first and second light emitting areas. According to clause 5,
The width of the first light emitting area is the distance from the second bank to the first bank covering one end of the first electrode,
The width of the second light emitting area is the distance from the second bank to the first bank covering the other end of the first electrode. According to clause 6,
An area of the first light-emitting area is larger than an area of the second light-emitting area. According to clause 4,
The first light-emitting area includes the first light-emitting layer formed on the first electrode and the second light-emitting layer formed on the first light-emitting layer,
The second light emitting area includes the second light emitting layer formed on the first electrode. According to clause 8,
The second light emitting layer is formed continuously in the first and second light emitting regions. According to clause 8,
The first light-emitting layer is formed through a solution process,
The display device wherein the second light emitting layer is formed through a deposition process. According to clause 8,
The first light emitting layer emits red, green or blue light,
The second light emitting layer emits white light. According to clause 8,
The first light-emitting layer includes a hole injection layer, a first hole transport layer, a first light-emitting material layer, a first electron transport layer, and an N-type charge generation layer,
The second light emitting layer includes a P-type charge generation layer, a second hole transport layer, a second light emitting material layer, a second electron transport layer, and an electron injection layer. According to claim 1,
The first sub-pixel emits red light,
The second sub-pixel emits green light,
The third sub-pixel emits blue light.

Images