KR20240004361A - 프로세싱-인-메모리 동시적 프로세싱 시스템 및 방법 - Google Patents

프로세싱-인-메모리 동시적 프로세싱 시스템 및 방법 Download PDF

Info

Publication number
KR20240004361A
KR20240004361A KR1020237036802A KR20237036802A KR20240004361A KR 20240004361 A KR20240004361 A KR 20240004361A KR 1020237036802 A KR1020237036802 A KR 1020237036802A KR 20237036802 A KR20237036802 A KR 20237036802A KR 20240004361 A KR20240004361 A KR 20240004361A
Authority
KR
South Korea
Prior art keywords
pim
kernel
module
command
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
KR1020237036802A
Other languages
English (en)
Korean (ko)
Inventor
무하마드 앰버 하사안
마이클 엘. 추
애쉬윈 아지
Original Assignee
어드밴스드 마이크로 디바이시즈, 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 어드밴스드 마이크로 디바이시즈, 인코포레이티드 filed Critical 어드밴스드 마이크로 디바이시즈, 인코포레이티드
Publication of KR20240004361A publication Critical patent/KR20240004361A/ko
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/3004Arrangements for executing specific machine instructions to perform operations on memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Software Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computational Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Advance Control (AREA)
KR1020237036802A 2021-03-30 2022-03-29 프로세싱-인-메모리 동시적 프로세싱 시스템 및 방법 Pending KR20240004361A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/217,792 2021-03-30
US17/217,792 US11468001B1 (en) 2021-03-30 2021-03-30 Processing-in-memory concurrent processing system and method
PCT/US2022/022357 WO2022212383A1 (en) 2021-03-30 2022-03-29 Processing-in-memory concurrent processing system and method

Publications (1)

Publication Number Publication Date
KR20240004361A true KR20240004361A (ko) 2024-01-11

Family

ID=83449773

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020237036802A Pending KR20240004361A (ko) 2021-03-30 2022-03-29 프로세싱-인-메모리 동시적 프로세싱 시스템 및 방법

Country Status (6)

Country Link
US (2) US11468001B1 (cg-RX-API-DMAC7.html)
EP (1) EP4315041A4 (cg-RX-API-DMAC7.html)
JP (1) JP7802819B2 (cg-RX-API-DMAC7.html)
KR (1) KR20240004361A (cg-RX-API-DMAC7.html)
CN (1) CN117377943A (cg-RX-API-DMAC7.html)
WO (1) WO2022212383A1 (cg-RX-API-DMAC7.html)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11468001B1 (en) * 2021-03-30 2022-10-11 Advanced Micro Devices, Inc. Processing-in-memory concurrent processing system and method
US12292838B2 (en) * 2021-12-22 2025-05-06 SK Hynix Inc. Host device performing near data processing function and accelerator system including the same
US11977782B2 (en) * 2022-06-30 2024-05-07 Advanced Micro Devices, Inc. Approach for enabling concurrent execution of host memory commands and near-memory processing commands
US12461684B2 (en) * 2022-12-29 2025-11-04 Advanced Micro Devices, Inc. Scheduling processing-in-memory transactions
US20240419330A1 (en) * 2023-06-19 2024-12-19 Advanced Micro Devices, Inc. Atomic Execution of Processing-in-Memory Operations
KR20250019482A (ko) 2023-08-01 2025-02-10 삼성전자주식회사 가속기, 이를 포함하는 전자 장치 및 그 동작 방법
CN119201001B (zh) * 2024-10-16 2025-04-22 鼎道智芯(上海)半导体有限公司 一种数据处理方法和相关装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3654178B1 (en) * 2012-03-30 2023-07-12 Intel Corporation Mechanism for issuing requests to an accelerator from multiple threads
US10346195B2 (en) * 2012-12-29 2019-07-09 Intel Corporation Apparatus and method for invocation of a multi threaded accelerator
US20150106574A1 (en) * 2013-10-15 2015-04-16 Advanced Micro Devices, Inc. Performing Processing Operations for Memory Circuits using a Hierarchical Arrangement of Processing Circuits
CN107408405B (zh) 2015-02-06 2021-03-05 美光科技公司 用于并行写入到多个存储器装置位置的设备及方法
US10048888B2 (en) * 2016-02-10 2018-08-14 Micron Technology, Inc. Apparatuses and methods for partitioned parallel data movement
KR101847262B1 (ko) * 2016-03-18 2018-05-28 연세대학교 산학협력단 하드웨어 가속기를 포함하는 메인 메모리 및 메인 메모리의 동작 방법
US10453502B2 (en) 2016-04-04 2019-10-22 Micron Technology, Inc. Memory bank power coordination including concurrently performing a memory operation in a selected number of memory regions
US10282308B2 (en) * 2016-06-23 2019-05-07 Advanced Micro Devices, Inc. Method and apparatus for reducing TLB shootdown overheads in accelerator-based systems
US10802883B2 (en) * 2018-08-21 2020-10-13 Intel Corporation Method, system, and device for near-memory processing with cores of a plurality of sizes
US10483978B1 (en) * 2018-10-16 2019-11-19 Micron Technology, Inc. Memory device processing
CN111679785B (zh) 2019-03-11 2025-03-11 三星电子株式会社 用于处理操作的存储器装置及其操作方法、数据处理系统
KR102707631B1 (ko) 2019-05-10 2024-09-13 에스케이하이닉스 주식회사 연산 회로를 포함하는 메모리 장치, 이를 제어하는 메모리 컨트롤러 및 이를 포함하는 메모리 시스템
US20220206869A1 (en) * 2020-12-28 2022-06-30 Advanced Micro Devices, Inc. Virtualizing resources of a memory-based execution device
KR20220107617A (ko) * 2021-01-25 2022-08-02 에스케이하이닉스 주식회사 인메모리 프로세싱을 수행하는 병렬 처리 시스템
US11468001B1 (en) * 2021-03-30 2022-10-11 Advanced Micro Devices, Inc. Processing-in-memory concurrent processing system and method

Also Published As

Publication number Publication date
US11868306B2 (en) 2024-01-09
US20230099163A1 (en) 2023-03-30
EP4315041A4 (en) 2025-05-14
CN117377943A (zh) 2024-01-09
US20220318012A1 (en) 2022-10-06
WO2022212383A1 (en) 2022-10-06
US11468001B1 (en) 2022-10-11
JP2024511751A (ja) 2024-03-15
JP7802819B2 (ja) 2026-01-20
EP4315041A1 (en) 2024-02-07

Similar Documents

Publication Publication Date Title
US11868306B2 (en) Processing-in-memory concurrent processing system and method
US10133677B2 (en) Opportunistic migration of memory pages in a unified virtual memory system
US12204478B2 (en) Techniques for near data acceleration for a multi-core architecture
US9892058B2 (en) Centrally managed unified shared virtual address space
US10216413B2 (en) Migration of peer-mapped memory pages
CN104813278B (zh) 对二进制转换的自修改代码以及交叉修改代码的处理
CN115934584A (zh) 设备私有存储器中的存储器访问跟踪器
US12360902B2 (en) Reconfigurable cache architecture and methods for cache coherency
Lee et al. Performance characterization of data-intensive kernels on AMD fusion architectures
US20180336034A1 (en) Near memory computing architecture
US9727465B2 (en) Self-disabling working set cache
CN106250348A (zh) 一种基于gpu访存特性的异构多核架构缓存管理方法
Zhang et al. Fuse: Fusing stt-mram into gpus to alleviate off-chip memory access overheads
US10120800B2 (en) History based memory speculation for partitioned cache memories
US20190370060A1 (en) Multi-processor system, multi-core processing device, and method of operating the same
Vermij et al. An architecture for near-data processing systems
US20250307180A1 (en) Software Runtime Assisted Co-Processing Acceleration with a Memory Hierarchy Augmented with Compute Elements
KR20110067795A (ko) 실시간 프로세스의 응답성 개선을 위한 tcm운용방법
US20250306928A1 (en) Load instruction division
US11354127B2 (en) Method of managing multi-tier memory displacement using software controlled thresholds
KR20210119272A (ko) 스토리지 및 메모리에서의 코히어런스 멀티프로세싱 가능 컴퓨팅
Ahn et al. Seminar in Computer Architecture
Mutanga A SystemC cache simulator for a multiprocessor shared memory system

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

PA0302 Request for accelerated examination

St.27 status event code: A-1-2-D10-D16-exm-PA0302

D21 Rejection of application intended

Free format text: ST27 STATUS EVENT CODE: A-1-2-D10-D21-EXM-PE0902 (AS PROVIDED BY THE NATIONAL OFFICE)

PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11 Amendment of application requested

Free format text: ST27 STATUS EVENT CODE: A-2-2-P10-P11-NAP-X000 (AS PROVIDED BY THE NATIONAL OFFICE)

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13 Application amended

Free format text: ST27 STATUS EVENT CODE: A-2-2-P10-P13-NAP-X000 (AS PROVIDED BY THE NATIONAL OFFICE)

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

D22 Grant of ip right intended

Free format text: ST27 STATUS EVENT CODE: A-1-2-D10-D22-EXM-PE0701 (AS PROVIDED BY THE NATIONAL OFFICE)

PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701