KR20230118725A - Methods of manufacturing electronic devices or optical devices based on III-V compound semiconductor nanostructures - Google Patents
Methods of manufacturing electronic devices or optical devices based on III-V compound semiconductor nanostructures Download PDFInfo
- Publication number
- KR20230118725A KR20230118725A KR1020220014598A KR20220014598A KR20230118725A KR 20230118725 A KR20230118725 A KR 20230118725A KR 1020220014598 A KR1020220014598 A KR 1020220014598A KR 20220014598 A KR20220014598 A KR 20220014598A KR 20230118725 A KR20230118725 A KR 20230118725A
- Authority
- KR
- South Korea
- Prior art keywords
- manufacturing
- compound semiconductor
- electronic device
- substrate
- optical device
- Prior art date
Links
- 239000002086 nanomaterial Substances 0.000 title claims abstract description 95
- 239000004065 semiconductor Substances 0.000 title claims abstract description 93
- 150000001875 compounds Chemical class 0.000 title claims abstract description 76
- 230000003287 optical effect Effects 0.000 title claims abstract description 51
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 45
- 238000000034 method Methods 0.000 title claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 66
- 230000005684 electric field Effects 0.000 claims abstract description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 12
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 12
- 239000002070 nanowire Substances 0.000 claims description 11
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical group [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- 239000010936 titanium Substances 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 6
- KXNLCSXBJCPWGL-UHFFFAOYSA-N [Ga].[As].[In] Chemical compound [Ga].[As].[In] KXNLCSXBJCPWGL-UHFFFAOYSA-N 0.000 claims description 6
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 claims description 6
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 claims description 6
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 5
- 239000011888 foil Substances 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910002601 GaN Inorganic materials 0.000 claims description 4
- 229910005540 GaP Inorganic materials 0.000 claims description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 4
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 4
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 4
- 239000004696 Poly ether ether ketone Substances 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- AUCDRFABNLOFRE-UHFFFAOYSA-N alumane;indium Chemical compound [AlH3].[In] AUCDRFABNLOFRE-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000004205 dimethyl polysiloxane Substances 0.000 claims description 4
- 238000000609 electron-beam lithography Methods 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- 239000012212 insulator Substances 0.000 claims description 4
- 239000002073 nanorod Substances 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 238000000206 photolithography Methods 0.000 claims description 4
- 238000001020 plasma etching Methods 0.000 claims description 4
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims description 4
- 229920001230 polyarylate Polymers 0.000 claims description 4
- 229920002530 polyetherether ketone Polymers 0.000 claims description 4
- -1 polyethylene Polymers 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- MDPILPRLPQYEEN-UHFFFAOYSA-N aluminium arsenide Chemical compound [As]#[Al] MDPILPRLPQYEEN-UHFFFAOYSA-N 0.000 claims description 3
- QNRATNLHPGXHMA-XZHTYLCXSA-N (r)-(6-ethoxyquinolin-4-yl)-[(2s,4s,5r)-5-ethyl-1-azabicyclo[2.2.2]octan-2-yl]methanol;hydrochloride Chemical compound Cl.C([C@H]([C@H](C1)CC)C2)CN1[C@@H]2[C@H](O)C1=CC=NC2=CC=C(OCC)C=C21 QNRATNLHPGXHMA-XZHTYLCXSA-N 0.000 claims description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 2
- 239000004698 Polyethylene Substances 0.000 claims description 2
- 239000004642 Polyimide Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical group [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 2
- AJGDITRVXRPLBY-UHFFFAOYSA-N aluminum indium Chemical compound [Al].[In] AJGDITRVXRPLBY-UHFFFAOYSA-N 0.000 claims description 2
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 claims description 2
- 229910052792 caesium Inorganic materials 0.000 claims description 2
- TVFDJXOCXUVLDH-UHFFFAOYSA-N caesium atom Chemical compound [Cs] TVFDJXOCXUVLDH-UHFFFAOYSA-N 0.000 claims description 2
- 230000008021 deposition Effects 0.000 claims description 2
- 238000001312 dry etching Methods 0.000 claims description 2
- 229910052732 germanium Inorganic materials 0.000 claims description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052750 molybdenum Inorganic materials 0.000 claims description 2
- 239000011733 molybdenum Substances 0.000 claims description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 2
- 239000004417 polycarbonate Substances 0.000 claims description 2
- 229920000515 polycarbonate Polymers 0.000 claims description 2
- 229920000573 polyethylene Polymers 0.000 claims description 2
- 229920001721 polyimide Polymers 0.000 claims description 2
- 229920000642 polymer Polymers 0.000 claims description 2
- 229920000307 polymer substrate Polymers 0.000 claims description 2
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
- 238000000992 sputter etching Methods 0.000 claims description 2
- 238000001039 wet etching Methods 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000005530 etching Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 239000002041 carbon nanotube Substances 0.000 description 1
- 229910021393 carbon nanotube Inorganic materials 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000000527 sonication Methods 0.000 description 1
- 238000009210 therapy by ultrasound Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66196—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66363—Thyristors
- H01L29/66401—Thyristors with an active layer made of a group 13/15 material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Electromagnetism (AREA)
- Nanotechnology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
본 발명은 종횡비가 1이 아닌 구조적으로 비대칭적인 III-V족 화합물반도체 나노구조의 위치 제어 기술을 이용한 전자소자 또는 광소자의 제조방법 및 그로부터 제조되는 전자소자 또는 광소자에 관한 것으로서, III-V족 화합물반도체 나노구조를 포함하는 용액을 기판 상에 도포하는 단계; 상기 용액에 전기장 또는 자기장을 인가하는 단계; 상기 기판 상에 III-V족 화합물반도체 나노구조를 인가된 전기장 또는 자기장과 같은 방향 또는 수직인 방향으로 방향성을 갖도록 정렬시키는 단계 및 상기 III-V족 화합물반도체 나노구조 양단에 전극을 형성하는 단계를 포함하는 전자소자 또는 광소자의 제조방법을 제공한다.The present invention relates to a method for manufacturing an electronic device or optical device using a position control technology of a structurally asymmetric III-V compound semiconductor nanostructure whose aspect ratio is not 1, and an electronic device or optical device manufactured therefrom, and relates to a III-V group coating a solution containing a compound semiconductor nanostructure on a substrate; applying an electric or magnetic field to the solution; Aligning the III-V compound semiconductor nanostructure on the substrate in the same direction as or perpendicular to the applied electric field or magnetic field and forming electrodes on both ends of the III-V compound semiconductor nanostructure It provides a manufacturing method of an electronic device or an optical device comprising
Description
본 발명은 III-V족 화합물반도체 기반의 전자소자 또는 광소자에 대한 것으로, 나노구조의 위치 및 방향 제어 기술을 이용하는 제조방법을 개시한다. 더욱 상세하게는 종횡비 (Aspect ratio)가 1이 아닌 구조적으로 비대칭적인 III-V족 화합물반도체 나노구조를 형성시킨 후 기판에서 이를 분리하고 공간적으로 원하는 위치에서 일정한 방향성을 갖도록 정렬한 후 나노구조 양단에 전극을 형성함으로써 전자소자 또는 광소자를 제조하는 방법에 관한 것이다.The present invention relates to an electronic device or an optical device based on a group III-V compound semiconductor, and discloses a manufacturing method using a nanostructure position and direction control technology. More specifically, after forming a structurally asymmetric III-V compound semiconductor nanostructure whose aspect ratio is not 1, separating it from the substrate, spatially aligning it at a desired location to have a certain directionality, and then placing the nanostructure on both ends. It relates to a method for manufacturing an electronic device or an optical device by forming an electrode.
최근 III-V족 화합물반도체 나노구조를 운반자의 전도층 (Channel)으로 이용하는 전자소자와 광흡수층 및 발광층으로 이용하는 광소자를 제작하는 연구가 활발하게 이루어지고 있다. 이러한 반도체 나노구조 기반 전자소자 및 광소자를 제작하기 위해서는 반도체 나노구조 양단에 전극을 형성해야 한다. 하지만 기존 반도체 나노구조 기반 전자소자 및 광소자는 기판 위에 무작위로 도포된 반도체 나노구조 양단에 전극을 형성해야 하기 때문에 전극을 원하는 위치에 균일하게 형성하지 못하는 현실적인 문제점으로 인해 소자 제작이 매우 어렵다.Recently, studies on manufacturing electronic devices using group III-V compound semiconductor nanostructures as a conductive layer (channel) of a carrier and optical devices using light absorbing layers and light emitting layers have been actively conducted. In order to manufacture such semiconductor nanostructure-based electronic devices and optical devices, electrodes must be formed on both ends of the semiconductor nanostructure. However, conventional electronic devices and optical devices based on semiconductor nanostructures require electrodes to be formed on both ends of the semiconductor nanostructures randomly applied on a substrate, so it is very difficult to fabricate devices due to the practical problem of not uniformly forming electrodes at desired positions.
통상적인 방법으로 III-V족 화합물반도체 나노구조를 기판에서 분리하여 새로운 기판에 도포하게 되면 나노구조는 방향성 없이 무작위로 배열된다. 즉, 기판에서 반도체 나노구조를 분리하기 위해 나노구조가 포함된 기판을 용액에 담근 후 분리 과정, 일예로 초음파 처리 (Sonication)를 진행하면 III-V족 화합물반도체 나노구조가 무작위로 배열되므로, 양단에 전극을 형성하기가 기술적으로 매우 큰 어려움이 있다.When the group III-V compound semiconductor nanostructure is separated from the substrate and applied to a new substrate in a conventional manner, the nanostructure is randomly arranged without directionality. That is, in order to separate the semiconductor nanostructure from the substrate, when the substrate containing the nanostructure is immersed in a solution and then subjected to a separation process, for example, sonication, the group III-V compound semiconductor nanostructure is randomly arranged, so both ends There is a technically very great difficulty in forming an electrode.
한편, 한국공개특허 제2010-0026153호에서는 나노구조의 장 감응성에 대응하는 전기장 또는 자기장을 나노구조에 인가하여 나노구조를 정렬하는 방법을 제시하고 있지만, 전기장 또는 자기장을 인가하기 위하여 전극 형성이 필요하고, 추가적인 공정이 요구되며, 장-감응성 물질이 탄소나노튜브에 국한된다.Meanwhile, Korean Patent Publication No. 2010-0026153 proposes a method of aligning the nanostructure by applying an electric or magnetic field corresponding to the field sensitivity of the nanostructure to the nanostructure, but electrode formation is required to apply the electric or magnetic field. , additional processes are required, and field-sensitive materials are limited to carbon nanotubes.
또한, Horizontally assembled green InGaN nanorod LEDs: scalable polarized surface emitting LEDs using electric-field assisted assembly(Scientific Reports | 6:28312 | DOI: 10.1038/srep28312)에서는 기판 상에 전극 패턴을 형성하고 전극 패턴에 전기를 걸어 전기장을 형성함으로써 LED 나노로드를 정렬하는 방법이 기재되어 있으나, 여기서는 전극을 형성한 후 전극 상단에 나노구조를 도포하며, 나노구조 양단에 전극을 견고하게 형성하는 것이 아니라 전극 위에 나노구조가 반데르발스 힘(van der Waals’s force)으로 접촉되어 있어 소자의 안정성 문제점이 있다. 또한 국부적인 영역의 전극 상단에 나노구조가 도포되어 있기 때문에 수율의 문제점이 있다.In addition, in Horizontally assembled green InGaN nanorod LEDs: scalable polarized surface emitting LEDs using electric-field assisted assembly (Scientific Reports | 6:28312 | DOI: 10.1038/srep28312), an electrode pattern is formed on a substrate and an electric field is applied to the electrode pattern. A method of aligning the LED nanorods by forming is described, but here, after forming the electrode, the nanostructure is applied on top of the electrode, and the nanostructure is not firmly formed on both ends of the nanostructure, but the nanostructure on the electrode is van der Waals There is a stability problem of the device because it is contacted by force (van der Waals's force). In addition, there is a problem in yield because the nanostructure is applied on top of the electrode in a local area.
이러한 관점에서 보다 용이하고 효율적으로 반도체 나노구조를 포함하는 전자소자 및 광소자를 제조하는 방법을 개발할 필요가 있다.From this point of view, there is a need to develop a method for manufacturing an electronic device and an optical device including a semiconductor nanostructure more easily and efficiently.
본 발명의 목적은 종횡비가 1이 아닌 구조적으로 비대칭적인 III-V족 화합물반도체 나노구조를 공간적으로 원하는 위치에서 특정 방향성을 갖도록 정렬하고 이를 운반자의 전도층으로 이용하는 전자소자와 광흡수층 및 발광층으로 이용하는 광소자의 제조방법을 제공하고자 한다.An object of the present invention is to align structurally asymmetric group III-V compound semiconductor nanostructures with aspect ratios other than 1 to have a specific orientation at a desired location spatially, and to use them as an electronic device used as a conductive layer of a carrier, a light absorbing layer, and a light emitting layer. It is intended to provide a method for manufacturing an optical device.
구체적으로, 기판 위에 도포된 III-V족 화합물반도체 나노구조에 전기장 또는 자기장을 인가하여 원하는 위치에서 공간적으로 전기장 또는 자기장 방향 또는 이들과 수직인 방향으로 특정 방향성을 갖도록 정렬하고 나노구조 양단에 전극을 형성함으로써 이를 운반자의 전도층으로 이용하는 전자소자 또는 광흡수층 및 발광층으로 이용하는 광소자의 제조방법을 제공하고자 한다.Specifically, by applying an electric field or magnetic field to the group III-V compound semiconductor nanostructure applied on the substrate, spatially aligning the electric or magnetic field direction or a direction perpendicular thereto at a desired location to have a specific directionality, and electrodes are placed on both ends of the nanostructure By forming, it is intended to provide a manufacturing method of an electronic device using it as a conductive layer of a carrier or an optical device using it as a light absorbing layer and a light emitting layer.
본 발명은 III-V족 화합물반도체 나노구조를 포함하는 용액을 기판 상에 도포하는 단계; 상기 용액에 전기장 또는 자기장을 인가하는 단계; 상기 기판 상에 인가된 전기장 또는 자기장에 수직인 방향으로 방향성을 갖는 III-V족 화합물반도체 나노구조를 정렬시키는 단계 및 상기 III-V족 화합물반도체 나노구조 양단에 전극을 형성하는 단계를 포함하는 전자소자 또는 광소자의 제조방법을 제공한다.The present invention comprises the steps of applying a solution containing a group III-V compound semiconductor nanostructure on a substrate; applying an electric or magnetic field to the solution; Aligning group III-V compound semiconductor nanostructures having directionality in a direction perpendicular to the electric field or magnetic field applied on the substrate, and forming electrodes on both ends of the group III-V compound semiconductor nanostructure. A method for manufacturing a device or an optical device is provided.
본 발명에 의하면, 인가된 전기장 또는 자기장에 의해 III-V족 화합물반도체 나노구조를 공간적으로 원하는 위치에서 일정한 방향성을 갖도록 정렬한 후에 나노구조 양단에 전극을 형성함으로써 효율적인 전극형성 및 용이하고 효율적인 방법으로 III-V족 화합물반도체 나노구조 기반 전자소자 및 광소자를 제조할 수 있다.According to the present invention, after aligning the group III-V compound semiconductor nanostructure to have a certain directionality at a desired position spatially by an applied electric field or magnetic field, by forming electrodes at both ends of the nanostructure, efficient electrode formation and easy and efficient method Group III-V compound semiconductor nanostructure-based electronic devices and optical devices can be manufactured.
도 1은 전기장 또는 자기장을 인가하기 전과 후의 III-V족 화합물반도체 나노와이어의 정렬특성을 보여주는 전계방사형 주사전자현미경 (FE-SEM) 이미지 및 그래프이다.
도 2은 패턴된 기판을 사용하는 III-V족 화합물반도체 나노구조 기반의 전자소자 또는 광소자 제조방법을 도시한 것이다.
도 3는 패턴된 마스크를 사용하는 III-V족 화합물반도체 나노구조 기반의 전자소자 또는 광소자 제조방법을 도시한 것이다.
도 4는 패턴된 기판 및 마스크를 사용하는 III-V족 화합물반도체 나노구조 기반의 전자소자 또는 광소자 제조방법을 도시한 것이다.1 is a field emission scanning electron microscope (FE-SEM) image and graph showing the alignment characteristics of group III-V compound semiconductor nanowires before and after applying an electric or magnetic field.
2 shows a method for manufacturing an electronic device or an optical device based on a group III-V compound semiconductor nanostructure using a patterned substrate.
3 illustrates a method of manufacturing an electronic device or optical device based on a group III-V compound semiconductor nanostructure using a patterned mask.
4 illustrates a method of manufacturing an electronic device or optical device based on a group III-V compound semiconductor nanostructure using a patterned substrate and mask.
본 발명은 종횡비가 1이 아닌 구조적으로 비대칭적인 III-V족 화합물반도체 나노구조 기반 전자소자 및 광소자를 보다 효율적으로 제조하기 위한 방법으로, III-V족 화합물반도체 나노구조의 위치 및 방향 제어 특성을 이용한다.The present invention is a method for more efficiently manufacturing an electronic device and an optical device based on a structurally asymmetric III-V compound semiconductor nanostructure whose aspect ratio is not 1, and the position and direction control characteristics of the III-V compound semiconductor nanostructure use
도 1은 전기장 또는 자기장을 인가하기 전과 후의 III-V족 화합물반도체 나노와이어의 정렬 특성을 보여주는 전계방사형 주사전자현미경 (FE-SEM) 이미지 및 그래프이다. 전기장 또는 자기장 인가 전에는 특정 방향성 없이 흩어져 있던 나노와이어가 전기장 또는 자기장 인가 후 일정 방향으로 배열된 것을 확인할 수 있다. 본 발명에서는 이러한 특성을 이용하여 III-V족 화합물반도체 나노구조 기반의 전자소자 또는 광소자를 제조하는 방법을 제안한다. 1 is a field emission scanning electron microscope (FE-SEM) image and graph showing alignment characteristics of group III-V compound semiconductor nanowires before and after applying an electric or magnetic field. It can be seen that the nanowires, which were scattered without a specific direction before the electric or magnetic field was applied, were arranged in a certain direction after the electric or magnetic field was applied. The present invention proposes a method for manufacturing an electronic device or an optical device based on the group III-V compound semiconductor nanostructure using these characteristics.
기판 상에 성장되어 있는 III-V족 화합물반도체 나노구조를 기판으로부터 분리한다. 구체적으로, 기판 상에 성장된 III-V족 화합물반도체 나노구조를 분리하기 위해 나노구조가 포함된 기판을 용액에 담근 후 분리 과정을 거치게 되는데, 일례로 초음파 처리를 진행한다. 상기 용액으로는 아이소프로필 알코올 (Isopropyl alcohol), 아세톤 (Acetone), 에탄올 (Ethanol), 탈이온수 (Deionized water) 또는 이들로 조합된 혼합물을 사용할 수 있다. 이렇게 기판으로부터 분리된 III-V족 화합물반도체 나노구조를 이용하여 전자소자 및 광소자를 제작하기 위해서는 III-V족 화합물반도체 나노구조 양단에 전극을 형성해야한다. The group III-V compound semiconductor nanostructure grown on the substrate is separated from the substrate. Specifically, in order to separate the group III-V compound semiconductor nanostructure grown on the substrate, the substrate containing the nanostructure is immersed in a solution and then subjected to a separation process, for example, ultrasonic treatment. As the solution, isopropyl alcohol, acetone, ethanol, deionized water, or a mixture thereof may be used. In order to manufacture an electronic device and an optical device using the group III-V compound semiconductor nanostructure separated from the substrate, electrodes must be formed on both ends of the group III-V compound semiconductor nanostructure.
이를 위해 기판으로부터 분리된 III-V족 화합물반도체 나노구조를 포함하는 용액을 새로운 기판에 도포하고 기판 위에 도포된 III-V족 화합물반도체 나노구조에 전기장 또는 자기장을 인가하게 되면 III-V족 화합물반도체 나노구조의 높은 쌍극자 및 사극자 모멘트 특성(Dipole, quadrupole moment)으로 인해 외부에서 인가된 전기장 또는 자기장 방향 또는 이들과 수직인 방향으로 일정한 방향성을 갖도록 정렬된다. 앞선 III-V족 화합물반도체 나노구조가 성장되어 III-V족 화합물반도체 나노구조가 분리되는 기판과, 상기 III-V족 화합물반도체 나노구조를 포함하는 용액이 도포되는 기판은 소재가 동일할 수도 있고, 다를 수도 있다.To this end, when a solution containing the group III-V compound semiconductor nanostructure separated from the substrate is applied to a new substrate and an electric or magnetic field is applied to the group III-V compound semiconductor nanostructure applied on the substrate, a group III-V compound semiconductor Due to the high dipole and quadrupole moment characteristics (dipole, quadrupole moment) of the nanostructure, they are aligned to have a certain directionality in the direction of an externally applied electric or magnetic field or in a direction perpendicular thereto. The substrate on which the group III-V compound semiconductor nanostructure is grown and the group III-V compound semiconductor nanostructure is separated may be the same material as the substrate on which the solution containing the group III-V compound semiconductor nanostructure is applied. , may be different.
이렇게 기판 상에 일정한 방향으로 정렬된 III-V족 화합물반도체 나노구조 양단에 전극을 형성하여 전자소자 또는 광소자를 용이하고 효율적으로 제조할 수 있다. In this way, an electronic device or an optical device can be easily and efficiently manufactured by forming electrodes on both ends of the group III-V compound semiconductor nanostructure aligned in a certain direction on the substrate.
또한, 본 발명에서는 III-V족 화합물반도체 나노구조를 공간적으로 특정 방향으로 정렬시킴에 있어 원하는 위치에서 정렬시키기 위한 일 실시예로서, III-V족 화합물반도체 나노구조를 포함하는 용액을 기판에 분산시키기 전에 III-V족 화합물반도체 나노구조의 위치 제어를 위해 기판의 식각된 패턴을 이용하는 방법을 제안한다. In addition, in the present invention, as an embodiment for aligning the group III-V compound semiconductor nanostructure in a desired position in spatially aligning it in a specific direction, a solution containing the group III-V compound semiconductor nanostructure is dispersed on a substrate. We propose a method of using the etched pattern of the substrate to control the position of the III-V compound semiconductor nanostructure before processing.
도 2는 상기 실시예를 도시한 것으로, 기판에 패턴을 식각하고, 상기 패턴 내에서 상기 III-V족 화합물반도체 나노와이어를 원하는 위치에 공간적으로 특정한 방향성을 갖도록 정렬시킨 후 III-V족 화합물반도체 나노와이어 양단에 전극을 형성하여 III-V족 화합물반도체 나노구조 기반의 전자소자 또는 광소자를 제조하는 방법을 보여준다.Figure 2 shows the embodiment, after etching a pattern on a substrate, and aligning the III-V compound semiconductor nanowires at a desired position in the pattern to have a specific orientation in space, a III-V compound semiconductor It shows a method of manufacturing an electronic device or optical device based on the III-V compound semiconductor nanostructure by forming electrodes on both ends of the nanowire.
III-V족 화합물반도체 나노구조는 기판의 식각된 패턴 내에서 일정한 방향으로 정렬되게 되므로, 위치 및 방향성 제어가 보다 용이하다. Since the group III-V compound semiconductor nanostructures are aligned in a certain direction within the etched pattern of the substrate, it is easier to control the position and direction.
다음으로, III-V족 화합물반도체 나노구조를 공간적으로 특정 방향으로 정렬시킴에 있어 원하는 위치에서 정렬시키기 위한 다른 실시예로서 본 발명에서는 III-V족 화합물반도체 나노구조를 포함하는 용액을 기판에 분산시키기 전에 패턴을 갖는 마스크를 기판 위에 위치시키거나 형성하여 사용할 수 있다. Next, as another embodiment for aligning the group III-V compound semiconductor nanostructures at a desired position in spatially aligning them in a specific direction, in the present invention, a solution containing the group III-V compound semiconductor nanostructures is dispersed on a substrate. A mask having a pattern may be placed or formed on the substrate before use.
도 3은 기판 위에 특정 패턴을 갖는 마스크를 위치시켜 사용하는 방법을 도시한 것으로, 마스크의 패턴에 의해 III-V족 화합물반도체 나노와이어를 원하는 위치로 제어하고, 이후 공간적으로 특정한 방향성을 갖도록 정렬된 III-V족 화합물반도체 나노와이어 양단에 전극을 형성하여 III-V족 화합물반도체 나노구조 기반의 전자소자 또는 광소자를 제조하는 방법을 도시한 것이다.3 shows a method of positioning and using a mask having a specific pattern on a substrate, controlling the group III-V compound semiconductor nanowire to a desired position by the pattern of the mask, and then spatially aligned to have a specific directionality. It shows a method of manufacturing an electronic device or optical device based on the group III-V compound semiconductor nanostructure by forming electrodes at both ends of the group III-V compound semiconductor nanowire.
즉, III-V족 화합물반도체 나노구조는 기판 상의 마스크의 패턴 내에서 일정한 방향으로 정렬되므로, 위치 및 방향성 제어가 보다 용이하다. That is, since the group III-V compound semiconductor nanostructure is aligned in a certain direction within the pattern of the mask on the substrate, it is easier to control the position and direction.
상기 마스크 위에 도포된 III-V족 화합물반도체 나노구조를 정렬할 때, 마스크를 제거하기 전 또는 후에 전기장 또는 자기장을 인가하여 반도체 나노구조를 정렬시킨다.When aligning the group III-V compound semiconductor nanostructure applied on the mask, an electric or magnetic field is applied before or after removing the mask to align the semiconductor nanostructure.
또 다른 실시예로서, 본 발명에서는 III-V족 화합물반도체 나노구조의 위치 제어를 위해 특정한 패턴을 갖는 마스크를 기판 상에 위치시키고 마스크 위에 반도체 나노구조를 포함하는 용액을 도포할 때, 상기 기판과 마스크 계면으로 용액이 확산 및 침투되는 것을 방지하여 보다 정확한 위치 제어를 하기 위해 패턴이 식각된 기판을 사용할 수 있다. 즉, 기판 상의 III-V족 화합물반도체 나노구조의 위치 및 방향성 제어에 기판의 패턴과 마스크의 패턴을 동시에 사용하는 것이다. As another embodiment, in the present invention, when a mask having a specific pattern is placed on a substrate to control the position of the group III-V compound semiconductor nanostructure and a solution containing the semiconductor nanostructure is applied on the mask, the substrate and A substrate on which a pattern is etched may be used to prevent diffusion and penetration of a solution into a mask interface for more accurate position control. That is, the pattern of the substrate and the pattern of the mask are simultaneously used to control the position and direction of the III-V compound semiconductor nanostructure on the substrate.
도 4는 상기 실시예를 도시한 것으로, 특정 패턴을 갖는 마스크를 패턴이 식각되어 있는 기판 상에 위치시키고, III-V족 화합물반도체 나노와이어의 위치 제어 특성을 이용하여 원하는 위치에 공간적으로 특정한 방향성을 갖도록 정렬된 III-V족 화합물반도체 나노와이어 양단에 전극을 형성하여 III-V족 화합물반도체 나노구조 기반의 전자소자 및 광소자를 제조하는 방법을 보여준다.4 shows the above embodiment, a mask having a specific pattern is positioned on a substrate on which a pattern is etched, and spatially specific directionality is provided at a desired position by using position control characteristics of group III-V compound semiconductor nanowires. It shows a method for manufacturing an electronic device and an optical device based on the III-V compound semiconductor nanostructure by forming electrodes on both ends of the group III-V compound semiconductor nanowires aligned to have a
그러므로, 본 발명에서는 기판 위에 나노구조를 특정한 위치에서 특정 방향으로 정렬하기 위해 기판의 패턴 단독, 마스크의 패턴 단독, 또는 기판 및 마스크의 패턴을 동시에 사용하는 것을 실시예로서 제시한다. Therefore, in the present invention, in order to align the nanostructures on the substrate in a specific position and in a specific direction, the substrate pattern alone, the mask pattern alone, or the substrate and mask patterns are used simultaneously as an example.
상기 기판에 패턴을 식각하는 방법은 습식 식각 (Wet etching) 또는 스퍼터 식각 (Sputter etching), 반응성 이온 식각 (Reactive ion etching) 또는 플라즈마 식각 (Plasma etching) 등을 포함하는 건식 식각 (Dry etching)을 사용한다.The method of etching the pattern on the substrate uses dry etching including wet etching, sputter etching, reactive ion etching, or plasma etching. do.
상기 기판에 패턴을 식각할 때, 식각하고자 하는 패턴의 길이는 상기 III-V족 화합물반도체 나노구조의 길이를 고려하여 선정할 수 있으며, 주어진 III-V족 화합물반도체 나노구조의 길이보다 통상적으로 길게 선정할 수 있다.When etching a pattern on the substrate, the length of the pattern to be etched can be selected in consideration of the length of the III-V compound semiconductor nanostructure, and is usually longer than the given length of the III-V compound semiconductor nanostructure. can be selected
상기 기판에 패턴을 식각할 때, 식각하고자 하는 패턴의 폭은 정렬시키고자 하는 III-V족 화합물반도체 나노구조의 개수를 고려하여 선정할 수 있다.When etching a pattern on the substrate, the width of the pattern to be etched may be selected in consideration of the number of group III-V compound semiconductor nanostructures to be aligned.
상기 기판에 패턴을 식각할 때, 식각하고자 하는 패턴의 형태는 원형, 타원형, 정사각형, 직사각형, 사다리꼴, 마름모 또는 삼각형 등을 포함하는 다양한 형태를 사용한다.When a pattern is etched on the substrate, the shape of the pattern to be etched uses various shapes including circular, elliptical, square, rectangular, trapezoidal, rhombic, or triangular shapes.
상기 기판 상에 마스크를 위치시키는 것은 특정한 패턴을 갖는 구조체즉, 마스크를 제작한 후 기판 위에 올려놓는 것을 의미하며, 이와는 달리 기판 상에 특정한 패턴을 갖는 구조체(마스크)가 직접 형성되게 할 수도 있다. 이를 위하여 증착의 방법을 사용할 수 있다. 이때 증착은 스테퍼 (Stepper), 스퍼터 (Sputter), 전자빔 리소그래피 (E-beam lithography) 또는 포토리소그래피 (Photolithography)의 방법을 사용할 수 있다.Placing a mask on the substrate means manufacturing a structure having a specific pattern, that is, a mask, and then placing it on the substrate. Alternatively, a structure (mask) having a specific pattern may be directly formed on the substrate. For this purpose, a deposition method may be used. At this time, the deposition may use a method of stepper, sputter, E-beam lithography, or photolithography.
상기 마스크의 크기는 III-V족 화합물반도체 나노구조의 길이를 고려하여 선정할 수 있으며, 주어진 III-V족 화합물반도체 나노구조의 길이보다 통상적으로 같거나 큰 값으로 선정할 수 있다. The size of the mask can be selected in consideration of the length of the group III-V compound semiconductor nanostructure, and can be selected as a value that is usually equal to or greater than the length of the given group III-V compound semiconductor nanostructure.
상기 마스크의 폭은 정렬시키고자 하는 III-V족 화합물반도체 나노구조의 개수를 고려하여 선정할 수 있다.The width of the mask may be selected in consideration of the number of group III-V compound semiconductor nanostructures to be aligned.
상기 전기장 및 자기장을 인가해 주는 방법은 외부에서 전압 또는 전류를 공급하여 전기장 또는 자기장을 발생시키는 장치를 사용한다. 이와는 달리, 영구자석 등을 이용하여 전류 및 전압을 인가하지 않으면서 전기장 및 자기장을 직접 인가해주는 방법을 사용할 수도 있다. 그로 인해 III-V족 화합물반도체 나노구조를 원하는 위치에 일정한 방향으로 정렬할 수 있고, 전자소자 및 광소자를 제작하고자 하는 위치에 전극을 형성할 수 있다.The method for applying the electric and magnetic fields uses a device that generates an electric or magnetic field by supplying voltage or current from the outside. Alternatively, a method of directly applying an electric field and a magnetic field without applying current and voltage using a permanent magnet or the like may be used. As a result, the group III-V compound semiconductor nanostructure can be aligned in a desired position in a certain direction, and an electrode can be formed at a position where an electronic device and an optical device are to be manufactured.
상기 전기장의 세기는 사용되는 장비 및 반도체 소재의 특성 등을 고려하여 선정할 수 있다.The strength of the electric field may be selected in consideration of characteristics of equipment and semiconductor materials used.
상기 자기장의 세기는 사용되는 장비 및 반도체 소재의 특성 등을 고려하여 선정할 수 있다.The strength of the magnetic field may be selected in consideration of characteristics of equipment and semiconductor materials used.
상기 전자소자 및 광소자를 제작하기 위한 전극형성은 스테퍼 (Stepper), 스퍼터 (Sputter), 전자빔 리소그래피 (E-beam lithography) 또는 포토리소그래피 (Photolithography) 등을 포함한 금속 전극형성 장비를 사용할 수 있다.Electrode formation for manufacturing the electronic device and the optical device may use metal electrode forming equipment including a stepper, sputter, E-beam lithography, or photolithography.
상기 금속 전극은 은 (Ag), 금 (Au), 백금 (Pt), 세슘 (Ce), 구리 (Cu), 철 (Fe), 니켈 (Ni), 텅스텐 (W), 지르코늄 (Zr), 티타늄 (Ti), 납 (Pb) 또는 이들로 조합된 합금을 포함할 수 있다.The metal electrode is silver (Ag), gold (Au), platinum (Pt), cesium (Ce), copper (Cu), iron (Fe), nickel (Ni), tungsten (W), zirconium (Zr), titanium (Ti), lead (Pb), or a combination alloy thereof.
상기 III-V족 화합물반도체 나노구조를 포함하는 용액이 도포되는 기판은 금속포일, 고분자, 반도체 또는 절연체 기판을 포함할 수 있다.The substrate on which the solution containing the group III-V compound semiconductor nanostructure is coated may include a metal foil, polymer, semiconductor or insulator substrate.
상기 금속포일은 구리 (Cu), 알루미늄 (Al), 티타늄 (Ti), 니켈 (Ni), 철 (Fe), 몰리브덴 (Mo), 백금 (Pt) 또는 텅스텐 (W)을 포함할 수 있다.The metal foil may include copper (Cu), aluminum (Al), titanium (Ti), nickel (Ni), iron (Fe), molybdenum (Mo), platinum (Pt), or tungsten (W).
상기 금속포일의 두께는 10 nm~10 cm일 수 있다.The metal foil may have a thickness of 10 nm to 10 cm.
상기 고분자 기판은 폴리에틸렌 테리프탈레이트 (PET), 폴리디메틸실록산 (PDMS), 폴리에틸렌네아-프탈레이트 (PEN), 폴리에테르에테르케톤 (PEEK), 폴리카보네이트 (PC), 폴리아릴레이트 (PAR) 또는 폴리이미드 (PI)를 포함할 수 있다.The polymer substrate is polyethylene teriphthalate (PET), polydimethylsiloxane (PDMS), polyethylenenea-phthalate (PEN), polyether ether ketone (PEEK), polycarbonate (PC), polyarylate (PAR) or polyimide ( PI) may be included.
상기 반도체 기판은 실리콘 (Si), 저마늄 (Ge), 질화갈륨 (GaN), 인화갈륨 (GaP), 갈륨비소 (GaAs), 인화인듐 (InP) 또는 탄화규소 (SiC)를 포함할 수 있다. The semiconductor substrate may include silicon (Si), germanium (Ge), gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide (GaAs), indium phosphide (InP), or silicon carbide (SiC).
상기 절연체 기판은 수정 (SiO2), 사파이어 (Al2O3), 유리 (Glass) 또는 질화규소 (SiN)를 포함할 수 있다.The insulator substrate is quartz (SiO 2 ), sapphire (Al 2 O 3 ), glass (Glass) or silicon nitride (SiN).
상기 반도체 나노구조는 나노와이어 (Nanowire), 나노로드 (Nanorod), 나노컬럼 (Nanocolumn) 또는 나노휘스커 (Nanowhisker) 등 종횡비가 1이 아닌 구조적으로 비대칭적인 나노구조를 갖는 것을 특징으로 한다.The semiconductor nanostructure is characterized in that it has a structurally asymmetrical nanostructure such as a nanowire, nanorod, nanocolumn, or nanowhisker with an aspect ratio other than 1.
상기 반도체 나노구조는 III족 및 V족 원자를 포함할 수 있으며, 질화갈륨 (GaN), 질화인듐 (InN), 질화인듐갈륨 (InGaN), 질화알루미늄인듐갈륨 (AlInGaN), 갈륨비소 (GaAs), 알루미늄비소 (AlAs), 인듐비소 (InAs), 알루미늄갈륨비소 (AlGaAs), 인듐갈륨비소 (InGaAs), 인듐알루미늄갈륨비소 (InAlGaAs), 인화갈륨 (GaP), 인화인듐 (InP), 인화인듐갈륨 (InGaP), 인화알루미늄갈륨 (AlGaP), 인화알루미늄갈륨비소 (AlGaAsP), 인화인듐알루미늄갈륨비소 (InAlGaAsP), 인화인듐갈륨비소 (InGaAsP) 또는 이들의 조합을 포함할 수 있다.The semiconductor nanostructure may include group III and group V atoms, gallium nitride (GaN), indium nitride (InN), indium gallium nitride (InGaN), aluminum indium gallium nitride (AlInGaN), gallium arsenide (GaAs), Aluminum arsenide (AlAs), indium arsenide (InAs), aluminum gallium arsenide (AlGaAs), indium gallium arsenide (InGaAs), indium aluminum gallium arsenide (InAlGaAs), gallium phosphide (GaP), indium phosphide (InP), indium gallium phosphide ( InGaP), aluminum gallium phosphide (AlGaP), aluminum gallium arsenide (AlGaAsP), indium aluminum gallium arsenide (InAlGaAsP), indium gallium arsenide (InGaAsP), or a combination thereof.
상기 반도체 나노구조의 길이는 통상적으로 100 nm ~ 10 ㎛일 수 있다.The length of the semiconductor nanostructure may be typically 100 nm to 10 μm.
상기 전자소자는 다이오드(Diode), 트랜지스터(Transistor) 또는 사이리스터(Thyristor) 등을 포함하는 전자 및 전기회로를 구성할 때 사용되는 전자 부품이다.The electronic device is an electronic component used when constructing an electronic and electric circuit including a diode, a transistor, or a thyristor.
상기 광소자는 발광 다이오드(Light-emitting diode), 레이저 다이오드(Laser diode), 태양전지(Solar cell) 또는 광 검출기(Photo-detector) 등을 포함하는 발광 및 수광소자이다.The optical element is a light-emitting and light-receiving element including a light-emitting diode, a laser diode, a solar cell, or a photo-detector.
Claims (26)
상기 용액에 전기장 또는 자기장을 인가하는 단계;
상기 기판 상에 III-V족 화합물반도체 나노구조를 인가된 전기장 또는 자기장과 같은 방향 또는 수직인 방향으로 방향성을 갖도록 정렬시키는 단계 및
상기 III-V족 화합물반도체 나노구조 양단에 전극을 형성하는 단계를 포함하는 전자소자 또는 광소자의 제조방법.
Applying a solution containing a group III-V compound semiconductor nanostructure on a substrate;
applying an electric or magnetic field to the solution;
Aligning the group III-V compound semiconductor nanostructure on the substrate to have directionality in the same direction as or perpendicular to the applied electric or magnetic field; and
A method of manufacturing an electronic device or an optical device comprising the step of forming electrodes on both ends of the III-V compound semiconductor nanostructure.
상기 III-V족 화합물반도체 나노구조는 나노와이어 (Nanowire), 나노로드 (Nanorod), 나노컬럼 (Nanocolumn) 또는 나노휘스커 (Nanowhisker) 로서, 종횡비가 1이 아닌 비대칭적인 구조를 갖는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
The group III-V compound semiconductor nanostructure is a nanowire, nanorod, nanocolumn or nanowhisker, characterized in that it has an asymmetric structure with an aspect ratio other than 1, A method for manufacturing electronic devices or optical devices.
상기 III-V족 화합물반도체 나노구조는 질화갈륨 (GaN), 질화인듐 (InN), 질화인듐갈륨 (InGaN), 질화알루미늄인듐갈륨 (AlInGaN), 갈륨비소 (GaAs), 알루미늄비소 (AlAs), 인듐비소 (InAs), 알루미늄갈륨비소 (AlGaAs), 인듐갈륨비소 (InGaAs), 인듐알루미늄갈륨비소 (InAlGaAs), 인화갈륨 (GaP), 인화인듐 (InP), 인화인듐갈륨 (InGaP), 인화알루미늄갈륨 (AlGaP), 인화알루미늄갈륨비소 (AlGaAsP), 인화인듐알루미늄갈륨비소 (InAlGaAsP), 인화인듐갈륨비소 (InGaAsP) 또는 이들의 조합을 포함하는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
The III-V compound semiconductor nanostructure is gallium nitride (GaN), indium nitride (InN), indium gallium nitride (InGaN), aluminum indium gallium nitride (AlInGaN), gallium arsenic (GaAs), aluminum arsenic (AlAs), indium Arsenic (InAs), aluminum gallium arsenide (AlGaAs), indium gallium arsenide (InGaAs), indium aluminum gallium arsenide (InAlGaAs), gallium phosphide (GaP), indium phosphide (InP), indium gallium phosphide (InGaP), aluminum gallium phosphide ( AlGaP), aluminum gallium arsenide phosphide (AlGaAsP), indium aluminum gallium arsenide (InAlGaAsP), indium gallium arsenide (InGaAsP), or a combination thereof.
상기 III-V족 화합물반도체 나노구조의 길이는 100 nm ~ 10 ㎛인 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
The method of manufacturing an electronic device or an optical device, characterized in that the length of the group III-V compound semiconductor nanostructure is 100 nm to 10 μm.
상기 기판은 금속포일, 고분자, 반도체, 또는 절연체인 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
The method of manufacturing an electronic device or optical device, characterized in that the substrate is a metal foil, polymer, semiconductor, or insulator.
상기 금속포일 기판은 구리 (Cu), 알루미늄 (Al), 티타늄 (Ti), 니켈 (Ni), 철 (Fe), 몰리브덴 (Mo), 백금 (Pt), 또는 텅스텐 (W)을 포함하고, 두께가 10 nm~ 10 cm인 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 5,
The metal foil substrate includes copper (Cu), aluminum (Al), titanium (Ti), nickel (Ni), iron (Fe), molybdenum (Mo), platinum (Pt), or tungsten (W), and has a thickness A method for manufacturing an electronic device or an optical device, characterized in that 10 nm ~ 10 cm.
상기 고분자 기판은 폴리에틸렌 테리프탈레이트 (PET), 폴리디메틸실록산 (PDMS), 폴리에틸렌네아-프탈레이트 (PEN), 폴리에테르에테르케톤 (PEEK), 폴리카보네이트 (PC), 폴리아릴레이트 (PAR) 또는 폴리이미드 (PI)를 포함하는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 5,
The polymer substrate is polyethylene teriphthalate (PET), polydimethylsiloxane (PDMS), polyethylenenea-phthalate (PEN), polyether ether ketone (PEEK), polycarbonate (PC), polyarylate (PAR) or polyimide ( A method of manufacturing an electronic device or an optical device, characterized in that it comprises PI).
상기 반도체 기판은 실리콘 (Si), 저마늄 (Ge), 질화갈륨 (GaN), 인화갈륨 (GaP), 갈륨비소 (GaAs), 인화인듐 (InP) 또는 탄화규소 (SiC)을 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 5,
Characterized in that the semiconductor substrate is silicon (Si), germanium (Ge), gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide (GaAs), indium phosphide (InP) or silicon carbide (SiC), A method for manufacturing electronic devices or optical devices.
상기 절연체 기판은 수정 (SiO2), 사파이어 (Al2O3), 유리 (Glass) 또는 질화규소 (SiN)를 포함하는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 5,
The insulator substrate is a method of manufacturing an electronic device or an optical device, characterized in that it comprises quartz (SiO 2 ), sapphire (Al 2 O 3 ), glass (Glass) or silicon nitride (SiN).
상기 기판은 패턴이 식각된 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
The substrate is a method of manufacturing an electronic device or an optical device, characterized in that the pattern is etched.
상기 기판은 습식 식각 (Wet etching) 또는 스퍼터 식각 (Sputter etching), 반응성 이온 식각 (Reactive ion etching) 또는 플라즈마 식각 (Plasma etching)의 건식 식각 (Dry etching)의 방법으로 패턴이 식각되는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 10,
The substrate is characterized in that the pattern is etched by wet etching, sputter etching, reactive ion etching, or dry etching of plasma etching. , Method for manufacturing an electronic device or an optical device.
상기 패턴의 길이는 상기 III-V족 화합물반도체 나노구조의 길이보다 긴 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 10,
The method of manufacturing an electronic device or optical device, characterized in that the length of the pattern is longer than the length of the III-V compound semiconductor nanostructure.
상기 패턴의 형태는 원형, 타원형, 정사각형, 직사각형, 사다리꼴, 마름모 또는 삼각형인 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 10,
The method of manufacturing an electronic device or optical device, characterized in that the shape of the pattern is circular, elliptical, square, rectangular, trapezoidal, rhombic or triangular.
III-V족 화합물반도체 나노구조를 포함하는 용액을 기판 상에 도포하는 단계 이전에 패턴을 갖는 마스크를 기판 상에 위치시키는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
A method of manufacturing an electronic device or an optical device, characterized in that a mask having a pattern is placed on the substrate before the step of applying the solution containing the group III-V compound semiconductor nanostructure on the substrate.
상기 패턴의 길이는 상기 III-V족 화합물반도체 나노구조의 길이와 동일하거나 그보다 긴 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 14,
The method of manufacturing an electronic device or optical device, characterized in that the length of the pattern is equal to or longer than the length of the III-V compound semiconductor nanostructure.
상기 전기장 또는 자기장을 인가하여 III-V족 화합물반도체 나노구조를 정렬시킨 후 마스크를 제거하는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 14,
A method of manufacturing an electronic device or an optical device, characterized in that the mask is removed after aligning the group III-V compound semiconductor nanostructure by applying the electric or magnetic field.
상기 마스크를 제거한 후에 전기장 또는 자기장을 인가하여 III-V족 화합물반도체 나노구조를 정렬시키는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 14,
Method for manufacturing an electronic device or optical device, characterized in that after removing the mask, by applying an electric field or a magnetic field to align the III-V compound semiconductor nanostructure.
III-V족 화합물반도체 나노구조를 포함하는 용액을 기판 상에 도포하는 단계 이전에 마스크를 기판 상에 증착시키는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
A method of manufacturing an electronic device or an optical device, characterized in that a mask is deposited on a substrate prior to applying a solution containing a group III-V compound semiconductor nanostructure onto the substrate.
상기 마스크의 증착은 스테퍼 (Stepper), 스퍼터 (Sputter), 전자빔 리소그래피 (E-beam lithography) 또는 포토리소그래피 (Photolithography)의 방법으로 이루어지는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 18,
The method of manufacturing an electronic device or an optical device, characterized in that the deposition of the mask is performed by a method of stepper, sputter, E-beam lithography or photolithography.
상기 기판은 패턴이 식각된 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to any one of claims 14 to 19,
The substrate is a method of manufacturing an electronic device or an optical device, characterized in that the pattern is etched.
상기 용액에 전기장 또는 자기장을 인가하는 단계에서는 외부에서 전압 또는 전류를 공급하여 전기장 또는 자기장을 발생시키는 장치를 사용하는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
In the step of applying an electric or magnetic field to the solution, a device for generating an electric or magnetic field by supplying a voltage or current from the outside is used.
상기 용액에 전기장 또는 자기장을 인가하는 단계에서는 직접 전기장 또는 자기장을 발생시키는 장치를 사용하는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
In the step of applying an electric or magnetic field to the solution, a device for directly generating an electric or magnetic field is used.
상기 III-V족 화합물반도체 나노구조 양단에 전극을 형성하는 단계에서는 스테퍼 (Stepper), 스퍼터 (Sputter), 전자빔 리소그래피 (E-beam lithography) 또는 포토리소그래피 (Photolithography)의 방법을 사용하는 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
In the step of forming electrodes on both ends of the III-V compound semiconductor nanostructure, a method of stepper, sputter, E-beam lithography or photolithography is used. Characterized in that , Method for manufacturing an electronic device or an optical device.
상기 전극은 은 (Ag), 금 (Au), 백금 (Pt), 세슘 (Ce), 구리 (Cu), 철 (Fe), 니켈 (Ni), 텅스텐 (W), 지르코늄 (Zr), 티타늄 (Ti), 납 (Pb) 또는 이들의 조합인 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
The electrode is silver (Ag), gold (Au), platinum (Pt), cesium (Ce), copper (Cu), iron (Fe), nickel (Ni), tungsten (W), zirconium (Zr), titanium ( A method for manufacturing an electronic device or an optical device, characterized in that Ti), lead (Pb) or a combination thereof.
상기 전자소자는 다이오드 (Diode), 트랜지스터 (Transistor) 또는 사이리스터 (Thyristor)의 전자 및 전기회로를 구성할 때 사용되는 전자 부품인 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
The method of manufacturing an electronic device or an optical device, characterized in that the electronic device is an electronic component used when configuring an electronic and electrical circuit of a diode, transistor, or thyristor.
상기 광소자는 발광 다이오드 (Light-emitting diode), 레이저 다이오드 (Laser Diode), 태양전지 (Solar cell) 또는 광 검출기 (Photo-detector) 의 발광 및 수광소자인 것을 특징으로 하는, 전자소자 또는 광소자의 제조방법.
According to claim 1,
Manufacturing of an electronic device or optical device, characterized in that the optical device is a light emitting and light receiving device of a light-emitting diode, a laser diode, a solar cell or a photo-detector method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020220014598A KR102624061B1 (en) | 2022-02-04 | 2022-02-04 | Methods of manufacturing electronic devices or optical devices based on III-V compound semiconductor nanostructures |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020220014598A KR102624061B1 (en) | 2022-02-04 | 2022-02-04 | Methods of manufacturing electronic devices or optical devices based on III-V compound semiconductor nanostructures |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20230118725A true KR20230118725A (en) | 2023-08-14 |
| KR102624061B1 KR102624061B1 (en) | 2024-01-15 |
Family
ID=87565746
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020220014598A KR102624061B1 (en) | 2022-02-04 | 2022-02-04 | Methods of manufacturing electronic devices or optical devices based on III-V compound semiconductor nanostructures |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR102624061B1 (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080052250A (en) * | 2006-12-05 | 2008-06-11 | 한국전자통신연구원 | Manufacturing method of nano-wire array device |
| KR20080074621A (en) * | 2007-02-09 | 2008-08-13 | 엘지디스플레이 주식회사 | Nanowire transistor and manufacturing method thereof |
| KR20100026153A (en) * | 2008-08-29 | 2010-03-10 | 재단법인서울대학교산학협력재단 | Method and system for aligning nanostructures |
| KR20120130751A (en) * | 2009-12-22 | 2012-12-03 | 큐나노에이비 | Method for manufacturing a nanowire structure |
| KR20190143121A (en) * | 2018-06-20 | 2019-12-30 | 전북대학교산학협력단 | Fabrication of Device Based on III-V Compound Semiconductor Nano-Structure and Graphene and Manufacturing Thereof |
-
2022
- 2022-02-04 KR KR1020220014598A patent/KR102624061B1/en active IP Right Grant
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080052250A (en) * | 2006-12-05 | 2008-06-11 | 한국전자통신연구원 | Manufacturing method of nano-wire array device |
| KR20080074621A (en) * | 2007-02-09 | 2008-08-13 | 엘지디스플레이 주식회사 | Nanowire transistor and manufacturing method thereof |
| KR20100026153A (en) * | 2008-08-29 | 2010-03-10 | 재단법인서울대학교산학협력재단 | Method and system for aligning nanostructures |
| KR20120130751A (en) * | 2009-12-22 | 2012-12-03 | 큐나노에이비 | Method for manufacturing a nanowire structure |
| KR20190143121A (en) * | 2018-06-20 | 2019-12-30 | 전북대학교산학협력단 | Fabrication of Device Based on III-V Compound Semiconductor Nano-Structure and Graphene and Manufacturing Thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| KR102624061B1 (en) | 2024-01-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0881691B1 (en) | Quantum dot device | |
| JP4512054B2 (en) | Nanotube separation and alignment device and atomic microscope alignment device | |
| Krahne et al. | Fabrication of nanoscale gaps in integrated circuits | |
| US9190565B2 (en) | Light emitting diode | |
| KR20060109956A (en) | Semiconductor device comprising a heterojunction | |
| US8859439B1 (en) | Solution-assisted carbon nanotube placement with graphene electrodes | |
| JP2007324617A (en) | Lateral resonant tunneling | |
| KR102045064B1 (en) | Quantum light source and manufacturing method of the same | |
| US20120168711A1 (en) | Narrow-Waist Nanowire Transistor with Wide Aspect Ratio Ends | |
| US11469104B2 (en) | Nanowire bending for planar device process on (001) Si substrates | |
| KR102624061B1 (en) | Methods of manufacturing electronic devices or optical devices based on III-V compound semiconductor nanostructures | |
| US10424479B2 (en) | Method for making nano-scaled channels with nanowires as masks | |
| US10424480B2 (en) | Method for making thin film transistor with nanowires as masks | |
| US10147789B2 (en) | Process for fabricating vertically-aligned gallium arsenide semiconductor nanowire array of large area | |
| CN105679628B (en) | A kind of Field Electron Emission device architecture with reverse bias nano junction | |
| KR100813113B1 (en) | Manufacturing method for au nano wire | |
| US7294560B1 (en) | Method of assembling one-dimensional nanostructures | |
| KR101408251B1 (en) | Method for arraying nanowire | |
| Goswami et al. | Confined lateral epitaxial overgrowth of InGaAs: Mechanisms and electronic properties | |
| US9321633B2 (en) | Process for producing 3-dimensional structure assembled from nanoparticles | |
| CN109524490B (en) | ZnO/GaN heterojunction nanowire optical switch and preparation method thereof | |
| KR101199753B1 (en) | Nano electrode fabrication method | |
| JP2005311285A (en) | Hyperbolic drum type element, and manufacturing method of the element using ion beam etching | |
| CN109946340B (en) | Preparation method of two-dimensional layered material sample electrical testing microelectrode | |
| KR102423791B1 (en) | Nano structure with selectively deposited nano materials and method for selective deposition of nanomaterials on nano structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| E902 | Notification of reason for refusal | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant |