KR20230108759A - Resin composition for semiconductor package, copper clad laminate and circuit board having the same - Google Patents

Abstract

A composition for a semiconductor package resin according to an embodiment includes a resin; and reinforcing fibers disposed in the resin and made of an organic material, and surfaces of the reinforcing fibers are surface-treated with a fluorine silane-based coupling agent.

Description

Resin composition for semiconductor package, copper-clad laminate and circuit board containing the same

The embodiment relates to a resin composition for a semiconductor package, and in particular, to a resin composition for a semiconductor package having a low dielectric constant, a copper clad laminate, and a circuit board including the same.

A printed circuit board (PCB) is formed by printing a circuit line pattern with a conductive material such as copper on an electrically insulating substrate, and refers to a board just before mounting electronic components. That is, in order to densely mount many types of electronic devices on a flat plate, it means a circuit board on which the mounting position of each component is determined, and a circuit pattern connecting the components is printed on the flat surface and fixed.

Signals generated from components mounted on the printed circuit board may be transmitted by circuit patterns connected to the components.

On the other hand, with the recent high-functionality of portable electronic devices and the like, high-frequency signals are progressing in order to process a large amount of information at high speed, and circuit patterns of printed circuit boards suitable for high-frequency applications are required.

The circuit pattern of the printed circuit board should minimize signal transmission loss and enable signal transmission without deteriorating the quality of the high-frequency signal.

A transmission loss of a circuit pattern of a printed circuit board mainly consists of a conductor loss due to a metal thin film such as copper and a dielectric loss due to an insulator such as an insulating layer.

Conductor loss due to the metal thin film is related to the surface roughness of the circuit pattern. That is, as the surface roughness of the circuit pattern increases, transmission loss may increase due to a skin effect.

Therefore, reducing the surface roughness of the circuit pattern has an effect of preventing a reduction in transmission loss, but there is a problem in that the adhesive force between the circuit pattern and the insulating layer is reduced.

In addition, in order to minimize the transmission loss of the signal generated by the dielectric, a material having a low permittivity may be used as an insulating layer of the circuit board.

However, in a circuit board for high frequency use, an insulating layer requires chemical and mechanical properties for use in a circuit board in addition to a low permittivity.

In detail, the insulating layer used in circuit boards for high-frequency applications has isotropy in electrical properties for ease of circuit pattern design and process, low reactivity with metal wiring materials, low ionic conductivity, and chemical mechanical polishing (CMP) It should have sufficient mechanical strength to withstand processes such as exfoliation or increase in dielectric constant, heat resistance to withstand processing temperatures, and a low coefficient of thermal expansion to eliminate cracks due to temperature changes.

In addition, the insulating layer used in the circuit board for high frequency use has adhesive strength, crack resistance, low stress and low high temperature that can minimize various stresses and peeling that can occur at the interface with other materials (eg, metal thin film). Various conditions, such as gas generation, must be satisfied.

Accordingly, the insulating layer used in the circuit board for high frequency use must first have low dielectric constant and low thermal expansion coefficient characteristics, and accordingly, the overall thickness of the circuit board can be reduced.

However, when a circuit board is manufactured using an insulating layer of a low-k material that is thinner than the limit, reliability problems such as warpage, cracking, and peeling occur. and reliability problems such as peeling increase.

Therefore, there is a demand for a method capable of implementing a fine circuit pattern while slimming a circuit board by using an insulating layer of a low-k material, and solving reliability problems such as warpage, cracking, and peeling.

The embodiment provides a resin composition for a semiconductor package with improved reliability, a copper clad laminate, and a circuit board including the same.

In addition, embodiments provide a resin composition for a semiconductor package having a low dielectric constant, a copper clad laminate, and a circuit board including the same.

In addition, embodiments provide a resin composition for a semiconductor package including reinforcing fibers having excellent bonding strength with resin, a copper clad laminate, and a circuit board including the same.

The technical tasks to be achieved in the proposed embodiment are not limited to the technical tasks mentioned above, and other technical tasks not mentioned are clear to those skilled in the art from the description below to which the proposed embodiment belongs. will be understandable.

A composition for a semiconductor package resin according to an embodiment includes a resin; and reinforcing fibers disposed in the resin and made of an organic material, and surfaces of the reinforcing fibers are surface-treated with a fluorine silane-based coupling agent.

In addition, the reinforcing fibers include meta-aramid-based organic fibers.

In addition, the reinforcing fibers include organic fibers formed of polyphenyl sulfide (PPS).

In addition, the reinforcing fiber has a content of 10wt% to 40wt% in the total content of the composition for semiconductor package resin.

In addition, the composition for semiconductor package resin includes a filler dispersed in the resin, and the total content of the resin and the filler satisfies a range of 60wt% to 90wt% of the total content of the composition for semiconductor package resin.

In addition, the dielectric constant (Dk) of the composition for semiconductor packaging resin is 3.0 or less.

In addition, the surface of the reinforcing fibers has a root mean square roughness (Rq) in the range of 10 nm to 200 nm.

In an embodiment, a prepreg including a resin, a filler, and a reinforcing fiber is provided. At this time, the reinforcing fiber in the embodiment may be formed of an organic material. Preferably, the reinforcing fiber may be an aramid-based organic fiber. More preferably, the reinforcing fibers may be meta-aramid-based organic fibers. At this time, the meta-aride-based organic fiber has a lower permittivity than E-GF or S-GF constituting the reinforcing fibers of the existing prepreg. Accordingly, in the embodiment, it is possible to provide a prepreg comprising the meta-aramid-based organic fiber, and furthermore, while maintaining the rigidity of the prepreg, its dielectric constant is lowered to 3.0 or less, 2.9 or less, 2.8 or less, or 2.7 or less. can

In addition, the reinforcing fibers in the embodiment may be polyphenyl sulfide (PPS) fibers. The polyphenyl sulfide (PPS) fiber has a lower permittivity than meta aramid fiber. Accordingly, in the embodiment, the dielectric constant of the prepreg 100 may be lowered to 3.0 or less, 2.9 or less, 2.8 or less, or 2.7 or less while maintaining the rigidity of the prepreg 100.

On the other hand, the reinforcing fibers included in the prepreg of the embodiment include a surface treated with a fluorine silane-based coupling agent. At this time, in the embodiment, the surface treatment of the reinforcing fibers is performed with a fluorine silane-based coupling agent instead of a vinyl silane-based coupling agent. At this time, the polarity of the surface of the reinforcing fibers treated with the fluorine silane-based coupling agent is lower than the polarity of the surface of the reinforcing fibers treated with the vinyl silane-based coupling agent. Accordingly, in the embodiment, the polarity of the surface of the reinforcing fibers can be lowered, and thus the permittivity of the prepreg including the reinforcing fibers can be further lowered.

In addition, in the embodiment, corona treatment is performed on the surface of the reinforcing fiber treated with the fluorine silane-based coupling agent so that the surface of the reinforcing fiber has a surface roughness within a certain range. Accordingly, in the embodiment, bonding strength between the reinforcing fibers and the resin may be improved, and accordingly, physical reliability of the prepreg may be improved.

Accordingly, in the embodiment, it is possible to minimize signal loss in a high frequency band, improve mechanical properties, electrical properties, and thermal properties, and provide a slimmer prepreg, a circuit board, and a semiconductor package including the same.

1 is a view showing a resin composition for a semiconductor package according to an embodiment.
2 is a plan view of reinforcing fibers in the resin composition for a semiconductor package of FIG. 1;
3 is a view showing a copper clad laminate according to an embodiment.
4 is a diagram illustrating a circuit board according to an embodiment.
5 is a diagram illustrating a semiconductor package according to an embodiment.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the technical idea of the present invention is not limited to some of the described embodiments, but may be implemented in various different forms, and if it is within the scope of the technical idea of the present invention, one or more of the components among the embodiments can be selectively selected. can be used by combining and substituting.

In addition, terms (including technical and scientific terms) used in the embodiments of the present invention, unless explicitly specifically defined and described, can be generally understood by those of ordinary skill in the art to which the present invention belongs. It can be interpreted as meaning, and commonly used terms, such as terms defined in a dictionary, can be interpreted in consideration of contextual meanings of related technologies.

Also, terms used in the embodiments of the present invention are for describing the embodiments and are not intended to limit the present invention. In this specification, the singular form may also include the plural form unless otherwise specified in the phrase, and when described as “at least one (or more than one) of A and (and) B and C”, the combination of A, B, and C is possible. Can include one or more of all possible combinations.

Also, terms such as first, second, A, B, (a), and (b) may be used to describe components of an embodiment of the present invention. These terms are only used to distinguish the component from other components, and the term is not limited to the nature, order, or order of the corresponding component.

And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, the component is not only directly connected to, combined with, or connected to the other component, but also with the component. It may also include the case of being 'connected', 'combined', or 'connected' due to another component between the other components.

In addition, when it is described as being formed or disposed on the "top (above) or bottom (bottom)" of each component, the top (top) or bottom (bottom) is not only a case where two components are in direct contact with each other, but also one A case in which another component above is formed or disposed between two components is also included.

In addition, when expressed as “up (up) or down (down)”, it may include the meaning of not only the upward direction but also the downward direction based on one component.

Prior to the description of the embodiments of the present application, the resin composition for a semiconductor package described below is a composite of resin, filler, and reinforcing fibers.

Specifically, the resin composition for semiconductor packaging may include a resin, and may have a structure in which fillers and reinforcing fibers having a predetermined content are impregnated or dispersed in the resin. Preferably, the resin composition for a semiconductor package may constitute a prepreg.

In addition, in an embodiment, a copper clad laminate (CCL) may be manufactured by laminating or compressing a copper clad layer on at least one surface of the resin composition for a semiconductor package composed of a composite of the resin, filler, and reinforcing fiber. Accordingly, the copper clad laminate in the embodiment may include a copper foil layer laminated or compressed on at least one surface of a prepreg composed of a composite of resin, filler, and reinforcing fibers.

In an embodiment, a prepreg, which is a resin composition for a semiconductor package that has a low permittivity and is applicable to a high-frequency circuit board, is provided. The resin composition for a semiconductor package may be formed by impregnating a fiber layer in the form of a fabric sheet, such as a fabric woven with fiber yarn, with an epoxy resin and a filler, and then thermally compressing the same. Hereinafter, the resin composition for semiconductor packaging will be referred to as 'prepreg' and will be described.

The prepreg in the embodiment may have a dielectric constant (Dk) of 3.0 or less while including reinforcing fibers. For example, the prepreg in the embodiment may have a dielectric constant (Dk) of 2.9 or less while including reinforcing fibers. For example, the prepreg in the embodiment may have a dielectric constant (Dk) of 2.8 or less while including reinforcing fibers. For example, the prepreg in the embodiment may have a dielectric constant (Dk) of 2.7 or less while including reinforcing fibers.

Through this, in the embodiment, it is possible to provide a prepreg to be used in a circuit board applicable to high frequency applications. For example, circuit boards applied to high-frequency applications must have a low permittivity. For example, as the permittivity of the prepreg increases, signal loss may increase in a circuit board used for high frequency applications. Accordingly, in the embodiment, the dielectric constant (Dk) of the prepreg is reduced to 3.0 or less, thereby improving the rigidity of the manufactured circuit board and minimizing signal transmission loss. Accordingly, the circuit board manufactured by the prepreg of the embodiment may have an effect of securing rigidity and minimizing signal transmission loss, and thus, physical reliability and electrical reliability may be improved.

At this time, prior to the description of the prepreg, which is a resin composition for a semiconductor package according to an embodiment of the present application, the resin composition for a semiconductor package in a comparative example will be briefly described.

The resin composition for a semiconductor package of Comparative Example may include a resin and a ceramic filler disposed in the resin. The ceramic filler generally has a high permittivity. Specifically, the dielectric constant (Dk) of the ceramic filler having the lowest dielectric constant among the types of ceramic filler is about 3.9. Accordingly, in Comparative Example, there is a limit to lowering the dielectric constant of the resin composition for semiconductor packaging by changing the material of the filler.

In addition, the dielectric constant of the resin composition for semiconductor packaging of Comparative Example is affected by the dielectric constant of the resin as well as the dielectric constant of the ceramic filler. At this time, the dielectric constant (Dk) of the resin has a range between 2.5 and 6.5 depending on the type. At this time, polytetrafluoroethylene (PTFE: Polytetrafluoroethylene) having a permittivity (Dk) of about 2.2 requires a high process temperature. Accordingly, an additional insulating sheet (for example, a bonding sheet) is required to manufacture a circuit board by stacking a plurality of layers using the polytetrafluoroethylene. Accordingly, it is difficult to apply the polytetrafluoroethylene to a circuit board for high frequency use. In addition, in general, the dielectric constant (Dk) of the resin constituting the resin composition for a semiconductor package of the comparative example is about 2.8.

At this time, in the comparative example, the dielectric constant (Dk) of the resin composition for a semiconductor package is adjusted to a level of 3.0 by adjusting the type and content of materials constituting the resin and filler as described above. At this time, the resin composition for a semiconductor package of Comparative Example having a dielectric constant (Dk) of 3.0 means dielectric constant (Dk) in a state in which reinforcing fibers are not included. On the other hand, when the reinforcing fibers are included in the resin, the dielectric constant (Dk) of the prepreg of the comparative example including the reinforcing fibers exceeds 3.0. Accordingly, in the comparative example, the reinforcing fibers are removed in order to adjust the dielectric constant (Dk) of the resin composition for semiconductor packaging to about 3.0. For example, the resin composition for a semiconductor package in Comparative Example was composed of a resin coated copper (RCC) type rather than a prepreg type copper clad laminate (CCL).

That is, the resin composition for a semiconductor package of Comparative Example was an RCC that did not contain reinforcing fibers, and had a dielectric constant (Dk) of 3.0 or less by reducing the content of the filler.

However, when the resin composition for a semiconductor package of Comparative Example does not contain reinforcing fibers and the content of the filler is reduced, the overall strength of the resin composition for a semiconductor package is reduced, and the manufacturing process of the circuit board accordingly proceeds normally. There is a problem that can't be done.

In addition, since the reinforcing fibers are not included in the resin composition for a semiconductor package of Comparative Example, even if the filler is included in a certain amount or more, the strength of the circuit board is reduced, and thus in the process of manufacturing a multi-layered circuit board. Thermal stress and the like occur, resulting in a decrease in physical reliability and electrical reliability of the circuit board.

In contrast, in the embodiment, while providing a prepreg containing reinforcing fibers and fillers in a resin, the dielectric constant (Dk) of the prepreg can be lowered to 3.0 or less, 2.9 or less, 2.8 or less, or 2.7 or less.

At this time, the resin composition for semiconductor package in the embodiment may have a low permittivity is the type of material of the reinforcing fiber constituting the resin composition for semiconductor package, the surface treatment component included in the reinforcing fiber, and the reinforcing fiber It can be achieved by the surface roughness of the surface of

Hereinafter, the characteristics of each component constituting the resin composition for semiconductor packaging and the permittivity (Dk) of the resin composition for semiconductor packaging resulting from the characteristics will be described in detail.

1 is a view showing a resin composition for a semiconductor package according to an embodiment, and FIG. 2 is a plan view of reinforcing fibers in the resin composition for a semiconductor package of FIG. 1 . Hereinafter, a resin composition for a semiconductor package according to an embodiment will be described in detail with reference to FIGS. 1 and 2 .

A resin composition for a semiconductor package according to an embodiment may be a prepreg. For example, the resin composition for a semiconductor package of the embodiment may be an insulating layer used in a copper clad laminate (CCL).

The prepreg 100 of the embodiment includes a resin 110, a filler 130, and reinforcing fibers 120.

The resin 110 may be an epoxy resin, but is not limited thereto. For example, the resin 110 is not particularly limited to an epoxy resin, and for example, one or more epoxy groups may be included in the molecule, two or more epoxy groups may be included, and, alternatively, four or more epoxy groups may be included. might be included.

In addition, the resin 110 may include a naphthalene group, and may be, for example, an aromatic amine type, but is not limited thereto. For example, the resin 110 is a bisphenol A type epoxy resin, a bisphenol F type epoxy resin, a bisphenol S type epoxy resin, a phenol novolak type epoxy resin, an alkylphenol novolak type epoxy resin, a biphenyl type epoxy resin, Alkyl-type epoxy resins, dicyclopentadiene-type epoxy resins, naphthalene-type epoxy resins, naphthol-type epoxy resins, epoxy resins of condensates of phenols and aromatic aldehydes having a phenolic hydroxyl group, biphenyl aralkyl-type epoxy resins, flue orene-type epoxy resins, xanthene-type epoxy resins, triglycidyl isocyanurate, rubber-modified epoxy resins, and phosphorous-type epoxy resins; naphthalene-type epoxy resins, bisphenol A-type epoxy resins, and phenolic epoxy resins; It may include a rockfish epoxy resin, a cresol novolak epoxy resin, a rubber-modified epoxy resin, and a phosphorus-based epoxy resin.

Meanwhile, the resin 110 in the embodiment may be an organic resin. That is, the reinforcing fibers 120 in the embodiment are organic fibers. At this time, when the resin 110 is an inorganic resin, bondability with the reinforcing fibers 120, which are organic fibers, may deteriorate. The lowering of the bondability means that the impregnability of the resin 110 is low in the process of impregnating the reinforcing fibers 120 with the resin 110, so that there is a gap between the reinforcing fibers 120 and the resin 110. It can mean that the bonding strength is reduced.

The filler 130 may be distributed in the resin 110 . The filler 130 may be a ceramic filler. At this time, the dielectric constant (Dk) according to the type of ceramic filler is shown in Table 1 below.

material SiO ₂ Al ₂ O ₃ ZrO ₃ HfO ₂ TiO ₂ Permittivity (Dk) 3.7~4.2 9.0 3.7~4.2 3.7~4.2 3.7~4.2

As shown in Table 1, when the filler 130 of the embodiment is formed of Al ₂ O ₃ , the filler 130 has a dielectric constant (Dk) of 9.0, and the prepreg 100 has a dielectric constant (Dk) of 3.0 or less. can be difficult to lower. Accordingly, the filler 130 in the embodiment is SiO ₂ , ZrO ₃ , HfO ₂ , and TiO ₂ It may be formed of any one of ceramic materials. Accordingly, the filler 130 of the embodiment may have a permittivity Dk in the range of 3.7 to 4.2.

Meanwhile, the filler 130 may include at least one pore (not shown). For example, the filler 130 includes at least one closed-type pore (eg, a recess) that does not pass through the filler 130, or at least one open-type pore that penetrates the filler 130. It may be a porous filler containing pores.

The filler 130 may have a size ranging from 0.3 μm to 10 μm. Preferably, the filler 130 may have a size ranging from 0.4 μm to 8 μm. More preferably, the filler 130 may have a size ranging from 0.5 μm to 2 μm.

In this case, the pillar 130 may have a circular shape. And, when the pillar 130 is circular, the size of the pillar 130 may mean the diameter of the circular pillar 130 . Meanwhile, filler groups having different sizes may be disposed in the prepreg 100. And, the size of the filler 130 may mean the average diameter of the different fillers.

Meanwhile, the filler 130 may have a shape other than circular. In addition, when the pillar 130 is not circular, the size of the pillar 130 may be defined as the diameter of a virtual circle having a minimum size drawn to allow the pillar 130 to enter the inside.

Alternatively, when the filler 130 is not circular, the size of the filler 130 may be measured through Malvern Mastersizer 3000 particle size analysis. That is, in the embodiment, a laser may be irradiated to the filler 130 using the particle size analyzer, and the size of the filler 130 may be measured according to the degree of diffraction of the irradiated laser. Specifically, the size of the filler 130 means the average size of the filler 130 occupying a size ratio of 50% or more when fillers 130 having different sizes are disposed in the prepreg 100. can

When the size of the filler 130 exceeds 10 μm, the coefficient of thermal expansion (CTE) of the prepreg 100 may increase. Specifically, when the size of the filler 130 exceeds 10 μm, the size of an aggregate group formed by aggregation of a plurality of fillers may increase. And, when the size of the agglomeration group increases, the filler 130 may be concentrated in a specific area within the prepreg 100, and thus the coefficient of thermal expansion (CTE) of the prepreg 100 increases. can increase

In addition, when the size of the filler 130 is less than 0.3 μm, the coefficient of thermal expansion (CTE) of the prepreg 100 may increase. Specifically, when the size of the filler 130 is less than 0.3 μm, the cohesive force between the plurality of fillers increases, and accordingly, the size of the aggregate group in which the plurality of fillers are aggregated may increase. Also, when the size of the agglomerates increases, the coefficient of thermal expansion (CTE) of the prepreg 100 may increase accordingly.

On the other hand, in the total content of the prepreg 100, which is the resin composition for semiconductor packaging in the embodiment, the content of the resin 110 and the filler 130 is 60 wt% to 90 wt%. For example, in the total content of the prepreg 100, which is the resin composition for semiconductor packaging, the content of the resin 110 and the filler 130 may be 62 wt% to 88 wt%. For example, in the total content of the prepreg 100, which is the resin composition for semiconductor packaging, the content of the resin 110 and the filler 130 may be 65 wt% to 85 wt%.

In the total content of the prepreg 100, when the content occupied by the resin 110 and the filler 130 is less than 60 wt%, the content of the reinforcing fibers 120 increases correspondingly, and accordingly, the prepreg ( 100) may exceed 3.0. For example, if the content of the resin 110 and the filler 130 is less than 60wt% of the total content of the prepreg 100, it may be difficult to apply it to a circuit board for high frequency.

In addition, when the content of the resin 110 and the filler 130 exceeds 90wt% of the total content of the prepreg 100, the content of the reinforcing fibers 120 decreases correspondingly, and accordingly The stiffness of the prepreg 100 may decrease. For example, if the content of the resin 110 and the filler 130 exceeds 90 wt% in the total content of the prepreg 100, the physical properties of the prepreg 100 may be deteriorated. Accordingly, fairness may be deteriorated in a process of manufacturing a circuit board having a multi-layer structure.

Meanwhile, the prepreg 100 in the embodiment includes the reinforcing fibers 120 disposed in the prepreg 100. The reinforcing fibers 120 may include a plurality of fibers arranged in different directions within the resin 110 of the prepreg 100 .

For example, the reinforcing fibers 120 include first fibers 121 arranged in a first direction (eg, a first plane direction or an x-axis direction or a longitudinal direction or a transverse direction) in the resin 110 and , It may include a second fiber 122 arranged in a second direction perpendicular to the first direction (eg, a second planar direction or y-axis direction or width direction or vertical direction).

That is, in the embodiment, the prepreg 100 is prepared by impregnating the resin 110 in a state in which the first fibers 121 arranged in the first direction and the second fibers 122 arranged in the second direction are woven. can be manufactured The first fiber 121 and the second fiber 122 may each be made of a filament bundle.

The first fibers 121 may be composed of a plurality of first fiber groups each extending in the first direction within the resin 110 and spaced apart from each other in a second direction perpendicular to the first direction. .

In addition, the second fibers 122 are each extended in a second direction perpendicular to the first direction within the resin 110, and are composed of a plurality of second fiber groups spaced apart from each other in the first direction. can

In this case, the first fiber 121 composed of the first fiber group may be disposed to cross the second fiber 122 composed of the second fiber group in the resin 110 . For example, within the resin 110, the first fibers 121 and the second fibers 122 may be disposed to cross each other at a 1:1 ratio. For example, in the resin 110, one first fiber 121 and one second fiber 122 may be disposed to cross each other in a first direction and a second direction, respectively. However, the embodiment is not limited thereto, and the plurality of first fibers 121 and the plurality of second fibers 122 may be arranged to cross each other at n:m.

Each of the plurality of first fibers 121 may be composed of a first filament count. In addition, each of the plurality of second fibers 122 may be composed of a second filament count. In this case, the first filament count and the second filament count may be the same or different from each other. For example, the first filament count of the first fiber 121 may be 0.9 to 1.1 times the second filament count of the second fiber 122 .

Meanwhile, the first filament count of the first fiber 121 may be 40 or less. The first filament count of the first fiber 121 may be 35 or less. The first filament count of the first fiber 121 may be 20 or less. The first filament count of the first fiber 121 may be 15 or less. For example, the first filament count of the first fiber 121 may be 10 to 40. For example, the first filament count of the first fiber 121 may be 12 to 38. For example, the first filament count of the first fiber 121 may be 15 to 35. If the first filament count of the first fiber 121 is less than 10, the content of the first fiber 121 in the prepreg 100 is reduced, and thus the prepreg 100 does not have desired stiffness may not be For example, when the first filament count of the first fiber 121 exceeds 40, the thickness of the first fiber 121 composed of the first filament count increases, and accordingly, the first fiber 121 The thickness of the resin 110 impregnated into may increase, and the thickness T2 of the prepreg 100 may correspondingly increase. Preferably, the first filament count may mean the number of filaments constituting one first fiber 121 .

Correspondingly, the second filament count of the second fiber 122 may be 40 or less. The second filament count of the second fiber 122 may be 35 or less. The second filament count of the second fiber 122 may be 20 or less. The second filament count of the second fiber 122 may be 15 or less. For example, the second filament count of the second fiber 122 may be 10 to 40. For example, the second filament count of the second fiber 122 may be 12 to 38. For example, the second filament count of the second fiber 122 may be 15 to 35. If the second filament count of the second fiber 122 is less than 10, the content of the second fiber 122 in the prepreg 100 is reduced, and thus the prepreg 100 does not have desired stiffness may not be For example, when the second filament count of the second fiber 122 exceeds 40, the thickness of the second fiber 122 composed of the second filament count increases, and accordingly, the second fiber 122 The thickness of the resin 110 surrounding the may increase, and the thickness H1 of the prepreg 100 may correspondingly increase. The second filament count may mean the number of filaments constituting one second fiber 122 .

Accordingly, in the embodiment, the first fiber 121 and the second fiber 122 have a certain level of filament count as described above, so that the thickness occupied by the reinforcing fiber 120 in the prepreg 100 ( T1) can be reduced. For example, the thickness T1 occupied by the reinforcing fibers 120 in the embodiment may be 10 μm or less. For example, the thickness T1 occupied by the reinforcing fibers 120 in the embodiment may be 8 μm or less. For example, the thickness T1 occupied by the reinforcing fibers 120 in the embodiment may be 6 μm or less.

In the embodiment, as the thickness T1 of the reinforcing fibers 120 is reduced, the thickness T2 of the prepreg 100, which is a composite of the reinforcing fibers 120 and the resin 110, can be reduced. . The thickness T2 of the prepreg 100 may be 20 μm or less. For example, the thickness T2 of the prepreg 100 may be 18 μm or less. For example, the thickness T2 of the prepreg 100 may be 16 μm or less. For example, the thickness T2 of the prepreg 100 may be 15 μm or less.

Meanwhile, the reinforcing fiber 120 including the first fiber 121 and the second fiber 122 may be made of an organic material. Preferably, the reinforcing fibers 120 may be organic fibers.

That is, in the comparative example, the dielectric constant (Dk) was controlled by controlling the type of material forming the resin, the type of material forming the filler, the content of the resin and the filler, and the like. However, as described above, it may be difficult to apply to a high frequency circuit board only by adjusting the type or content of a resin or filler material.

Accordingly, in the embodiment, the dielectric constant Dk of the prepreg 100 can be lowered to 3.0 or less, 2.9 or less, 2.8 or less, or 2.7 or less by controlling the type of material constituting the reinforcing fiber 120. . To this end, the reinforcing fibers 120 are composed of organic fibers containing organic materials.

At this time, the organic material-based glass has excellent impregnating force with the resin 110, and thus has a high bonding force with the resin 110.

Specifically, the reinforcing fibers used in Comparative Examples were formed of E-GF (glass fiber) or S-GF. However, the E-GF or S-GF has a high dielectric constant (Dk), so it may be difficult to adjust the dielectric constant (Dk) of the prepreg 100 to 3.0 or less.

Accordingly, the reinforcing fibers 120 in the embodiment may be formed of an organic material.

At this time, the reinforcing fibers 120 in the first embodiment may be formed of an aramid-based organic material. Preferably, the reinforcing fiber 120 in the first embodiment may be an aramid fiber formed of an amaride-based organic material.

At this time, the dielectric constants of E-GF, NE-GF and aramid fibers are compared as shown in Table 2.

matter dielectric constant
(10GHz) dielectric loss
(10GHz) E-GF 6.13 0.0055 S-GF 5.21 0.0068 aramid fiber 3.80 0.0010

As shown in Table 2, E-GF or S-GF has a permittivity (Dk) in the range of 5.21 to 6.13 at a frequency of 10 GHz.

Unlike this, it can be seen that the permittivity (Dk) of Amarid fiber is 3.80, which is significantly lower than the permittivity (Dk) of the E-GF or S-GF.

Accordingly, in the embodiment, the reinforcing fibers 120 are formed with aramid fibers of an aramid-based organic material. Therefore, in the embodiment, the dielectric constant (Dk) of the reinforcing fiber 120 itself can be lowered, and through this, the dielectric constant (Dk) of the prepreg 100 can be lowered.

In addition, comparing the physical properties of the E-GF and the aramid fibers are shown in Table 3 below.

properties E-GF aramid fiber linear density(Tex) 300 110 Tensile strength(MPa) 1850 3430 Modulus (GPa) 65 138 Elongation at break (%) 3.2 2.4

As shown in Table 3, the aramid fiber has a low linear density and a low elongation at break, and high tensile strength and high modulus compared to E-GF. Accordingly, when the reinforcing fibers 120 are formed of aramid fibers, the physical strength of the prepreg 100 can be improved compared to those formed of E-GF.

Meanwhile, the aramid series is structurally divided into para-aramid and meta-aramid. At this time, the structures of para-aramid and meta-aramid are shown in Formulas 1 and 2 below.

[Formula 1]

Formula 1 shows the structure of meta-aramid.

[Formula 2]

Formula 2 above shows the structure of para-aramid.

Referring to Chemical Formulas 1 and 2, in the case of para-aramid, due to a rigid linear structure and hydrogen bonding, mechanical rigidity is high, but processability is poor. Accordingly, when the reinforcing fiber is composed of para-aramid, in the process of impregnating the para-aramid fiber with the resin, the impregnability is reduced, and accordingly, materials applicable to the resin are limited, making it difficult to manufacture prepregs.

On the other hand, in the case of meta-aramid, it has a flexible polymer structure and has a flexible structure compared to para-aramid, so processability is high. In addition, in the case of meta aramid, the impregnation property is excellent, and accordingly, when the reinforcing fiber is composed of meta aramid, there is no limitation in selecting a resin material. Furthermore, in the case of the meta aramid, it has a flexible property and excellent impact resistance compared to the para aramid.

Accordingly, it is preferable that the reinforcing fiber 120 in the embodiment is a meta-aramid fiber formed of a meta-aramid series.

Alternatively, the reinforcing fibers 120 may be formed of polyphenyl sulfide (PPS), which is not an aramid-based material.

At this time, PPS (Polyphenyl sulfide) is an engineering plastic having high heat resistance and high strength at a high temperature of 200 ℃ or more, and has a characteristic of having a low dielectric constant. More specifically, the polyphenyl sulfide (PPS) has a permittivity (Dk) similar to that of the liquid crystal polymer (LCP). For example, the PPS (Polyphenyl sulfide) has a lower permittivity (Dk) of 2.9 to 3.1 than the aramid-based material.

Accordingly, when the reinforcing fibers 120 are made of polyphenyl sulfide (PPS), the dielectric constant Dk of the prepreg 100 may be further lowered. Looking at the structure of PPS (Polyphenyl sulfide), it is shown in Chemical Formula 3 below.

[Formula 3]

In addition, as in Chemical Formula 3, the polyphenyl sulfide (PPS) includes sulfide bonds present in each polymer repeating unit, and the sulfide bonds have a flexible structure. Furthermore, PPS (Polyphenyl sulfide) contains an unshared pair of electrons, and thus may form a hydrogen bond with the resin 110, thereby further improving the impregnation property with the resin 110.

On the other hand, in the total content of the prepreg 100, which is the resin composition for semiconductor packaging in the embodiment, the content occupied by the reinforcing fibers 120 is 10 wt% to 40 wt%. For example, the content occupied by the reinforcing fibers 120 in the total content of the prepreg 100, which is the resin composition for semiconductor packaging, may be 12 wt% to 38 wt%. For example, the content occupied by the reinforcing fibers 120 in the total content of the prepreg 100, which is the resin composition for semiconductor packaging, may be 15 wt% to 35 wt%.

When the content occupied by the reinforcing fibers 120 is less than 10wt% in the total content of the prepreg 100, which is the resin composition for semiconductor packaging in the embodiment, the strength of the prepreg 100 decreases, and accordingly It can be difficult to apply to multilayer circuit boards. In addition, in the total content of the prepreg 100, which is the resin composition for semiconductor packaging in the embodiment, when the content occupied by the reinforcing fibers 120 exceeds 40 wt%, the dielectric constant (Dk) of the prepreg 100 may be difficult to lower below 3.0.

Meanwhile, the surface of the reinforcing fibers 120 in the embodiment may be surface treated with a silane coupling agent. That is, in the embodiment, the surface of the reinforcing fiber 120 formed of meta aramid fiber or polyphenyl sulfide (PPS) is treated with a silane coupling agent to increase bonding strength with the resin 110.

At this time, in the embodiment, a fluorine silane-based coupling agent is applied as the silane coupling agent.

For example, a vinyl silane-based coupling agent may be used as the silane coupling agent. However, when the reinforcing fiber 120 is surface-treated with a vinyl silane-based coupling agent, the dielectric constant (Dk) of the reinforcing fiber 120 may increase due to the polarity of the vinyl silane-based coupling agent, Accordingly, it may be difficult to lower the dielectric constant (Dk) of the prepreg 100 to 3.0 or less. That is, in the embodiment, the surface of the reinforcing fiber 120 is treated with a fluorine silane-based coupling agent, and the fluorine silane-based coupling agent has a lower polarity than the vinyl silane-based coupling agent. The permittivity Dk of the fiber 120 and the permittivity of the prepreg 100 may be lowered. That is, when the surface of the reinforcing fiber is treated with the vinyl silane-based coupling agent, the surface of the reinforcing fiber forms a -CH ₂ - reactive group formed by the reaction of vinyl, and at this time, the polarity of the -CH ₂ - reactive group is at the 4.56 level. In contrast, the -F reactive group formed on the surface of the reinforcing fiber 120 as the surface is treated with a fluorine silane-based coupling agent has a polarity of 1.8. Also, the polarity is proportional to the permittivity Dk, and as the polarity increases, the permittivity Dk also increases. Accordingly, in the embodiment, by surface-treating the reinforcing fibers 120 with the fluorine silane-based coupling agent, while lowering the dielectric constant (Dk) of the reinforcing fibers 120, the dielectric constant ( Dk) can be lowered to 3.0 or less.

On the other hand, when the surface treatment of the reinforcing fibers 120 is performed with the fluorine silane-based coupling agent, the dielectric constant (Dk) of the reinforcing fibers 120 may be lowered, but the surface energy of the reinforcing fibers 120 As the is low, bonding strength with the resin 110 may decrease. Accordingly, in the embodiment, fine irregularities are formed on the surface of the reinforcing fibers 120 treated with the fluorine silane-based coupling agent.

At this time, the fine irregularities of the reinforcing fibers 120 in the embodiment may be formed by additionally performing corona treatment on the surface of the reinforcing fibers 120 treated with the fluorine silane-based coupling agent.

That is, in the embodiment, corona treatment is performed on the surface of the reinforcing fiber 120 treated with the fluorine silane-based coupling agent to form fine irregularities on the surface of the reinforcing fiber 120. For example, in the embodiment, the surface of the reinforcing fibers 120 can have a surface roughness of a certain level or more through the corona treatment.

At this time, when the surface roughness of the reinforcing fibers 120 is out of a certain level range, the bonding force with the resin 110 decreases, the strength of the prepreg 100 decreases, or the The permittivity (Dk) may increase.

Accordingly, the root mean roughness (Rq) of the surface of the reinforcing fibers 120 formed through the corona treatment in the embodiment may have a range between 10 nm and 200 nm. For example, the root mean roughness (Rq) of the surface of the reinforcing fibers 120 formed through the corona treatment in the embodiment may have a range between 15 nm and 195 nm. For example, the root mean roughness (Rq) of the surface of the reinforcing fibers 120 formed through the corona treatment in the embodiment may have a range between 20 nm and 190 nm.

When the root mean roughness (Rq) of the surface of the reinforcing fibers 120 is less than 10 nm, bonding strength between the reinforcing fibers 120 and the resin 110 may decrease. Further, when the root mean roughness (Rq) of the surface of the reinforcing fibers 120 exceeds 200 nm, the stiffness of the reinforcing fibers 120 may decrease.

In an embodiment, a prepreg including a resin, a filler, and a reinforcing fiber is provided. At this time, the reinforcing fiber in the embodiment may be formed of an organic material. Preferably, the reinforcing fiber may be an aramid-based organic fiber. More preferably, the reinforcing fibers may be meta-aramid-based organic fibers. At this time, the meta-aride-based organic fiber has a lower permittivity than E-GF or S-GF constituting the reinforcing fibers of the existing prepreg. Accordingly, in the embodiment, it is possible to provide a prepreg comprising the meta-aramid-based organic fiber, and furthermore, while maintaining the rigidity of the prepreg, its dielectric constant is lowered to 3.0 or less, 2.9 or less, 2.8 or less, or 2.7 or less. can

In addition, the reinforcing fibers in the embodiment may be polyphenyl sulfide (PPS) fibers. The polyphenyl sulfide (PPS) fiber has a lower permittivity than meta aramid fiber. Accordingly, in the embodiment, the dielectric constant of the prepreg 100 may be lowered to 3.0 or less, 2.9 or less, 2.8 or less, or 2.7 or less while maintaining the rigidity of the prepreg 100.

On the other hand, the reinforcing fibers included in the prepreg of the embodiment include a surface treated with a fluorine silane-based coupling agent. At this time, in the embodiment, the surface treatment of the reinforcing fibers is performed with a fluorine silane-based coupling agent instead of a vinyl silane-based coupling agent. At this time, the polarity of the surface of the reinforcing fibers treated with the fluorine silane-based coupling agent is lower than the polarity of the surface of the reinforcing fibers treated with the vinyl silane-based coupling agent. Accordingly, in the embodiment, the polarity of the surface of the reinforcing fibers can be lowered, and thus the permittivity of the prepreg including the reinforcing fibers can be further lowered.

In addition, in the embodiment, corona treatment is performed on the surface of the reinforcing fiber treated with the fluorine silane-based coupling agent so that the surface of the reinforcing fiber has a surface roughness within a certain range. Accordingly, in the embodiment, bonding strength between the reinforcing fibers and the resin may be improved, and accordingly, physical reliability of the prepreg may be improved.

Accordingly, in the embodiment, it is possible to minimize signal loss in a high frequency band, improve mechanical properties, electrical properties, and thermal properties, and provide a slimmer prepreg, a circuit board, and a semiconductor package including the same.

3 is a view showing a copper clad laminate according to an embodiment.

Referring to FIG. 3 , a copper clad laminate (CCL) may be provided by laminating a copper clad layer on at least one surface of the prepreg 100 described with reference to FIGS. 1 and 2 . That is, the prepreg 100 disclosed in FIGS. 1 and 2 in the embodiment may be used as an insulating layer of a copper clad laminate (CCL).

For example, the copper clad laminate (CCL) of the embodiment may include a prepreg 100 and a copper clad layer disposed on at least one surface of the prepreg 100. For example, the copper clad laminate may include a first copper foil layer 210 disposed on the upper surface of the prepreg 100 . For example, the copper clad laminate may include a second copper foil layer 220 disposed on the lower surface of the prepreg 100 .

4 is a diagram illustrating a circuit board according to an embodiment.

Referring to FIG. 4 , the circuit board may include a plurality of insulating layers.

For example, the circuit board includes a first insulating layer 311, a second insulating layer 312, a third insulating layer 313, a fourth insulating layer 314, a fifth insulating layer 315, and a sixth insulating layer. Layer 316 may be included. At this time, the circuit board of the embodiment is shown as having a 6-layer structure based on the insulating layer, but is not limited thereto. For example, the circuit board may have a layer number of less than 6 layers based on an insulating layer, and may have a layer number of 7 or more layers.

The first insulating layer 311, the second insulating layer 312, the third insulating layer 313, the fourth insulating layer 314, the fifth insulating layer 315, and the sixth insulating layer 316 form wiring. It is a substrate on which a changeable electric circuit is organized, and may include all of a printed circuit board, a wiring board, and an insulation board made of an insulating material capable of forming circuit patterns on its surface.

For example, the first insulating layer 311, the second insulating layer 312, the third insulating layer 313, the fourth insulating layer 314, the fifth insulating layer 315, and the sixth insulating layer 316 ) may be composed of the prepreg 100 shown in FIG. However, the embodiment is not limited thereto, and the first insulating layer 311, the second insulating layer 312, the third insulating layer 313, the fourth insulating layer 314, and the fifth insulating layer 315 , At least one layer of the sixth insulating layer 316 may be made of the prepreg 100, and at least another layer may be made of a different material. For example, the first insulating layer 311, the second insulating layer 312, the third insulating layer 313, the fourth insulating layer 314, the fifth insulating layer 315, and the sixth insulating layer ( 316) may be composed of the prepreg 100, and at least the other may be composed of RCC.

On the surfaces of the first insulating layer 311, the second insulating layer 312, the third insulating layer 313, the fourth insulating layer 314, the fifth insulating layer 315, and the sixth insulating layer 316 A circuit pattern layer may be disposed.

For example, a first circuit pattern layer 321 may be disposed on the first surface of the first insulating layer 311 . For example, a second circuit pattern layer 322 may be disposed on the second surface of the first insulating layer 311 . For example, a third circuit pattern layer 323 may be disposed on the first surface of the second insulating layer 312 . For example, a fourth circuit pattern layer 324 may be disposed on the first surface of the third insulating layer 313 . For example, a fifth circuit pattern layer 325 may be disposed on the second surface of the fourth insulating layer 314 . A fifth circuit pattern layer 326 may be disposed on the second surface of the fifth insulating layer 315 . A sixth circuit pattern layer 327 may be disposed on the second surface of the sixth insulating layer 316 .

The circuit pattern layer is a wiring that transmits an electrical signal and may be formed of a metal material having high electrical conductivity. To this end, the circuit pattern layer is at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn) can be formed as In addition, the circuit pattern layer is at least one selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn), which have excellent bonding strength. It may be formed of a paste containing a metal material or a solder paste. Preferably, the circuit pattern layer may be formed of copper (Cu), which has high electrical conductivity and is relatively inexpensive.

The circuit pattern layers can be formed by additive process, subtractive process, MSAP (Modified Semi Additive Process), SAP (Semi Additive Process), etc., which are typical manufacturing processes of printed circuit boards. and detailed descriptions are omitted here.

Each of the circuit pattern layers may have a third thickness T3. For example, each of the circuit pattern layers may have a third thickness T3 of 5 μm to 15 μm. For example, each of the circuit pattern layers may have a third thickness T3 of 7 μm to 13 μm. For example, each of the circuit pattern layers may have a third thickness T3 of 8 μm to 12 μm. At this time, in the case of a circuit board having 6 layers based on the number of insulating layers as described above, in the embodiment, the prepreg 100 as shown in FIG. 1 is used, and thus the overall thickness (H4) of the circuit board is reduced. while maintaining the rigidity of the circuit board. For example, in the comparative example, the total thickness of the circuit board exceeded 190 μm. For example, in the comparative example, the level at which the thickness of the circuit board can be minimized was 190 μm. Unlike this, in the embodiment, as a circuit board is manufactured using the prepreg 100 as shown in FIG. 1 , a circuit board having a total thickness of 182 μm or less may be provided. For example, in the embodiment, as a circuit board is manufactured using the prepreg 100 as shown in FIG. 1 , a circuit board having a total thickness of 170 μm or less may be provided. For example, as a circuit board is manufactured using the prepreg 100 as shown in FIG. 1 , a circuit board having a total thickness of 165 μm or less may be provided.

Meanwhile, the circuit board of the embodiment includes vias. The via may electrically connect circuit pattern layers disposed on different layers. For example, a first via 331 may be formed in the first insulating layer 311 . For example, a first via 331 may be formed in the first insulating layer 311 . For example, a second via 332 may be formed in the second insulating layer 312 . For example, a third via 333 may be formed in the third insulating layer 313 . For example, a fourth via 334 may be formed in the fourth insulating layer 314 . For example, a fifth via 335 may be formed in the fifth insulating layer 315 . For example, a sixth via 336 may be formed in the sixth insulating layer 316 .

The vias as described above penetrate each insulating layer and may connect circuit pattern layers disposed on different layers to each other.

The vias as described above may be formed by filling an inside of a via hole formed in each insulating layer with a metal material. The via hole may be formed by any one of mechanical processing, laser processing, and chemical processing. When the via hole is formed by mechanical processing, methods such as milling, drilling, and routing may be used, and when the via hole is formed by laser processing, a UV or CO ₂ laser method may be used. In the case of being formed by chemical processing, the insulating layer can be opened using chemicals including aminosilane, ketones, and the like.

When the via hole is formed, the inside of the via hole may be filled with a conductive material to form the via. The via may be formed of any one metal material selected from copper (Cu), silver (Ag), tin (Sn), gold (Au), nickel (Ni), and palladium (Pd). In addition, the conductive material filling may use any one of electroless plating, electrolytic plating, screen printing, sputtering, evaporation, inkjetting, and dispensing, or a combination thereof. .

The circuit board may include a protective layer. The protective layer includes a first protective layer 341 disposed on the first surface of the third insulating layer 313 and a second protective layer 342 disposed on the second surface of the sixth insulating layer 316. include The first protective layer 341 and the second protective layer 342 may be solder resist, but are not limited thereto.

5 is a diagram illustrating a semiconductor package according to an embodiment.

Referring to FIG. 5 , the semiconductor package includes the circuit board shown in FIG. 4 . Hereinafter, for convenience of description, a description overlapping with that of FIG. 4 will be omitted.

In addition, the semiconductor package includes an adhesive member disposed on the circuit board.

For example, the adhesive member may be formed on a circuit pattern layer disposed on a surface of an outermost insulating layer among a plurality of insulating layers of the circuit board.

For example, the adhesive member may include the first adhesive member 410 disposed on the fourth circuit pattern layer 324 . In addition, the semiconductor package may include a second adhesive member 440 disposed on the seventh circuit pattern layer 327 of the circuit board.

The first adhesive member 410 and the second adhesive member 440 may have different shapes. For example, the first adhesive member 410 may have a hexahedral shape. For example, the cross section of the first adhesive member 410 may have a rectangular shape. For example, the cross section of the first adhesive member 410 may include a rectangular or square shape. The second adhesive member 440 may have a spherical shape. For example, the cross section of the second adhesive member 440 may include a circular shape or a semicircular shape. For example, the cross section of the second adhesive member 440 may have a partially or entirely rounded shape. For example, the cross-sectional shape of the second adhesive member 440 may include a flat surface on one side and a curved surface on the other side opposite to the one side. Meanwhile, the second adhesive member 440 may be a solder ball, but is not limited thereto.

A chip 420 may be mounted on the first adhesive member 410 . For example, the chip 420 may include a drive IC chip. For example, the chip 420 may refer to various chips including sockets or devices other than a drive IC chip. For example, the chip 420 may include at least one of a diode chip, a power IC chip, a touch sensor IC chip, an MLCC chip, a BGA chip, and a chip capacitor. For example, the chip 420 may be a power management integrated circuit (PMIC). For example, the chip 420 may be a memory chip such as a volatile memory (eg, DRAM), a non-volatile memory (eg, ROM), or a flash memory. For example, the chip 420 may be an application processor (AP) chip such as a central processor (eg, CPU), a graphic processor (eg, GPU), a digital signal processor, a cryptographic processor, a microprocessor, a microcontroller, or an analog processor. -It may be a logic chip such as a digital converter or ASIC (application-specific IC). Here, in the drawings, the semiconductor package is illustrated as having only one chip mounted thereon, but is not limited thereto. For example, the fourth circuit pattern layer 324 of the circuit board may include a plurality of pads spaced apart from each other. Also, a chip may be mounted on each of the plurality of pads. For example, the plurality of chips may include a first AP chip corresponding to a central processor (CPU) and a second AP chip corresponding to a graphics processor (GPU).

A molding layer 430 may be formed on the circuit board. The molding layer 430 may be disposed to cover the mounted chip 420 . For example, the molding layer 430 may be EMC (Epoxy Mold Compound) formed to protect the mounted chip 420, but is not limited thereto.

Meanwhile, the vias of the embodiment may have different widths. For example, a via disposed adjacent to the chip 420 among the vias may have a width corresponding to a pitch of terminals of the chip 420 . For example, the third via 333 may have a width corresponding to a pitch of terminals of the chip 420 .

Also, the vias in the embodiment may gradually increase in width as the distance from the chip 420 increases. For example, the second via 332 may have a greater width than the third via 333 . For example, the first via 331 may have a greater width than the second via 332 . For example, the fourth via 334 may have a greater width than the first via 331 . For example, the fifth via 335 may have a greater width than the fourth via 334 . For example, the sixth via 336 may have a greater width than the fifth via 335 . For example, the width of the vias of the embodiment may gradually increase as they move away from the chip 420 , and may decrease as they get closer to the chip 420 .

Meanwhile, in an embodiment, a semiconductor package including at least one chip mounted on a circuit board for a semiconductor package may be provided. For example, a semiconductor package having a structure in which a chip is mounted on a circuit board according to the embodiment may be included in an electronic device. At this time, the electronic device includes a main board (not shown). The main board may be physically and/or electrically connected to various components. For example, the main board may be connected to the semiconductor package of the embodiment. Various chips may be mounted on the semiconductor package. For example, the semiconductor package may include a memory chip such as a volatile memory (eg, DRAM), a non-volatile memory (eg, ROM), or a flash memory, a central processor (eg, CPU), a graphic processor (eg, GPU) , application processor chips such as digital signal processors, cryptographic processors, microprocessors, and microcontrollers, and logic chips such as analog-to-digital converters and ASICs (application-specific ICs) may be mounted. Also, the circuit board of the embodiment may be used as a package board on which a memory chip or a logic chip is mounted.

At this time, the electronic device includes a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, and a computer. ), a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, and the like. However, it is not limited thereto, and may be any other electronic device that processes data in addition to these.

On the other hand, when the circuit board having the characteristics of the above-described invention is used in IT devices or home appliances such as smart phones, server computers, TVs, etc., functions such as signal transmission or power supply can be stably performed. For example, when a circuit board having the characteristics of the present invention performs a semiconductor package function, it can function to safely protect a semiconductor chip from external moisture or contaminants, and can prevent leakage current or electrical short circuit between terminals. Alternatively, it is possible to solve the problem of electrical opening of terminals supplied to the semiconductor chip. In addition, when it is responsible for the function of signal transmission, it is possible to solve the noise problem. Through this, the circuit board having the characteristics of the above-described invention can maintain the stable function of the IT device or home appliance, so that the entire product and the circuit board to which the present invention is applied can achieve functional integrity or technical interoperability with each other.

When the circuit board having the characteristics of the above-described invention is used in a transportation device such as a vehicle, it is possible to solve the problem of distortion of signals transmitted to the transportation device, or to safely protect a semiconductor chip that controls the transportation device from the outside, and to prevent leaks. The stability of the transportation device can be further improved by solving the problem of electrical short circuit between currents or terminals or electrical openness of terminals supplying semiconductor chips. Therefore, the transport device and the circuit board to which the present invention is applied can achieve functional integrity or technical interoperability with each other.

Features, structures, effects, etc. described in the embodiments above are included in at least one embodiment, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, etc. illustrated in each embodiment can be combined or modified with respect to other embodiments by a person having ordinary knowledge in the field to which the embodiments belong. Therefore, the contents related to these combinations and variations should be interpreted as being included in the scope of the embodiments.

Although the above has been described centering on the embodiment, this is only an example and is not intended to limit the embodiment, and those skilled in the art to which the embodiment belongs may find various things not exemplified above to the extent that they do not deviate from the essential characteristics of the present embodiment. It will be appreciated that variations and applications of branches are possible. For example, each component specifically shown in the embodiment can be modified and implemented. And differences related to these modifications and applications should be interpreted as being included in the scope of the embodiments set forth in the appended claims.

Claims (10)

profit; and
Disposed in the resin and comprising a reinforcing fiber composed of an organic material,
The surface of the reinforcing fiber is surface treated with a fluorine silane-based coupling agent,
A composition for semiconductor packaging resin. According to claim 1,
The reinforcing fiber is a meta-aramid-based organic fiber,
A composition for semiconductor packaging resin. According to claim 1,
The reinforcing fiber is an organic fiber formed of PPS (Polyphenyl sulfide),
A composition for semiconductor packaging resin. According to any one of claims 1 to 3,
The reinforcing fibers,
Having a content of 10wt% to 40wt% in the total content of the composition for semiconductor package resin,
A composition for semiconductor packaging resin. According to claim 4,
Including a filler dispersed in the resin,
The total content of the resin and the filler satisfies the range of 60wt% to 90wt% in the total content of the composition for semiconductor package resin,
A composition for semiconductor packaging resin. According to claim 5,
The dielectric constant (Dk) of the composition for semiconductor package resin is 3.0 or less,
A composition for semiconductor packaging resin. According to any one of claims 1 to 3,
The surface of the reinforcing fiber has a root mean square roughness (Rq) in the range of 10 nm to 200 nm,
A composition for semiconductor packaging resin. A prepreg comprising the resin composition for a semiconductor package according to any one of claims 1 to 3; and
Including a copper foil layer disposed on at least one side of the prepreg,
Copper clad laminate. a plurality of insulating layers; and
a circuit pattern disposed on at least one insulating layer among the plurality of insulating layers; and
a via penetrating at least one of the plurality of insulating layers and connected to the circuit board;
At least one of the plurality of insulating layers includes the copper clad laminate according to claim 8,
circuit board. a circuit board according to claim 9;
an adhesive member disposed on the circuit board disposed at the outermost part of the circuit pattern filling of the circuit board;
Including a chip mounted on the adhesive member,
semiconductor package.

Images